pcb

1 files changed, 487 insertions, 0 deletions

diff --git a/pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AR0231AT7C00XUEA0-DRBR-E.lbr b/pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AR0231AT7C00XUEA0-DRBR-E.lbr
new file mode 100644
index 0000000..5cc602e
--- /dev/null
+++ b/pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AR0231AT7C00XUEA0-DRBR-E.lbr
@@ -0,0 +1,487 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--/17110718/1088951/2.50/121/3/Integrated Circuit/-->
+<!DOCTYPE curve SYSTEM "eagle.dtd">
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+<drawing>
+<settings>
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+<setting verticaltext="up"/>
+</settings>
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+<wire x1="5.5" y1="5" x2="5.5" y2="-5" width="0.2" layer="21"/>
+<wire x1="5.5" y1="-5" x2="-5.5" y2="-5" width="0.2" layer="21"/>
+<wire x1="-5.5" y1="-5" x2="-5.5" y2="4" width="0.2" layer="21"/>
+<wire x1="-5.5" y1="4" x2="-4.5" y2="5" width="0.2" layer="21"/>
+<circle x="-5.5" y="5" radius="0.1" width="0.2" layer="25"/>
+</package>
+</packages>
+<symbols>
+<symbol name="AR0231AT7C00XUEA0-DRBR-E">
+<wire x1="5.08" y1="2.54" x2="40.64" y2="2.54" width="0.254" layer="94"/>
+<wire x1="40.64" y1="-154.94" x2="40.64" y2="2.54" width="0.254" layer="94"/>
+<wire x1="40.64" y1="-154.94" x2="5.08" y2="-154.94" width="0.254" layer="94"/>
+<wire x1="5.08" y1="2.54" x2="5.08" y2="-154.94" width="0.254" layer="94"/>
+<text x="41.91" y="7.62" align="center-left" size="1.778" layer="95">&gt;NAME</text>
+<text x="41.91" y="5.08" align="center-left" size="1.778" layer="96">&gt;VALUE</text>
+<pin name="VDD_IO_1" x="0" y="0" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_1" x="0" y="-2.54" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_1" x="0" y="-5.08" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_2" x="0" y="-7.62" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_IO_2" x="0" y="-10.16" length="middle" direction="io" rot="R0"/>
+<pin name="DATA0_P" x="0" y="-12.7" length="middle" direction="io" rot="R0"/>
+<pin name="DATA1_N" x="0" y="-15.24" length="middle" direction="io" rot="R0"/>
+<pin name="CLK_P" x="0" y="-17.78" length="middle" direction="io" rot="R0"/>
+<pin name="DATA2_P" x="0" y="-20.32" length="middle" direction="io" rot="R0"/>
+<pin name="DATA3_N" x="0" y="-22.86" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_IO_3" x="0" y="-25.4" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_3" x="0" y="-27.94" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT0" x="0" y="-30.48" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT1" x="0" y="-33.02" length="middle" direction="io" rot="R0"/>
+<pin name="EXTCLK" x="0" y="-35.56" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_2" x="0" y="-38.1" length="middle" direction="io" rot="R0"/>
+<pin name="DATA0_N" x="0" y="-40.64" length="middle" direction="io" rot="R0"/>
+<pin name="DATA1_P" x="0" y="-43.18" length="middle" direction="io" rot="R0"/>
+<pin name="CLK_N" x="0" y="-45.72" length="middle" direction="io" rot="R0"/>
+<pin name="DATA2_N" x="0" y="-48.26" length="middle" direction="io" rot="R0"/>
+<pin name="DATA3_P" x="0" y="-50.8" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_4" x="0" y="-53.34" length="middle" direction="io" rot="R0"/>
+<pin name="VAA_1" x="0" y="-55.88" length="middle" direction="io" rot="R0"/>
+<pin name="AGND_1" x="0" y="-58.42" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT3" x="0" y="-60.96" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT2" x="0" y="-63.5" length="middle" direction="io" rot="R0"/>
+<pin name="RESET_BAR" x="0" y="-66.04" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_SLVS" x="0" y="-68.58" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_PHY" x="0" y="-71.12" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_3" x="0" y="-73.66" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_IO_PHY" x="0" y="-76.2" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_4" x="0" y="-78.74" length="middle" direction="io" rot="R0"/>
+<pin name="VPP" x="0" y="-81.28" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_IO_4" x="0" y="-83.82" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT4" x="0" y="-86.36" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT5" x="0" y="-88.9" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_5" x="0" y="-91.44" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_6" x="0" y="-93.98" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_7" x="0" y="-96.52" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_8" x="0" y="-99.06" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_9" x="0" y="-101.6" length="middle" direction="io" rot="R0"/>
+<pin name="AGND_2" x="0" y="-104.14" length="middle" direction="io" rot="R0"/>
+<pin name="VAA_2" x="0" y="-106.68" length="middle" direction="io" rot="R0"/>
+<pin name="VAA_PIX" x="0" y="-109.22" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_10" x="0" y="-111.76" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT6" x="0" y="-114.3" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT7" x="0" y="-116.84" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_11" x="0" y="-119.38" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_12" x="0" y="-121.92" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_13" x="0" y="-124.46" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_14" x="0" y="-127" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_15" x="0" y="-129.54" length="middle" direction="io" rot="R0"/>
+<pin name="AGND_3" x="0" y="-132.08" length="middle" direction="io" rot="R0"/>
+<pin name="VAA_3" x="0" y="-134.62" length="middle" direction="io" rot="R0"/>
+<pin name="VAA_4" x="0" y="-137.16" length="middle" direction="io" rot="R0"/>
+<pin name="VDD_5" x="0" y="-139.7" length="middle" direction="io" rot="R0"/>
+<pin name="PIXCLK" x="0" y="-142.24" length="middle" direction="io" rot="R0"/>
+<pin name="DOUT8" x="0" y="-144.78" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_16" x="0" y="-147.32" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_17" x="0" y="-149.86" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_18" x="0" y="-152.4" length="middle" direction="io" rot="R0"/>
+<pin name="DGND_19" x="45.72" y="0" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_20" x="45.72" y="-2.54" length="middle" direction="io" rot="R180"/>
+<pin name="AGND_4" x="45.72" y="-5.08" length="middle" direction="io" rot="R180"/>
+<pin name="VAA_5" x="45.72" y="-7.62" length="middle" direction="io" rot="R180"/>
+<pin name="AGND_5" x="45.72" y="-10.16" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_21" x="45.72" y="-12.7" length="middle" direction="io" rot="R180"/>
+<pin name="DOUT9" x="45.72" y="-15.24" length="middle" direction="io" rot="R180"/>
+<pin name="FRAME_VALID" x="45.72" y="-17.78" length="middle" direction="io" rot="R180"/>
+<pin name="LINE_VALID" x="45.72" y="-20.32" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_22" x="45.72" y="-22.86" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_23" x="45.72" y="-25.4" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_24" x="45.72" y="-27.94" length="middle" direction="io" rot="R180"/>
+<pin name="ATEST1" x="45.72" y="-30.48" length="middle" direction="io" rot="R180"/>
+<pin name="ATEST2" x="45.72" y="-33.02" length="middle" direction="io" rot="R180"/>
+<pin name="ATEST3" x="45.72" y="-35.56" length="middle" direction="io" rot="R180"/>
+<pin name="ATEST4" x="45.72" y="-38.1" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_IO_5" x="45.72" y="-40.64" length="middle" direction="io" rot="R180"/>
+<pin name="DOUT11" x="45.72" y="-43.18" length="middle" direction="io" rot="R180"/>
+<pin name="DOUT10" x="45.72" y="-45.72" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_25" x="45.72" y="-48.26" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_26" x="45.72" y="-50.8" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_27" x="45.72" y="-53.34" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_28" x="45.72" y="-55.88" length="middle" direction="io" rot="R180"/>
+<pin name="SCLK" x="45.72" y="-58.42" length="middle" direction="io" rot="R180"/>
+<pin name="SDATA" x="45.72" y="-60.96" length="middle" direction="io" rot="R180"/>
+<pin name="TEMP_FLAG" x="45.72" y="-63.5" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_IO_6" x="45.72" y="-66.04" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_29" x="45.72" y="-68.58" length="middle" direction="io" rot="R180"/>
+<pin name="DOUT13" x="45.72" y="-71.12" length="middle" direction="io" rot="R180"/>
+<pin name="DOUT12" x="45.72" y="-73.66" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_30" x="45.72" y="-76.2" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_31" x="45.72" y="-78.74" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_32" x="45.72" y="-81.28" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_33" x="45.72" y="-83.82" length="middle" direction="io" rot="R180"/>
+<pin name="GPIO1" x="45.72" y="-86.36" length="middle" direction="io" rot="R180"/>
+<pin name="GPIO0" x="45.72" y="-88.9" length="middle" direction="io" rot="R180"/>
+<pin name="SYS_CHECK" x="45.72" y="-91.44" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_6" x="45.72" y="-93.98" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_7" x="45.72" y="-96.52" length="middle" direction="io" rot="R180"/>
+<pin name="TEST" x="45.72" y="-99.06" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_34" x="45.72" y="-101.6" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_35" x="45.72" y="-104.14" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_36" x="45.72" y="-106.68" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_37" x="45.72" y="-109.22" length="middle" direction="io" rot="R180"/>
+<pin name="SADDR2" x="45.72" y="-111.76" length="middle" direction="io" rot="R180"/>
+<pin name="SADDR1" x="45.72" y="-114.3" length="middle" direction="io" rot="R180"/>
+<pin name="SADDR0" x="45.72" y="-116.84" length="middle" direction="io" rot="R180"/>
+<pin name="GPIO3" x="45.72" y="-119.38" length="middle" direction="io" rot="R180"/>
+<pin name="GPIO2" x="45.72" y="-121.92" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_IO_7" x="45.72" y="-124.46" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_8" x="45.72" y="-127" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_38" x="45.72" y="-129.54" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_IO_8" x="45.72" y="-132.08" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_9" x="45.72" y="-134.62" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_39" x="45.72" y="-137.16" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_IO_9" x="45.72" y="-139.7" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_10" x="45.72" y="-142.24" length="middle" direction="io" rot="R180"/>
+<pin name="DGND_40" x="45.72" y="-144.78" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_11" x="45.72" y="-147.32" length="middle" direction="io" rot="R180"/>
+<pin name="VDD_IO_10" x="45.72" y="-149.86" length="middle" direction="io" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="AR0231AT7C00XUEA0-DRBR-E" prefix="IC">
+<description>&lt;b&gt;Image Sensor Color CMOS 1928 x 1208Pixels&lt;/b&gt;&lt;p&gt;
+Source: &lt;a href="https://4donline.ihs.com/images/VipMasterIC/IC/ONSM/ONSM-S-A0003590094/ONSM-S-A0003590376-1.pdf?hkey=52A5661711E402568146F3353EA87419"&gt; Datasheet &lt;/a&gt;</description>
+<gates>
+<gate name="G$1" symbol="AR0231AT7C00XUEA0-DRBR-E" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="BGA121C80P11X11_1100X1000X155">
+<connects>
+<connect gate="G$1" pin="VDD_IO_1" pad="A1"/>
+<connect gate="G$1" pin="DGND_1" pad="A2"/>
+<connect gate="G$1" pin="VDD_1" pad="A3"/>
+<connect gate="G$1" pin="VDD_2" pad="A4"/>
+<connect gate="G$1" pin="VDD_IO_2" pad="A5"/>
+<connect gate="G$1" pin="DATA0_P" pad="A6"/>
+<connect gate="G$1" pin="DATA1_N" pad="A7"/>
+<connect gate="G$1" pin="CLK_P" pad="A8"/>
+<connect gate="G$1" pin="DATA2_P" pad="A9"/>
+<connect gate="G$1" pin="DATA3_N" pad="A10"/>
+<connect gate="G$1" pin="VDD_IO_3" pad="A11"/>
+<connect gate="G$1" pin="VDD_3" pad="B1"/>
+<connect gate="G$1" pin="DOUT0" pad="B2"/>
+<connect gate="G$1" pin="DOUT1" pad="B3"/>
+<connect gate="G$1" pin="EXTCLK" pad="B4"/>
+<connect gate="G$1" pin="DGND_2" pad="B5"/>
+<connect gate="G$1" pin="DATA0_N" pad="B6"/>
+<connect gate="G$1" pin="DATA1_P" pad="B7"/>
+<connect gate="G$1" pin="CLK_N" pad="B8"/>
+<connect gate="G$1" pin="DATA2_N" pad="B9"/>
+<connect gate="G$1" pin="DATA3_P" pad="B10"/>
+<connect gate="G$1" pin="VDD_4" pad="B11"/>
+<connect gate="G$1" pin="VAA_1" pad="C1"/>
+<connect gate="G$1" pin="AGND_1" pad="C2"/>
+<connect gate="G$1" pin="DOUT3" pad="C3"/>
+<connect gate="G$1" pin="DOUT2" pad="C4"/>
+<connect gate="G$1" pin="RESET_BAR" pad="C5"/>
+<connect gate="G$1" pin="VDD_SLVS" pad="C6"/>
+<connect gate="G$1" pin="VDD_PHY" pad="C7"/>
+<connect gate="G$1" pin="DGND_3" pad="C8"/>
+<connect gate="G$1" pin="VDD_IO_PHY" pad="C9"/>
+<connect gate="G$1" pin="DGND_4" pad="C10"/>
+<connect gate="G$1" pin="VPP" pad="C11"/>
+<connect gate="G$1" pin="VDD_IO_4" pad="D1"/>
+<connect gate="G$1" pin="DOUT4" pad="D2"/>
+<connect gate="G$1" pin="DOUT5" pad="D3"/>
+<connect gate="G$1" pin="DGND_5" pad="D4"/>
+<connect gate="G$1" pin="DGND_6" pad="D5"/>
+<connect gate="G$1" pin="DGND_7" pad="D6"/>
+<connect gate="G$1" pin="DGND_8" pad="D7"/>
+<connect gate="G$1" pin="DGND_9" pad="D8"/>
+<connect gate="G$1" pin="AGND_2" pad="D9"/>
+<connect gate="G$1" pin="VAA_2" pad="D10"/>
+<connect gate="G$1" pin="VAA_PIX" pad="D11"/>
+<connect gate="G$1" pin="DGND_10" pad="E1"/>
+<connect gate="G$1" pin="DOUT6" pad="E2"/>
+<connect gate="G$1" pin="DOUT7" pad="E3"/>
+<connect gate="G$1" pin="DGND_11" pad="E4"/>
+<connect gate="G$1" pin="DGND_12" pad="E5"/>
+<connect gate="G$1" pin="DGND_13" pad="E6"/>
+<connect gate="G$1" pin="DGND_14" pad="E7"/>
+<connect gate="G$1" pin="DGND_15" pad="E8"/>
+<connect gate="G$1" pin="AGND_3" pad="E9"/>
+<connect gate="G$1" pin="VAA_3" pad="E10"/>
+<connect gate="G$1" pin="VAA_4" pad="E11"/>
+<connect gate="G$1" pin="VDD_5" pad="F1"/>
+<connect gate="G$1" pin="PIXCLK" pad="F2"/>
+<connect gate="G$1" pin="DOUT8" pad="F3"/>
+<connect gate="G$1" pin="DGND_16" pad="F4"/>
+<connect gate="G$1" pin="DGND_17" pad="F5"/>
+<connect gate="G$1" pin="DGND_18" pad="F6"/>
+<connect gate="G$1" pin="DGND_19" pad="F7"/>
+<connect gate="G$1" pin="DGND_20" pad="F8"/>
+<connect gate="G$1" pin="AGND_4" pad="F9"/>
+<connect gate="G$1" pin="VAA_5" pad="F10"/>
+<connect gate="G$1" pin="AGND_5" pad="F11"/>
+<connect gate="G$1" pin="DGND_21" pad="G1"/>
+<connect gate="G$1" pin="DOUT9" pad="G2"/>
+<connect gate="G$1" pin="FRAME_VALID" pad="G3"/>
+<connect gate="G$1" pin="LINE_VALID" pad="G4"/>
+<connect gate="G$1" pin="DGND_22" pad="G5"/>
+<connect gate="G$1" pin="DGND_23" pad="G6"/>
+<connect gate="G$1" pin="DGND_24" pad="G7"/>
+<connect gate="G$1" pin="ATEST1" pad="G8"/>
+<connect gate="G$1" pin="ATEST2" pad="G9"/>
+<connect gate="G$1" pin="ATEST3" pad="G10"/>
+<connect gate="G$1" pin="ATEST4" pad="G11"/>
+<connect gate="G$1" pin="VDD_IO_5" pad="H1"/>
+<connect gate="G$1" pin="DOUT11" pad="H2"/>
+<connect gate="G$1" pin="DOUT10" pad="H3"/>
+<connect gate="G$1" pin="DGND_25" pad="H4"/>
+<connect gate="G$1" pin="DGND_26" pad="H5"/>
+<connect gate="G$1" pin="DGND_27" pad="H6"/>
+<connect gate="G$1" pin="DGND_28" pad="H7"/>
+<connect gate="G$1" pin="SCLK" pad="H8"/>
+<connect gate="G$1" pin="SDATA" pad="H9"/>
+<connect gate="G$1" pin="TEMP_FLAG" pad="H10"/>
+<connect gate="G$1" pin="VDD_IO_6" pad="H11"/>
+<connect gate="G$1" pin="DGND_29" pad="J1"/>
+<connect gate="G$1" pin="DOUT13" pad="J2"/>
+<connect gate="G$1" pin="DOUT12" pad="J3"/>
+<connect gate="G$1" pin="DGND_30" pad="J4"/>
+<connect gate="G$1" pin="DGND_31" pad="J5"/>
+<connect gate="G$1" pin="DGND_32" pad="J6"/>
+<connect gate="G$1" pin="DGND_33" pad="J7"/>
+<connect gate="G$1" pin="GPIO1" pad="J8"/>
+<connect gate="G$1" pin="GPIO0" pad="J9"/>
+<connect gate="G$1" pin="SYS_CHECK" pad="J10"/>
+<connect gate="G$1" pin="VDD_6" pad="J11"/>
+<connect gate="G$1" pin="VDD_7" pad="K1"/>
+<connect gate="G$1" pin="TEST" pad="K2"/>
+<connect gate="G$1" pin="DGND_34" pad="K3"/>
+<connect gate="G$1" pin="DGND_35" pad="K4"/>
+<connect gate="G$1" pin="DGND_36" pad="K5"/>
+<connect gate="G$1" pin="DGND_37" pad="K6"/>
+<connect gate="G$1" pin="SADDR2" pad="K7"/>
+<connect gate="G$1" pin="SADDR1" pad="K8"/>
+<connect gate="G$1" pin="SADDR0" pad="K9"/>
+<connect gate="G$1" pin="GPIO3" pad="K10"/>
+<connect gate="G$1" pin="GPIO2" pad="K11"/>
+<connect gate="G$1" pin="VDD_IO_7" pad="L1"/>
+<connect gate="G$1" pin="VDD_8" pad="L2"/>
+<connect gate="G$1" pin="DGND_38" pad="L3"/>
+<connect gate="G$1" pin="VDD_IO_8" pad="L4"/>
+<connect gate="G$1" pin="VDD_9" pad="L5"/>
+<connect gate="G$1" pin="DGND_39" pad="L6"/>
+<connect gate="G$1" pin="VDD_IO_9" pad="L7"/>
+<connect gate="G$1" pin="VDD_10" pad="L8"/>
+<connect gate="G$1" pin="DGND_40" pad="L9"/>
+<connect gate="G$1" pin="VDD_11" pad="L10"/>
+<connect gate="G$1" pin="VDD_IO_10" pad="L11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="Manufacturer_Name" value="onsemi" constant="no"/>
+<attribute name="Manufacturer_Part_Number" value="AR0231AT7C00XUEA0-DRBR-E" constant="no"/>
+<attribute name="Mouser_Part_Number" value="" constant="no"/>
+<attribute name="Mouser_Price-Stock" value="" constant="no"/>
+<attribute name="Arrow_Part_Number" value="" constant="no"/>
+<attribute name="Arrow_Price-Stock" value="" constant="no"/>
+<attribute name="Description" value="Image Sensor Color CMOS 1928 x 1208Pixels" constant="no"/>
+<attribute name="Height" value="1.55mm" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>