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| author | Abel Tim <abel@main.home> | 2024-06-09 12:31:17 +0200 |
|---|---|---|
| committer | Abel Tim <abel@main.home> | 2024-06-09 12:31:17 +0200 |
| commit | a4748d628d3b33dab92e60a43565bcff78957fe7 (patch) | |
| tree | 30413e086f1dbd21a0ecf48eca7248ae86a1e329 /pcb_boven/openmv/openmv-boards-master/openmv5/poe/lbr/Ag9905LP.lbr | |
| parent | 8ed29c8f05a9dd68840b83c2c87d19ec084ad55d (diff) | |
| download | robotica-a4748d628d3b33dab92e60a43565bcff78957fe7.tar.gz robotica-a4748d628d3b33dab92e60a43565bcff78957fe7.zip | |
pcb
Diffstat (limited to 'pcb_boven/openmv/openmv-boards-master/openmv5/poe/lbr/Ag9905LP.lbr')
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv5/poe/lbr/Ag9905LP.lbr | 161 |
1 files changed, 161 insertions, 0 deletions
diff --git a/pcb_boven/openmv/openmv-boards-master/openmv5/poe/lbr/Ag9905LP.lbr b/pcb_boven/openmv/openmv-boards-master/openmv5/poe/lbr/Ag9905LP.lbr new file mode 100644 index 0000000..2c29dcc --- /dev/null +++ b/pcb_boven/openmv/openmv-boards-master/openmv5/poe/lbr/Ag9905LP.lbr @@ -0,0 +1,161 @@ +<?xml version="1.0" encoding="utf-8"?> +<!--/12068774/1088951/2.50/8/4/Integrated Circuit/--> +<!DOCTYPE curve SYSTEM "eagle.dtd"> +<eagle version="7.7.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/> +<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/> +<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/> +<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/> +<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/> +<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/> +<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/> +<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/> +<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/> +<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/> +<layer number="39" name="tKeepout" color="4" fill="11" visible="yes" active="yes"/> +<layer number="40" name="bKeepout" color="1" fill="11" visible="yes" active="yes"/> +<layer number="41" name="tRestrict" color="4" fill="10" visible="yes" active="yes"/> +<layer number="42" name="bRestrict" color="1" fill="10" visible="yes" active="yes"/> +<layer number="43" name="vRestrict" color="2" fill="10" visible="yes" active="yes"/> +<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/> +<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/> +<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/> +<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/> +<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/> +<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/> +<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="yes"/> +<layer number="52" name="bDocu" color="7" fill="1" visible="yes" active="yes"/> +<layer number="90" name="Modules" color="5" fill="1" visible="yes" active="yes"/> +<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/> +<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/> +<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/> +<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/> +<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/> +<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/> +<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/> +<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> +</layers> +<library> +<description><Power Management Modules IEEE802.3af PD module. 5V 7W, low profile</b><p> +<author>Created by SamacSys</author></description> +<packages> +<package name="Ag9905LP"> +<description><b>Ag9905LP-1</b><br> +</description> +<pad name="1" x="0.000" y="0.000" drill="1.15" diameter="1.725"/> +<pad name="2" x="2.540" y="0.000" drill="1.15" diameter="1.725"/> +<pad name="3" x="16.110" y="0.000" drill="1.15" diameter="1.725"/> +<pad name="4" x="18.650" y="0.000" drill="1.15" diameter="1.725"/> +<pad name="5" x="18.650" y="11.380" drill="1.15" diameter="1.725"/> +<pad name="6" x="16.110" y="11.380" drill="1.15" diameter="1.725"/> +<pad name="7" x="2.540" y="11.380" drill="1.15" diameter="1.725"/> +<pad name="8" x="0.000" y="11.380" drill="1.15" diameter="1.725"/> +<text x="9.325" y="5.195" align="center" size="1.27" layer="25" rot="R0" >>NAME</text> +<text x="9.325" y="5.195" align="center" size="1.27" layer="27" rot="R0" >>VALUE</text> +<wire x1="-1.27" y1="-1.31" x2="19.92" y2="-1.31" width="0.2" layer="51"/> +<wire x1="19.92" y1="-1.31" x2="19.92" y2="12.69" width="0.2" layer="51"/> +<wire x1="19.92" y1="12.69" x2="-1.27" y2="12.69" width="0.2" layer="51"/> +<wire x1="-1.27" y1="12.69" x2="-1.27" y2="-1.31" width="0.2" layer="51"/> +<wire x1="-1.27" y1="1.44" x2="-1.27" y2="1.44" width="0.1" layer="21"/> +<wire x1="-1.27" y1="1.44" x2="-1.27" y2="9.94" width="0.1" layer="21"/> +<wire x1="-1.27" y1="9.94" x2="-1.27" y2="9.94" width="0.1" layer="21"/> +<wire x1="-1.27" y1="9.94" x2="-1.27" y2="1.44" width="0.1" layer="21"/> +<wire x1="4.075" y1="12.69" x2="14.575" y2="12.69" width="0.1" layer="21"/> +<wire x1="14.575" y1="12.69" x2="14.575" y2="12.69" width="0.1" layer="21"/> +<wire x1="14.575" y1="12.69" x2="4.075" y2="12.69" width="0.1" layer="21"/> +<wire x1="4.075" y1="12.69" x2="4.075" y2="12.69" width="0.1" layer="21"/> +<wire x1="19.92" y1="9.94" x2="19.92" y2="9.94" width="0.1" layer="21"/> +<wire x1="19.92" y1="9.94" x2="19.92" y2="1.44" width="0.1" layer="21"/> +<wire x1="19.92" y1="1.44" x2="19.92" y2="1.44" width="0.1" layer="21"/> +<wire x1="19.92" y1="1.44" x2="19.92" y2="9.94" width="0.1" layer="21"/> +<wire x1="14.575" y1="-1.31" x2="4.075" y2="-1.31" width="0.1" layer="21"/> +<wire x1="4.075" y1="-1.31" x2="4.075" y2="-1.31" width="0.1" layer="21"/> +<wire x1="4.075" y1="-1.31" x2="14.575" y2="-1.31" width="0.1" layer="21"/> +<wire x1="14.575" y1="-1.31" x2="14.575" y2="-1.31" width="0.1" layer="21"/> +<wire x1="-2.27" y1="13.69" x2="20.92" y2="13.69" width="0.1" layer="51"/> +<wire x1="20.92" y1="13.69" x2="20.92" y2="-3.3" width="0.1" layer="51"/> +<wire x1="20.92" y1="-3.3" x2="-2.27" y2="-3.3" width="0.1" layer="51"/> +<wire x1="-2.27" y1="-3.3" x2="-2.27" y2="13.69" width="0.1" layer="51"/> +<wire x1="0" y1="-2.2" x2="0" y2="-2.2" width="0.2" layer="21"/> +<wire x1="0.000" y1="-2.200" x2="0.000" y2="-2.300" width="0.2" layer="21" curve="180.0"/> +<wire x1="0" y1="-2.3" x2="0" y2="-2.3" width="0.2" layer="21"/> +<wire x1="0.000" y1="-2.300" x2="0.000" y2="-2.200" width="0.2" layer="21" curve="180.0"/> +<wire x1="0" y1="-2.2" x2="0" y2="-2.2" width="0.2" layer="21"/> +<wire x1="0.000" y1="-2.200" x2="0.000" y2="-2.300" width="0.2" layer="21" curve="180.0"/> +</package> +</packages> +<symbols> +<symbol name="AG9905LP"> +<wire x1="5.08" y1="2.54" x2="27.94" y2="2.54" width="0.254" layer="94"/> +<wire x1="27.94" y1="-10.16" x2="27.94" y2="2.54" width="0.254" layer="94"/> +<wire x1="27.94" y1="-10.16" x2="5.08" y2="-10.16" width="0.254" layer="94"/> +<wire x1="5.08" y1="2.54" x2="5.08" y2="-10.16" width="0.254" layer="94"/> +<text x="29.21" y="7.62" align="center-left" size="1.778" layer="95">>NAME</text> +<text x="29.21" y="5.08" align="center-left" size="1.778" layer="96">>VALUE</text> +<pin name="+VDC_1" x="0" y="0" length="middle" direction="io" rot="R0"/> +<pin name="+VDC_2" x="0" y="-2.54" length="middle" direction="io" rot="R0"/> +<pin name="-VDC" x="0" y="-5.08" length="middle" direction="io" rot="R0"/> +<pin name="ADJ" x="0" y="-7.62" length="middle" direction="io" rot="R0"/> +<pin name="VIN+_1" x="33.02" y="-7.62" length="middle" direction="io" rot="R180"/> +<pin name="VIN+_2" x="33.02" y="-5.08" length="middle" direction="io" rot="R180"/> +<pin name="VIN-_1" x="33.02" y="-2.54" length="middle" direction="io" rot="R180"/> +<pin name="VIN-_2" x="33.02" y="0" length="middle" direction="io" rot="R180"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="AG9905LP" prefix="IC"> +<description><b>Power Management Modules IEEE802.3af PD module. 5V 7W, low profile</b><p> +Source: <a href="https://silvertel.com/images/datasheets/Ag9900M-datasheet-ultra-miniature-isolated-Power-over-Ethernet-POE-module.pdf"> Datasheet </a></description> +<gates> +<gate name="G$1" symbol="AG9905LP" x="0" y="0"/> +</gates> +<devices> +<device name="" package="Ag9905LP"> +<connects> +<connect gate="G$1" pin="+VDC_1" pad="1"/> +<connect gate="G$1" pin="+VDC_2" pad="2"/> +<connect gate="G$1" pin="-VDC" pad="3"/> +<connect gate="G$1" pin="ADJ" pad="4"/> +<connect gate="G$1" pin="VIN+_1" pad="5"/> +<connect gate="G$1" pin="VIN+_2" pad="6"/> +<connect gate="G$1" pin="VIN-_1" pad="7"/> +<connect gate="G$1" pin="VIN-_2" pad="8"/> +</connects> +<technologies> +<technology name=""> +<attribute name="Mouser_Part_Number" value="480-AG9905LP" constant="no"/> +<attribute name="Mouser_Price-Stock" value="https://www.mouser.co.uk/ProductDetail/Silvertel/Ag9905LP?qs=OlC7AqGiEDm9ZoM6zJQCoQ%3D%3D" constant="no"/> +<attribute name="Manufacturer_Name" value="Silvertel" constant="no"/> +<attribute name="Manufacturer_Part_Number" value="Ag9905LP" constant="no"/> +<attribute name="Description" value="Power Management Modules IEEE802.3af PD module. 5V 7W, low profile" constant="no"/> +<attribute name="Height" value="8.5mm" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> |
