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| author | Abel Tim <abel@main.home> | 2024-06-09 12:31:17 +0200 |
|---|---|---|
| committer | Abel Tim <abel@main.home> | 2024-06-09 12:31:17 +0200 |
| commit | a4748d628d3b33dab92e60a43565bcff78957fe7 (patch) | |
| tree | 30413e086f1dbd21a0ecf48eca7248ae86a1e329 /pcb_boven/openmv/openmv-boards-master/openmv5/rt1060r1/lbr/MIMXRT1052DVL6B.lbr | |
| parent | 8ed29c8f05a9dd68840b83c2c87d19ec084ad55d (diff) | |
| download | robotica-a4748d628d3b33dab92e60a43565bcff78957fe7.tar.gz robotica-a4748d628d3b33dab92e60a43565bcff78957fe7.zip | |
pcb
Diffstat (limited to 'pcb_boven/openmv/openmv-boards-master/openmv5/rt1060r1/lbr/MIMXRT1052DVL6B.lbr')
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv5/rt1060r1/lbr/MIMXRT1052DVL6B.lbr | 710 |
1 files changed, 710 insertions, 0 deletions
diff --git a/pcb_boven/openmv/openmv-boards-master/openmv5/rt1060r1/lbr/MIMXRT1052DVL6B.lbr b/pcb_boven/openmv/openmv-boards-master/openmv5/rt1060r1/lbr/MIMXRT1052DVL6B.lbr new file mode 100644 index 0000000..e3ee558 --- /dev/null +++ b/pcb_boven/openmv/openmv-boards-master/openmv5/rt1060r1/lbr/MIMXRT1052DVL6B.lbr @@ -0,0 +1,710 @@ +<?xml version="1.0" encoding="utf-8"?> +<!--/1122589/1088951/2.49/196/2/Integrated Circuit/--> +<!DOCTYPE curve SYSTEM "eagle.dtd"> +<eagle version="7.7.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer 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rot="R0"/> +<pin name="GPIO_EMC_38" x="0" y="-119.38" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_00" x="0" y="-121.92" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_03" x="0" y="-124.46" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_10" x="0" y="-127" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_13" x="0" y="-129.54" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B1_03" x="0" y="-132.08" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B1_05" x="0" y="-134.62" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B1_12" x="0" y="-137.16" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B1_13" x="0" y="-139.7" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_29" x="0" y="-142.24" length="middle" direction="io" rot="R0"/> +<pin name="VSS_5" x="0" y="-144.78" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_00" x="0" y="-147.32" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_37" x="0" y="-149.86" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_35" x="0" y="-152.4" length="middle" direction="io" rot="R0"/> +<pin name="NVCC_EMC_1" x="0" y="-154.94" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_01" x="0" y="-157.48" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_02" x="0" y="-160.02" length="middle" direction="io" rot="R0"/> +<pin name="NVCC_GPIO_1" x="0" y="-162.56" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_14" x="0" y="-165.1" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B0_15" x="0" y="-167.64" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_B1_04" x="0" y="-170.18" length="middle" direction="io" rot="R0"/> +<pin name="VSS_6" x="0" y="-172.72" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_06" x="0" y="-175.26" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_22" x="0" y="-177.8" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_04" x="0" y="-180.34" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_01" x="0" y="-182.88" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_02" x="0" y="-185.42" length="middle" direction="io" rot="R0"/> +<pin name="NVCC_EMC_2" x="0" y="-187.96" length="middle" direction="io" rot="R0"/> +<pin name="VDD_SOC_IN_1" x="0" y="-190.5" length="middle" direction="io" rot="R0"/> +<pin name="VDD_SOC_IN_2" x="0" y="-193.04" length="middle" direction="io" rot="R0"/> +<pin name="VDD_SOC_IN_3" x="0" y="-195.58" length="middle" direction="io" rot="R0"/> +<pin name="VDD_SOC_IN_4" x="0" y="-198.12" length="middle" direction="io" rot="R0"/> +<pin name="NVCC_GPIO_2" x="0" y="-200.66" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_04" x="0" y="-203.2" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_07" x="0" y="-205.74" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_08" x="0" y="-208.28" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_09" x="0" y="-210.82" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_10" x="0" y="-213.36" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_23" x="0" y="-215.9" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_11" x="0" y="-218.44" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_03" x="0" y="-220.98" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_05" x="0" y="-223.52" length="middle" direction="io" rot="R0"/> +<pin name="VDD_SOC_IN_5" x="0" y="-226.06" length="middle" direction="io" rot="R0"/> +<pin name="VSS_7" x="0" y="-228.6" length="middle" direction="io" rot="R0"/> +<pin name="VSS_8" x="0" y="-231.14" length="middle" direction="io" rot="R0"/> +<pin name="VDD_SOC_IN_6" x="0" y="-233.68" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_11" x="0" y="-236.22" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_03" x="0" y="-238.76" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B1_14" x="0" y="-241.3" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_10" x="0" y="-243.84" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_AD_B0_05" x="0" y="-246.38" length="middle" direction="io" rot="R0"/> +<pin name="GPIO_EMC_12" x="53.34" y="0" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B0_04" x="53.34" y="-2.54" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_EMC_08" x="53.34" y="-5.08" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_EMC_07" x="53.34" y="-7.62" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_EMC_06" x="53.34" y="-10.16" length="middle" direction="io" rot="R180"/> +<pin name="VDD_SOC_IN_7" x="53.34" y="-12.7" length="middle" direction="io" rot="R180"/> +<pin name="VSS_9" x="53.34" y="-15.24" length="middle" direction="io" rot="R180"/> +<pin name="VSS_10" x="53.34" y="-17.78" length="middle" direction="io" rot="R180"/> +<pin name="VDD_SOC_IN_8" x="53.34" y="-20.32" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B0_01" x="53.34" y="-22.86" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_13" x="53.34" y="-25.4" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_12" x="53.34" y="-27.94" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_08" x="53.34" y="-30.48" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B0_14" x="53.34" y="-33.02" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B0_02" x="53.34" y="-35.56" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B0_05" x="53.34" y="-38.1" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B0_01" x="53.34" y="-40.64" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B0_00" x="53.34" y="-43.18" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_SENSE" x="53.34" y="-45.72" length="middle" direction="io" rot="R180"/> +<pin name="NVCC_SD0" x="53.34" y="-48.26" length="middle" direction="io" rot="R180"/> +<pin name="VSS_11" x="53.34" y="-50.8" length="middle" direction="io" rot="R180"/> +<pin name="VSS_12" x="53.34" y="-53.34" length="middle" direction="io" rot="R180"/> +<pin name="VDD_SOC_IN_9" x="53.34" y="-55.88" length="middle" direction="io" rot="R180"/> +<pin name="NVCC_GPIO_3" x="53.34" y="-58.42" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_00" x="53.34" y="-60.96" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_06" x="53.34" y="-63.5" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_11" x="53.34" y="-66.04" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_15" x="53.34" y="-68.58" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B0_03" x="53.34" y="-71.12" length="middle" direction="io" rot="R180"/> +<pin name="VSS_13" x="53.34" y="-73.66" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_PSWITCH" x="53.34" y="-76.2" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_IN_Q" x="53.34" y="-78.74" length="middle" direction="io" rot="R180"/> +<pin name="NVCC_SD1" x="53.34" y="-81.28" length="middle" direction="io" rot="R180"/> +<pin name="TEST_MODE" x="53.34" y="-83.82" length="middle" direction="io" rot="R180"/> +<pin name="PMIC_ON_REQ" x="53.34" y="-86.36" length="middle" direction="io" rot="R180"/> +<pin name="VDD_USB_CAP" x="53.34" y="-88.9" length="middle" direction="io" rot="R180"/> +<pin name="NGND_KEL0" x="53.34" y="-91.44" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_07" x="53.34" y="-93.98" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_01" x="53.34" y="-96.52" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_05" x="53.34" y="-99.06" length="middle" direction="io" rot="R180"/> +<pin name="VSS_14" x="53.34" y="-101.6" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B0_12" x="53.34" y="-104.14" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_IN_1" x="53.34" y="-106.68" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_IN_2" x="53.34" y="-109.22" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_06" x="53.34" y="-111.76" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_07" x="53.34" y="-114.3" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_00" x="53.34" y="-116.84" length="middle" direction="io" rot="R180"/> +<pin name="WAKEUP" x="53.34" y="-119.38" length="middle" direction="io" rot="R180"/> +<pin name="PMIC_STBY_REQ" x="53.34" y="-121.92" length="middle" direction="io" rot="R180"/> +<pin name="USB_OTG1_DP" x="53.34" y="-124.46" length="middle" direction="io" rot="R180"/> +<pin name="VSS_15" x="53.34" y="-127" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B0_15" x="53.34" y="-129.54" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_02" x="53.34" y="-132.08" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_04" x="53.34" y="-134.62" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_10" x="53.34" y="-137.16" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B0_13" x="53.34" y="-139.7" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_LP_1" x="53.34" y="-142.24" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_LP_2" x="53.34" y="-144.78" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_02" x="53.34" y="-147.32" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_03" x="53.34" y="-149.86" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_01" x="53.34" y="-152.4" length="middle" direction="io" rot="R180"/> +<pin name="ONOFF" x="53.34" y="-154.94" length="middle" direction="io" rot="R180"/> +<pin name="POR_B" x="53.34" y="-157.48" length="middle" direction="io" rot="R180"/> +<pin name="USB_OTG1_DN" x="53.34" y="-160.02" length="middle" direction="io" rot="R180"/> +<pin name="VDD_SNVS_IN" x="53.34" y="-162.56" length="middle" direction="io" rot="R180"/> +<pin name="VDD_SNVS_CAP" x="53.34" y="-165.1" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B0_02" x="53.34" y="-167.64" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_03" x="53.34" y="-170.18" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B1_09" x="53.34" y="-172.72" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_AD_B0_00" x="53.34" y="-175.26" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_GND_1" x="53.34" y="-177.8" length="middle" direction="io" rot="R180"/> +<pin name="DCDC_GND_2" x="53.34" y="-180.34" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_05" x="53.34" y="-182.88" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_09" x="53.34" y="-185.42" length="middle" direction="io" rot="R180"/> +<pin name="VSS_16" x="53.34" y="-187.96" length="middle" direction="io" rot="R180"/> +<pin name="USB_OTG1_VBUS" x="53.34" y="-190.5" length="middle" direction="io" rot="R180"/> +<pin name="USB_OTG2_DN" x="53.34" y="-193.04" length="middle" direction="io" rot="R180"/> +<pin name="VSS_17" x="53.34" y="-195.58" length="middle" direction="io" rot="R180"/> +<pin name="RTC_XTALI" x="53.34" y="-198.12" length="middle" direction="io" rot="R180"/> +<pin name="GPANAIO" x="53.34" y="-200.66" length="middle" direction="io" rot="R180"/> +<pin name="XTALO" x="53.34" y="-203.2" length="middle" direction="io" rot="R180"/> +<pin name="USB_OTG1_CHD_B" x="53.34" y="-205.74" length="middle" direction="io" rot="R180"/> +<pin name="CCM_CLK1_P" x="53.34" y="-208.28" length="middle" direction="io" rot="R180"/> +<pin name="VDDA_ADC_3P3" x="53.34" y="-210.82" length="middle" direction="io" rot="R180"/> +<pin name="VSS_18" x="53.34" y="-213.36" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_04" x="53.34" y="-215.9" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_08" x="53.34" y="-218.44" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_10" x="53.34" y="-220.98" length="middle" direction="io" rot="R180"/> +<pin name="GPIO_SD_B1_11" x="53.34" y="-223.52" length="middle" direction="io" rot="R180"/> +<pin name="USB_OTG2_VBUS" x="53.34" y="-226.06" length="middle" direction="io" rot="R180"/> +<pin name="USB_OTG2_DP" x="53.34" y="-228.6" length="middle" direction="io" rot="R180"/> +<pin name="VDD_HIGH_CAP" x="53.34" y="-231.14" length="middle" direction="io" rot="R180"/> +<pin name="RTC_XTALO" x="53.34" y="-233.68" length="middle" direction="io" rot="R180"/> +<pin name="NVCC_PLL" x="53.34" y="-236.22" length="middle" direction="io" rot="R180"/> +<pin name="XTALI" x="53.34" y="-238.76" length="middle" direction="io" rot="R180"/> +<pin name="VDD_HIGH_IN" x="53.34" y="-241.3" length="middle" direction="io" rot="R180"/> +<pin name="CCM_CLK1_N" x="53.34" y="-243.84" length="middle" direction="io" rot="R180"/> +<pin name="VSS_19" x="53.34" y="-246.38" length="middle" direction="io" rot="R180"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="MIMXRT1052DVL6B" prefix="IC"> +<description><b>Processors - Application Specialized MIMXRT1052DVL6B/LFBGA196///STANDARD MARKING * TRAY</b><p> +Source: <a href="http://www.nxp.com/docs/en/data-sheet/IMXRT1050CEC.pdf"> Datasheet </a></description> +<gates> +<gate name="G$1" symbol="MIMXRT1052DVL6B" x="0" y="0"/> +</gates> +<devices> +<device name="" package="BGA196C65P14X14_1000X1000X143"> +<connects> +<connect gate="G$1" pin="VSS_1" pad="A1"/> +<connect gate="G$1" pin="GPIO_EMC_27" pad="A2"/> +<connect gate="G$1" pin="GPIO_EMC_20" pad="A3"/> +<connect gate="G$1" pin="GPIO_EMC_17" pad="A4"/> +<connect gate="G$1" pin="GPIO_EMC_16" pad="A5"/> +<connect gate="G$1" pin="GPIO_EMC_13" pad="A6"/> +<connect gate="G$1" pin="GPIO_EMC_40" pad="A7"/> +<connect gate="G$1" pin="GPIO_B0_06" pad="A8"/> +<connect gate="G$1" pin="GPIO_B0_07" pad="A9"/> +<connect gate="G$1" pin="GPIO_B0_11" pad="A10"/> +<connect gate="G$1" pin="GPIO_B1_00" pad="A11"/> +<connect gate="G$1" pin="GPIO_B1_08" pad="A12"/> +<connect gate="G$1" pin="GPIO_B1_09" pad="A13"/> +<connect gate="G$1" pin="VSS_2" pad="A14"/> +<connect gate="G$1" pin="GPIO_EMC_15" pad="B1"/> +<connect gate="G$1" pin="GPIO_EMC_18" pad="B2"/> +<connect gate="G$1" pin="GPIO_EMC_26" pad="B3"/> +<connect gate="G$1" pin="GPIO_EMC_19" pad="B4"/> +<connect gate="G$1" pin="VSS_3" pad="B5"/> +<connect gate="G$1" pin="GPIO_EMC_14" pad="B6"/> +<connect gate="G$1" pin="GPIO_EMC_39" pad="B7"/> +<connect gate="G$1" pin="GPIO_B0_05" pad="B8"/> +<connect gate="G$1" pin="GPIO_B0_08" pad="B9"/> +<connect gate="G$1" pin="VSS_4" pad="B10"/> +<connect gate="G$1" pin="GPIO_B1_01" pad="B11"/> +<connect gate="G$1" pin="GPIO_B1_07" pad="B12"/> +<connect gate="G$1" pin="GPIO_B1_10" pad="B13"/> +<connect gate="G$1" pin="GPIO_B1_15" pad="B14"/> +<connect gate="G$1" pin="GPIO_EMC_21" pad="C1"/> +<connect gate="G$1" pin="GPIO_EMC_09" pad="C2"/> +<connect gate="G$1" pin="GPIO_EMC_36" pad="C3"/> +<connect gate="G$1" pin="GPIO_EMC_33" pad="C4"/> +<connect gate="G$1" pin="GPIO_EMC_31" pad="C5"/> +<connect gate="G$1" pin="GPIO_EMC_30" pad="C6"/> +<connect gate="G$1" pin="GPIO_EMC_41" pad="C7"/> +<connect gate="G$1" pin="GPIO_B0_04" pad="C8"/> +<connect gate="G$1" pin="GPIO_B0_09" pad="C9"/> +<connect gate="G$1" pin="GPIO_B0_12" pad="C10"/> +<connect gate="G$1" pin="GPIO_B1_02" pad="C11"/> +<connect gate="G$1" pin="GPIO_B1_06" pad="C12"/> +<connect gate="G$1" pin="GPIO_B1_11" pad="C13"/> +<connect gate="G$1" pin="GPIO_B1_14" pad="C14"/> +<connect gate="G$1" pin="GPIO_EMC_28" pad="D1"/> +<connect gate="G$1" pin="GPIO_EMC_25" pad="D2"/> +<connect gate="G$1" pin="GPIO_EMC_24" pad="D3"/> +<connect gate="G$1" pin="GPIO_EMC_34" pad="D4"/> +<connect gate="G$1" pin="GPIO_EMC_32" pad="D5"/> +<connect gate="G$1" pin="GPIO_EMC_38" pad="D6"/> +<connect gate="G$1" pin="GPIO_B0_00" pad="D7"/> +<connect gate="G$1" pin="GPIO_B0_03" pad="D8"/> +<connect gate="G$1" pin="GPIO_B0_10" pad="D9"/> +<connect gate="G$1" pin="GPIO_B0_13" pad="D10"/> +<connect gate="G$1" pin="GPIO_B1_03" pad="D11"/> +<connect gate="G$1" pin="GPIO_B1_05" pad="D12"/> +<connect gate="G$1" pin="GPIO_B1_12" pad="D13"/> +<connect gate="G$1" pin="GPIO_B1_13" pad="D14"/> +<connect gate="G$1" pin="GPIO_EMC_29" pad="E1"/> +<connect gate="G$1" pin="VSS_5" pad="E2"/> +<connect gate="G$1" pin="GPIO_EMC_00" pad="E3"/> +<connect gate="G$1" pin="GPIO_EMC_37" pad="E4"/> +<connect gate="G$1" pin="GPIO_EMC_35" pad="E5"/> +<connect gate="G$1" pin="NVCC_EMC_1" pad="E6"/> +<connect gate="G$1" pin="GPIO_B0_01" pad="E7"/> +<connect gate="G$1" pin="GPIO_B0_02" pad="E8"/> +<connect gate="G$1" pin="NVCC_GPIO_1" pad="E9"/> +<connect gate="G$1" pin="GPIO_B0_14" pad="E10"/> +<connect gate="G$1" pin="GPIO_B0_15" pad="E11"/> +<connect gate="G$1" pin="GPIO_B1_04" pad="E12"/> +<connect gate="G$1" pin="VSS_6" pad="E13"/> +<connect gate="G$1" pin="GPIO_AD_B0_06" pad="E14"/> +<connect gate="G$1" pin="GPIO_EMC_22" pad="F1"/> +<connect gate="G$1" pin="GPIO_EMC_04" pad="F2"/> +<connect gate="G$1" pin="GPIO_EMC_01" pad="F3"/> +<connect gate="G$1" pin="GPIO_EMC_02" pad="F4"/> +<connect gate="G$1" pin="NVCC_EMC_2" pad="F5"/> +<connect gate="G$1" pin="VDD_SOC_IN_1" pad="F6"/> +<connect gate="G$1" pin="VDD_SOC_IN_2" pad="F7"/> +<connect gate="G$1" pin="VDD_SOC_IN_3" pad="F8"/> +<connect gate="G$1" pin="VDD_SOC_IN_4" pad="F9"/> +<connect gate="G$1" pin="NVCC_GPIO_2" pad="F10"/> +<connect gate="G$1" pin="GPIO_AD_B0_04" pad="F11"/> +<connect gate="G$1" pin="GPIO_AD_B0_07" pad="F12"/> +<connect gate="G$1" pin="GPIO_AD_B0_08" pad="F13"/> +<connect gate="G$1" pin="GPIO_AD_B0_09" pad="F14"/> +<connect gate="G$1" pin="GPIO_EMC_10" pad="G1"/> +<connect gate="G$1" pin="GPIO_EMC_23" pad="G2"/> +<connect gate="G$1" pin="GPIO_EMC_11" pad="G3"/> +<connect gate="G$1" pin="GPIO_EMC_03" pad="G4"/> +<connect gate="G$1" pin="GPIO_EMC_05" pad="G5"/> +<connect gate="G$1" pin="VDD_SOC_IN_5" pad="G6"/> +<connect gate="G$1" pin="VSS_7" pad="G7"/> +<connect gate="G$1" pin="VSS_8" pad="G8"/> +<connect gate="G$1" pin="VDD_SOC_IN_6" pad="G9"/> +<connect gate="G$1" pin="GPIO_AD_B0_11" pad="G10"/> +<connect gate="G$1" pin="GPIO_AD_B0_03" pad="G11"/> +<connect gate="G$1" pin="GPIO_AD_B1_14" pad="G12"/> +<connect gate="G$1" pin="GPIO_AD_B0_10" pad="G13"/> +<connect gate="G$1" pin="GPIO_AD_B0_05" pad="G14"/> +<connect gate="G$1" pin="GPIO_EMC_12" pad="H1"/> +<connect gate="G$1" pin="GPIO_SD_B0_04" pad="H2"/> +<connect gate="G$1" pin="GPIO_EMC_08" pad="H3"/> +<connect gate="G$1" pin="GPIO_EMC_07" pad="H4"/> +<connect gate="G$1" pin="GPIO_EMC_06" pad="H5"/> +<connect gate="G$1" pin="VDD_SOC_IN_7" pad="H6"/> +<connect gate="G$1" pin="VSS_9" pad="H7"/> +<connect gate="G$1" pin="VSS_10" pad="H8"/> +<connect gate="G$1" pin="VDD_SOC_IN_8" pad="H9"/> +<connect gate="G$1" pin="GPIO_AD_B0_01" pad="H10"/> +<connect gate="G$1" pin="GPIO_AD_B1_13" pad="H11"/> +<connect gate="G$1" pin="GPIO_AD_B1_12" pad="H12"/> +<connect gate="G$1" pin="GPIO_AD_B1_08" pad="H13"/> +<connect gate="G$1" pin="GPIO_AD_B0_14" pad="H14"/> +<connect gate="G$1" pin="GPIO_SD_B0_02" pad="J1"/> +<connect gate="G$1" pin="GPIO_SD_B0_05" pad="J2"/> +<connect gate="G$1" pin="GPIO_SD_B0_01" pad="J3"/> +<connect gate="G$1" pin="GPIO_SD_B0_00" pad="J4"/> +<connect gate="G$1" pin="DCDC_SENSE" pad="J5"/> +<connect gate="G$1" pin="NVCC_SD0" pad="J6"/> +<connect gate="G$1" pin="VSS_11" pad="J7"/> +<connect gate="G$1" pin="VSS_12" pad="J8"/> +<connect gate="G$1" pin="VDD_SOC_IN_9" pad="J9"/> +<connect gate="G$1" pin="NVCC_GPIO_3" pad="J10"/> +<connect gate="G$1" pin="GPIO_AD_B1_00" pad="J11"/> +<connect gate="G$1" pin="GPIO_AD_B1_06" pad="J12"/> +<connect gate="G$1" pin="GPIO_AD_B1_11" pad="J13"/> +<connect gate="G$1" pin="GPIO_AD_B1_15" pad="J14"/> +<connect gate="G$1" pin="GPIO_SD_B0_03" pad="K1"/> +<connect gate="G$1" pin="VSS_13" pad="K2"/> +<connect gate="G$1" pin="DCDC_PSWITCH" pad="K3"/> +<connect gate="G$1" pin="DCDC_IN_Q" pad="K4"/> +<connect gate="G$1" pin="NVCC_SD1" pad="K5"/> +<connect gate="G$1" pin="TEST_MODE" pad="K6"/> +<connect gate="G$1" pin="PMIC_ON_REQ" pad="K7"/> +<connect gate="G$1" pin="VDD_USB_CAP" pad="K8"/> +<connect gate="G$1" pin="NGND_KEL0" pad="K9"/> +<connect gate="G$1" pin="GPIO_AD_B1_07" pad="K10"/> +<connect gate="G$1" pin="GPIO_AD_B1_01" pad="K11"/> +<connect gate="G$1" pin="GPIO_AD_B1_05" pad="K12"/> +<connect gate="G$1" pin="VSS_14" pad="K13"/> +<connect gate="G$1" pin="GPIO_AD_B0_12" pad="K14"/> +<connect gate="G$1" pin="DCDC_IN_1" pad="L1"/> +<connect gate="G$1" pin="DCDC_IN_2" pad="L2"/> +<connect gate="G$1" pin="GPIO_SD_B1_06" pad="L3"/> +<connect gate="G$1" pin="GPIO_SD_B1_07" pad="L4"/> +<connect gate="G$1" pin="GPIO_SD_B1_00" pad="L5"/> +<connect gate="G$1" pin="WAKEUP" pad="L6"/> +<connect gate="G$1" pin="PMIC_STBY_REQ" pad="L7"/> +<connect gate="G$1" pin="USB_OTG1_DP" pad="L8"/> +<connect gate="G$1" pin="VSS_15" pad="L9"/> +<connect gate="G$1" pin="GPIO_AD_B0_15" pad="L10"/> +<connect gate="G$1" pin="GPIO_AD_B1_02" pad="L11"/> +<connect gate="G$1" pin="GPIO_AD_B1_04" pad="L12"/> +<connect gate="G$1" pin="GPIO_AD_B1_10" pad="L13"/> +<connect gate="G$1" pin="GPIO_AD_B0_13" pad="L14"/> +<connect gate="G$1" pin="DCDC_LP_1" pad="M1"/> +<connect gate="G$1" pin="DCDC_LP_2" pad="M2"/> +<connect gate="G$1" pin="GPIO_SD_B1_02" pad="M3"/> +<connect gate="G$1" pin="GPIO_SD_B1_03" pad="M4"/> +<connect gate="G$1" pin="GPIO_SD_B1_01" pad="M5"/> +<connect gate="G$1" pin="ONOFF" pad="M6"/> +<connect gate="G$1" pin="POR_B" pad="M7"/> +<connect gate="G$1" pin="USB_OTG1_DN" pad="M8"/> +<connect gate="G$1" pin="VDD_SNVS_IN" pad="M9"/> +<connect gate="G$1" pin="VDD_SNVS_CAP" pad="M10"/> +<connect gate="G$1" pin="GPIO_AD_B0_02" pad="M11"/> +<connect gate="G$1" pin="GPIO_AD_B1_03" pad="M12"/> +<connect gate="G$1" pin="GPIO_AD_B1_09" pad="M13"/> +<connect gate="G$1" pin="GPIO_AD_B0_00" pad="M14"/> +<connect gate="G$1" pin="DCDC_GND_1" pad="N1"/> +<connect gate="G$1" pin="DCDC_GND_2" pad="N2"/> +<connect gate="G$1" pin="GPIO_SD_B1_05" pad="N3"/> +<connect gate="G$1" pin="GPIO_SD_B1_09" pad="N4"/> +<connect gate="G$1" pin="VSS_16" pad="N5"/> +<connect gate="G$1" pin="USB_OTG1_VBUS" pad="N6"/> +<connect gate="G$1" pin="USB_OTG2_DN" pad="N7"/> +<connect gate="G$1" pin="VSS_17" pad="N8"/> +<connect gate="G$1" pin="RTC_XTALI" pad="N9"/> +<connect gate="G$1" pin="GPANAIO" pad="N10"/> +<connect gate="G$1" pin="XTALO" pad="N11"/> +<connect gate="G$1" pin="USB_OTG1_CHD_B" pad="N12"/> +<connect gate="G$1" pin="CCM_CLK1_P" pad="N13"/> +<connect gate="G$1" pin="VDDA_ADC_3P3" pad="N14"/> +<connect gate="G$1" pin="VSS_18" pad="P1"/> +<connect gate="G$1" pin="GPIO_SD_B1_04" pad="P2"/> +<connect gate="G$1" pin="GPIO_SD_B1_08" pad="P3"/> +<connect gate="G$1" pin="GPIO_SD_B1_10" pad="P4"/> +<connect gate="G$1" pin="GPIO_SD_B1_11" pad="P5"/> +<connect gate="G$1" pin="USB_OTG2_VBUS" pad="P6"/> +<connect gate="G$1" pin="USB_OTG2_DP" pad="P7"/> +<connect gate="G$1" pin="VDD_HIGH_CAP" pad="P8"/> +<connect gate="G$1" pin="RTC_XTALO" pad="P9"/> +<connect gate="G$1" pin="NVCC_PLL" pad="P10"/> +<connect gate="G$1" pin="XTALI" pad="P11"/> +<connect gate="G$1" pin="VDD_HIGH_IN" pad="P12"/> +<connect gate="G$1" pin="CCM_CLK1_N" pad="P13"/> +<connect gate="G$1" pin="VSS_19" pad="P14"/> +</connects> +<technologies> +<technology name=""> +<attribute name="Mouser_Part_Number" value="771-MIMXRT1052DVL6B" constant="no"/> +<attribute name="Mouser_Price-Stock" value="https://www.mouser.co.uk/ProductDetail/NXP-Semiconductors/MIMXRT1052DVL6B?qs=r5DSvlrkXmLhWvqckzJtSg%3D%3D" constant="no"/> +<attribute name="Manufacturer_Name" value="NXP" constant="no"/> +<attribute name="Manufacturer_Part_Number" value="MIMXRT1052DVL6B" constant="no"/> +<attribute name="Description" value="Processors - Application Specialized MIMXRT1052DVL6B/LFBGA196///STANDARD MARKING * TRAY" constant="no"/> +<attribute name="Height" value="1.43mm" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> |
