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| author | Abel Tim <atim@main.home> | 2024-07-22 12:18:26 +0200 |
|---|---|---|
| committer | Abel Tim <atim@main.home> | 2024-07-22 12:18:26 +0200 |
| commit | caf8e05494fac2bfa96e1f410b4c444b139b6480 (patch) | |
| tree | 8a2f8c74305b584d417cbd94f59d965309ac4e9e /pcb_boven/openmv/openmv-boards-master/shields/proto/proto.sch | |
| parent | e9c9842ad005309c30964d11e251ed514123ade2 (diff) | |
| download | robotica-caf8e05494fac2bfa96e1f410b4c444b139b6480.tar.gz robotica-caf8e05494fac2bfa96e1f410b4c444b139b6480.zip | |
change folder struct
Diffstat (limited to 'pcb_boven/openmv/openmv-boards-master/shields/proto/proto.sch')
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/shields/proto/proto.sch | 680 |
1 files changed, 0 insertions, 680 deletions
diff --git a/pcb_boven/openmv/openmv-boards-master/shields/proto/proto.sch b/pcb_boven/openmv/openmv-boards-master/shields/proto/proto.sch deleted file mode 100644 index 1e0f516..0000000 --- a/pcb_boven/openmv/openmv-boards-master/shields/proto/proto.sch +++ /dev/null @@ -1,680 +0,0 @@ -<?xml version="1.0" encoding="utf-8"?> -<!DOCTYPE eagle SYSTEM "eagle.dtd"> -<eagle version="6.1"> -<drawing> -<settings> -<setting alwaysvectorfont="no"/> -<setting verticaltext="up"/> -</settings> -<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> -<layers> -<layer number="1" name="Top" color="4" fill="1" visible="no" active="no"/> -<layer number="2" name="Route2" color="1" fill="1" visible="no" active="no"/> -<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/> -<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/> -<layer number="5" name="Route5" color="4" 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-<libraries> -<library name="sfe"> -<packages> -</packages> -<symbols> -<symbol name="3.3V"> -<wire x1="0.762" y1="1.27" x2="0" y2="2.54" width="0.254" layer="94"/> -<wire x1="0" y1="2.54" x2="-0.762" y2="1.27" width="0.254" layer="94"/> -<text x="-1.016" y="3.556" size="1.778" layer="96">>VALUE</text> -<pin name="3.3V" x="0" y="0" visible="off" length="short" direction="sup" rot="R90"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="3.3V" prefix="P+"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="G$1" symbol="3.3V" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="frames"> -<description><b>Frames for Sheet and Layout</b></description> -<packages> -</packages> -<symbols> -<symbol name="DINA3_L"> -<frame x1="0" y1="0" x2="388.62" y2="264.16" columns="4" rows="4" layer="94" border-left="no" border-top="no" border-right="no" border-bottom="no"/> -</symbol> -<symbol name="DOCFIELD"> -<wire x1="0" y1="0" x2="71.12" y2="0" width="0.1016" layer="94"/> -<wire x1="101.6" y1="15.24" x2="87.63" y2="15.24" width="0.1016" layer="94"/> -<wire x1="0" y1="0" x2="0" y2="5.08" width="0.1016" layer="94"/> -<wire x1="0" y1="5.08" x2="71.12" y2="5.08" width="0.1016" layer="94"/> -<wire x1="0" y1="5.08" x2="0" y2="15.24" width="0.1016" layer="94"/> -<wire x1="101.6" y1="15.24" x2="101.6" y2="5.08" width="0.1016" layer="94"/> -<wire x1="71.12" y1="5.08" x2="71.12" y2="0" width="0.1016" layer="94"/> -<wire x1="71.12" y1="5.08" x2="87.63" y2="5.08" width="0.1016" layer="94"/> -<wire x1="71.12" y1="0" x2="101.6" y2="0" width="0.1016" layer="94"/> -<wire x1="87.63" y1="15.24" x2="87.63" y2="5.08" width="0.1016" layer="94"/> -<wire x1="87.63" y1="15.24" x2="0" y2="15.24" width="0.1016" layer="94"/> -<wire x1="87.63" y1="5.08" x2="101.6" y2="5.08" width="0.1016" layer="94"/> -<wire x1="101.6" y1="5.08" x2="101.6" y2="0" width="0.1016" layer="94"/> -<wire x1="0" y1="15.24" x2="0" y2="22.86" width="0.1016" layer="94"/> -<wire x1="101.6" y1="35.56" x2="0" y2="35.56" width="0.1016" layer="94"/> -<wire x1="101.6" y1="35.56" x2="101.6" y2="22.86" width="0.1016" layer="94"/> -<wire x1="0" y1="22.86" x2="101.6" y2="22.86" width="0.1016" layer="94"/> -<wire x1="0" y1="22.86" x2="0" y2="35.56" width="0.1016" layer="94"/> -<wire x1="101.6" y1="22.86" x2="101.6" y2="15.24" width="0.1016" layer="94"/> -<text x="1.27" y="1.27" size="2.54" layer="94" font="vector">Date:</text> -<text x="12.7" y="1.27" size="2.54" layer="94" font="vector">>LAST_DATE_TIME</text> -<text x="72.39" y="1.27" size="2.54" layer="94" font="vector">Sheet:</text> -<text x="86.36" y="1.27" size="2.54" layer="94" font="vector">>SHEET</text> -<text x="88.9" y="11.43" size="2.54" layer="94" font="vector">REV:</text> -<text x="1.27" y="19.05" size="2.54" layer="94" font="vector">TITLE:</text> -<text x="1.27" y="11.43" size="2.54" layer="94" font="vector">Document Number:</text> -<text x="17.78" y="19.05" size="2.54" layer="94" font="vector">>DRAWING_NAME</text> -</symbol> -</symbols> -<devicesets> -<deviceset name="DINA3_L" prefix="FRAME" uservalue="yes"> -<description><b>FRAME</b><p> -DIN A3, landscape with extra doc field</description> -<gates> -<gate name="G$1" symbol="DINA3_L" x="0" y="0"/> -<gate name="G$2" symbol="DOCFIELD" x="287.02" y="0" addlevel="must"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="supply1"> -<description><b>Supply Symbols</b><p> - GND, VCC, 0V, +5V, -5V, etc.<p> - Please keep in mind, that these devices are necessary for the - automatic wiring of the supply signals.<p> - The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> - In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> - <author>Created by librarian@cadsoft.de</author></description> -<packages> -</packages> -<symbols> -<symbol name="GND"> -<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> -<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="GND" prefix="GND"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="1" symbol="GND" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="openmv"> -<packages> -<package name="OPENMV3"> -<text x="0" y="44.958" size="1.27" layer="49" ratio="10">>NAME</text> -<text x="28.829" y="-1.778" size="1.27" layer="27">>VALUE</text> -<wire x1="0" y1="0" x2="0" y2="26.67" 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x2="35.56" y2="26.67" width="0.127" layer="49"/> -</package> -</packages> -<symbols> -<symbol name="OPENMV3"> -<wire x1="-12.7" y1="12.7" x2="12.7" y2="12.7" width="0.254" layer="94"/> -<wire x1="12.7" y1="12.7" x2="12.7" y2="-17.78" width="0.254" layer="94"/> -<wire x1="12.7" y1="-17.78" x2="-12.7" y2="-17.78" width="0.254" layer="94"/> -<wire x1="-12.7" y1="-17.78" x2="-12.7" y2="12.7" width="0.254" layer="94"/> -<pin name="VIN" x="-17.78" y="7.62" length="middle" direction="sup"/> -<pin name="GND" x="-17.78" y="-15.24" length="middle" direction="pwr"/> -<pin name="MISO" x="17.78" y="5.08" length="middle" rot="R180"/> -<pin name="MOSI" x="17.78" y="2.54" length="middle" rot="R180"/> -<pin name="SCLK" x="17.78" y="7.62" length="middle" rot="R180"/> -<pin name="SSEL" x="17.78" y="10.16" length="middle" rot="R180"/> -<text x="-12.7" y="12.7" size="1.778" layer="95">>NAME</text> -<text x="2.54" y="-20.32" size="1.778" layer="96">>VALUE</text> -<pin name="3.3V" x="-17.78" y="10.16" length="middle" direction="sup"/> -<pin name="PWM1" x="17.78" y="-2.54" length="middle" rot="R180"/> -<pin name="PWM2" x="17.78" y="-5.08" length="middle" rot="R180"/> -<pin name="TXD/SCL" x="17.78" y="-10.16" length="middle" rot="R180"/> -<pin name="RXD/SDA" x="17.78" y="-12.7" length="middle" rot="R180"/> -<pin name="ADC/DAC" x="17.78" y="-15.24" length="middle" rot="R180"/> -<pin name="SWC" x="-17.78" y="2.54" length="middle"/> -<pin name="SWD" x="-17.78" y="0" length="middle"/> -<pin name="RESET" x="-17.78" y="-2.54" length="middle"/> -<pin name="BOOT" x="-17.78" y="-5.08" length="middle"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="OPENMV3"> -<gates> -<gate name="G$1" symbol="OPENMV3" x="0" y="0"/> -</gates> -<devices> -<device name="" package="OPENMV3"> -<connects> -<connect gate="G$1" pin="3.3V" pad="18"/> -<connect gate="G$1" pin="ADC/DAC" pad="17"/> -<connect gate="G$1" pin="BOOT" pad="23"/> -<connect gate="G$1" pin="GND" pad="28"/> -<connect gate="G$1" pin="MISO" pad="12"/> -<connect gate="G$1" pin="MOSI" pad="11"/> -<connect gate="G$1" pin="PWM1" pad="26"/> -<connect gate="G$1" pin="PWM2" pad="25"/> -<connect gate="G$1" pin="RESET" pad="24"/> -<connect gate="G$1" pin="RXD/SDA" pad="16"/> -<connect gate="G$1" pin="SCLK" pad="13"/> -<connect gate="G$1" pin="SSEL" pad="14"/> -<connect gate="G$1" pin="SWC" pad="21"/> -<connect gate="G$1" pin="SWD" pad="22"/> -<connect gate="G$1" pin="TXD/SCL" pad="15"/> -<connect gate="G$1" pin="VIN" pad="27"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -</libraries> -<attributes> -</attributes> -<variantdefs> -</variantdefs> -<classes> -<class number="0" name="default" width="0" drill="0"> -</class> -<class number="1" name="vcc" width="1.016" drill="0"> -<clearance class="1" value="0.2032"/> -</class> -<class number="2" name="antenna" width="0.36321875" drill="0"> -<clearance class="2" value="0.3048"/> -</class> -<class number="3" name="1.8v" width="0.4572" drill="0"> -<clearance class="3" value="0.254"/> -</class> -</classes> -<parts> -<part name="FRAME1" library="frames" deviceset="DINA3_L" device=""/> -<part name="GND4" library="supply1" deviceset="GND" device=""/> -<part name="U$2" library="openmv" deviceset="OPENMV3" device=""/> -<part name="P+4" library="sfe" deviceset="3.3V" device=""/> -</parts> -<sheets> -<sheet> -<plain> -<wire x1="302.26" y1="127" x2="302.26" y2="0" width="0.1524" layer="94"/> -<wire x1="302.26" y1="0" x2="0" y2="0" width="0.1524" layer="94"/> -<text x="2.54" y="15.24" size="3.81" layer="150">Copyright (c) 2013 Ibrahim Abd Elkader <i.abdalkader@gmail.com></text> -<text x="2.54" y="10.16" size="3.81" layer="150">This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 License.</text> -<text x="2.54" y="5.08" size="3.81" layer="150">To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/</text> -<text x="294.64" y="7.62" size="2.54" layer="94" ratio="12">2</text> -<wire x1="302.26" y1="127" x2="0" y2="127" width="0.1524" layer="94"/> -<wire x1="0" y1="127" x2="0" y2="0" width="0.1524" layer="94"/> -</plain> -<instances> -<instance part="FRAME1" gate="G$2" x="200.66" y="0"/> -<instance part="GND4" gate="1" x="104.14" y="45.72"/> -<instance part="U$2" gate="G$1" x="132.08" y="73.66"/> -<instance part="P+4" gate="G$1" x="104.14" y="93.98"/> -</instances> -<busses> -</busses> -<nets> -<net name="GND" class="0"> -<segment> -<wire x1="114.3" y1="58.42" x2="104.14" y2="58.42" width="0.1524" layer="91"/> -<pinref part="GND4" gate="1" pin="GND"/> -<wire x1="104.14" y1="58.42" x2="104.14" y2="48.26" width="0.1524" layer="91"/> -<pinref part="U$2" gate="G$1" pin="GND"/> -</segment> -</net> -<net name="SDA" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="RXD/SDA"/> -<wire x1="149.86" y1="60.96" x2="162.56" y2="60.96" width="0.1524" layer="91"/> -<label x="152.4" y="60.96" size="1.778" layer="95"/> -</segment> -</net> -<net name="SCL" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="TXD/SCL"/> -<wire x1="149.86" y1="63.5" x2="162.56" y2="63.5" width="0.1524" layer="91"/> -<label x="152.4" y="63.5" size="1.778" layer="95"/> -</segment> -</net> -<net name="3.3V" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="3.3V"/> -<wire x1="114.3" y1="83.82" x2="104.14" y2="83.82" width="0.1524" layer="91"/> -<wire x1="104.14" y1="83.82" x2="104.14" y2="93.98" width="0.1524" layer="91"/> -<pinref part="P+4" gate="G$1" pin="3.3V"/> -</segment> -</net> -<net name="SSEL" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="SSEL"/> -<wire x1="149.86" y1="83.82" x2="162.56" y2="83.82" width="0.1524" layer="91"/> -<label x="152.4" y="83.82" size="1.778" layer="95"/> -</segment> -</net> -<net name="SCLK" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="SCLK"/> -<wire x1="149.86" y1="81.28" x2="162.56" y2="81.28" width="0.1524" layer="91"/> -<label x="152.4" y="81.28" size="1.778" layer="95"/> -</segment> -</net> -<net name="MISO" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="MISO"/> -<wire x1="149.86" y1="78.74" x2="162.56" y2="78.74" width="0.1524" layer="91"/> -<label x="152.4" y="78.74" size="1.778" layer="95"/> -</segment> -</net> -<net name="MOSI" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="MOSI"/> -<wire x1="149.86" y1="76.2" x2="162.56" y2="76.2" width="0.1524" layer="91"/> -<label x="152.4" y="76.2" size="1.778" layer="95"/> -</segment> -</net> -<net name="PWM1" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="PWM1"/> -<wire x1="149.86" y1="71.12" x2="162.56" y2="71.12" width="0.1524" layer="91"/> -<label x="152.4" y="71.12" size="1.778" layer="95"/> -</segment> -</net> -<net name="PWM2" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="PWM2"/> -<wire x1="149.86" y1="68.58" x2="162.56" y2="68.58" width="0.1524" layer="91"/> -<label x="152.4" y="68.58" size="1.778" layer="95"/> -</segment> -</net> -<net name="SWC" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="SWC"/> -<wire x1="114.3" y1="76.2" x2="104.14" y2="76.2" width="0.1524" layer="91"/> -<label x="104.14" y="76.2" size="1.778" layer="95"/> -</segment> -</net> -<net name="VIN" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="VIN"/> -<wire x1="114.3" y1="81.28" x2="104.14" y2="81.28" width="0.1524" layer="91"/> -<label x="104.14" y="81.28" size="1.778" layer="95"/> -</segment> -</net> -<net name="SWD" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="SWD"/> -<wire x1="114.3" y1="73.66" x2="104.14" y2="73.66" width="0.1524" layer="91"/> -<label x="104.14" y="73.66" size="1.778" layer="95"/> -</segment> -</net> -<net name="RESET" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="RESET"/> -<wire x1="114.3" y1="71.12" x2="104.14" y2="71.12" width="0.1524" layer="91"/> -<label x="104.14" y="71.12" size="1.778" layer="95"/> -</segment> -</net> -<net name="BOOT" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="BOOT"/> -<wire x1="114.3" y1="68.58" x2="104.14" y2="68.58" width="0.1524" layer="91"/> -<label x="104.14" y="68.58" size="1.778" layer="95"/> -</segment> -</net> -<net name="DAC" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="ADC/DAC"/> -<wire x1="149.86" y1="58.42" x2="162.56" y2="58.42" width="0.1524" layer="91"/> -<label x="152.4" y="58.42" size="1.778" layer="95"/> -</segment> -</net> -</nets> -</sheet> -</sheets> -</schematic> -</drawing> -</eagle> |
