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| author | Abel Tim <atim@main.home> | 2024-07-22 12:18:26 +0200 |
|---|---|---|
| committer | Abel Tim <atim@main.home> | 2024-07-22 12:18:26 +0200 |
| commit | caf8e05494fac2bfa96e1f410b4c444b139b6480 (patch) | |
| tree | 8a2f8c74305b584d417cbd94f59d965309ac4e9e /pcb_boven/openmv/openmv-boards-master/shields/thermal | |
| parent | e9c9842ad005309c30964d11e251ed514123ade2 (diff) | |
| download | robotica-caf8e05494fac2bfa96e1f410b4c444b139b6480.tar.gz robotica-caf8e05494fac2bfa96e1f410b4c444b139b6480.zip | |
change folder struct
Diffstat (limited to 'pcb_boven/openmv/openmv-boards-master/shields/thermal')
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/shields/thermal/thermal.brd | 3563 | ||||
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/shields/thermal/thermal.pdf | bin | 20266 -> 0 bytes | |||
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/shields/thermal/thermal.sch | 1490 |
3 files changed, 0 insertions, 5053 deletions
diff --git a/pcb_boven/openmv/openmv-boards-master/shields/thermal/thermal.brd b/pcb_boven/openmv/openmv-boards-master/shields/thermal/thermal.brd deleted file mode 100644 index 0ff697c..0000000 --- a/pcb_boven/openmv/openmv-boards-master/shields/thermal/thermal.brd +++ /dev/null @@ -1,3563 +0,0 @@ -<?xml version="1.0" encoding="utf-8"?> -<!DOCTYPE eagle SYSTEM "eagle.dtd"> -<eagle version="6.1"> -<drawing> -<settings> -<setting alwaysvectorfont="no"/> -<setting verticaltext="up"/> -</settings> -<grid distance="5" unitdist="mil" unit="mil" style="lines" multiple="1" display="yes" altdistance="2.5" altunitdist="mil" altunit="mil"/> -<layers> -<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> -<layer number="2" name="Route2" color="1" fill="1" visible="no" active="no"/> -<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/> -<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/> -<layer number="5" name="Route5" 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-</classes> -<designrules> -<description language="de"><b>EAGLE Design Rules</b> -<p> -Die Standard-Design-Rules sind so gewählt, dass sie für -die meisten Anwendungen passen. Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab.</description> -<description language="en"><b>Laen's PCB Order Design Rules</b> -<p> -Please make sure your boards conform to these design rules.</description> -<param name="layerSetup" value="(1*16)"/> -<param name="mtCopper" value="0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm 0.0356mm"/> -<param name="mtIsolate" value="1.5011mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm 0.1499mm 0.2007mm"/> -<param name="mdWireWire" value="6mil"/> -<param name="mdWirePad" value="6mil"/> -<param name="mdWireVia" value="6mil"/> -<param name="mdPadPad" value="6mil"/> -<param name="mdPadVia" value="6mil"/> -<param name="mdViaVia" value="6mil"/> -<param name="mdSmdPad" value="6mil"/> -<param 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value="20mil"/> -<param name="rlMinViaOuter" value="7mil"/> -<param name="rlMaxViaOuter" value="20mil"/> -<param name="rlMinViaInner" value="7mil"/> -<param name="rlMaxViaInner" value="20mil"/> -<param name="rlMinMicroViaOuter" value="4mil"/> -<param name="rlMaxMicroViaOuter" value="20mil"/> -<param name="rlMinMicroViaInner" value="4mil"/> -<param name="rlMaxMicroViaInner" value="20mil"/> -<param name="psTop" value="-1"/> -<param name="psBottom" value="-1"/> -<param name="psFirst" value="-1"/> -<param name="psElongationLong" value="100"/> -<param name="psElongationOffset" value="100"/> -<param name="mvStopFrame" value="1"/> -<param name="mvCreamFrame" value="0"/> -<param name="mlMinStopFrame" value="3mil"/> -<param name="mlMaxStopFrame" value="4mil"/> -<param name="mlMinCreamFrame" value="0mil"/> -<param name="mlMaxCreamFrame" value="0mil"/> -<param name="mlViaStopLimit" value="30mil"/> -<param name="srRoundness" value="0"/> -<param name="srMinRoundness" value="0mil"/> -<param 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-<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0402-CAP" package="0402-CAP"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH1" package="CAP-PTH-5MM"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="_" package="AXIAL-5MM"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="1210" package="1210"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="1206" package="1206"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="ASMD" package="CTZ3"> -<connects> -<connect gate="G$1" pin="1" pad="+"/> -<connect gate="G$1" pin="2" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="VCC" prefix="P+"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="1" symbol="VCC2" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="RESISTOR" prefix="R" uservalue="yes"> -<description><b>Resistor</b> -Basic schematic elements and footprints for 0603, 1206, and PTH resistors.</description> -<gates> -<gate name="G$1" symbol="RESISTOR" x="0" y="0"/> -</gates> -<devices> -<device name="1206" package="1206"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="AXIAL-0.3" package="AXIAL-0.3"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="2010" package="R2010"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0805-RES" package="0805"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0603-RES" package="0603-RES"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0402-RES" package="0402-RES"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1/6W" package="1/6W-RES"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="2512" package="R2512"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1/4W" package="AXIAL-0.4"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1/2W" package="AXIAL-0.5"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1W" package="AXIAL-0.6"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-2W" package="AXIAL-0.8"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="3.3V" prefix="P+"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="G$1" symbol="3.3V" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="frames"> -<description><b>Frames for Sheet and Layout</b></description> -<packages> -</packages> -<symbols> -<symbol name="DINA3_L"> -<frame x1="0" y1="0" x2="388.62" y2="264.16" columns="4" rows="4" layer="94" border-left="no" border-top="no" border-right="no" border-bottom="no"/> -</symbol> -<symbol name="DOCFIELD"> -<wire x1="0" y1="0" x2="71.12" y2="0" width="0.1016" layer="94"/> -<wire x1="101.6" y1="15.24" x2="87.63" y2="15.24" width="0.1016" layer="94"/> -<wire x1="0" y1="0" x2="0" y2="5.08" width="0.1016" layer="94"/> -<wire x1="0" y1="5.08" x2="71.12" y2="5.08" width="0.1016" layer="94"/> -<wire x1="0" y1="5.08" x2="0" y2="15.24" width="0.1016" layer="94"/> -<wire x1="101.6" y1="15.24" x2="101.6" y2="5.08" width="0.1016" layer="94"/> -<wire x1="71.12" y1="5.08" x2="71.12" y2="0" width="0.1016" layer="94"/> -<wire x1="71.12" y1="5.08" x2="87.63" y2="5.08" width="0.1016" layer="94"/> -<wire x1="71.12" y1="0" x2="101.6" y2="0" width="0.1016" layer="94"/> -<wire x1="87.63" y1="15.24" x2="87.63" y2="5.08" width="0.1016" layer="94"/> -<wire x1="87.63" y1="15.24" x2="0" y2="15.24" width="0.1016" layer="94"/> -<wire x1="87.63" y1="5.08" x2="101.6" y2="5.08" width="0.1016" layer="94"/> -<wire x1="101.6" y1="5.08" x2="101.6" y2="0" width="0.1016" layer="94"/> -<wire x1="0" y1="15.24" x2="0" y2="22.86" width="0.1016" layer="94"/> -<wire x1="101.6" y1="35.56" x2="0" y2="35.56" width="0.1016" layer="94"/> -<wire x1="101.6" y1="35.56" x2="101.6" y2="22.86" width="0.1016" layer="94"/> -<wire x1="0" y1="22.86" x2="101.6" y2="22.86" width="0.1016" layer="94"/> -<wire x1="0" y1="22.86" x2="0" y2="35.56" width="0.1016" layer="94"/> -<wire x1="101.6" y1="22.86" x2="101.6" y2="15.24" width="0.1016" layer="94"/> -<text x="1.27" y="1.27" size="2.54" layer="94" font="vector">Date:</text> -<text x="12.7" y="1.27" size="2.54" layer="94" font="vector">>LAST_DATE_TIME</text> -<text x="72.39" y="1.27" size="2.54" layer="94" font="vector">Sheet:</text> -<text x="86.36" y="1.27" size="2.54" layer="94" font="vector">>SHEET</text> -<text x="88.9" y="11.43" size="2.54" layer="94" font="vector">REV:</text> -<text x="1.27" y="19.05" size="2.54" layer="94" font="vector">TITLE:</text> -<text x="1.27" y="11.43" size="2.54" layer="94" font="vector">Document Number:</text> -<text x="17.78" y="19.05" size="2.54" layer="94" font="vector">>DRAWING_NAME</text> -</symbol> -</symbols> -<devicesets> -<deviceset name="DINA3_L" prefix="FRAME" uservalue="yes"> -<description><b>FRAME</b><p> -DIN A3, landscape with extra doc field</description> -<gates> -<gate name="G$1" symbol="DINA3_L" x="0" y="0"/> -<gate name="G$2" symbol="DOCFIELD" x="287.02" y="0" addlevel="must"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="supply1"> -<description><b>Supply Symbols</b><p> - GND, VCC, 0V, +5V, -5V, etc.<p> - Please keep in mind, that these devices are necessary for the - automatic wiring of the supply signals.<p> - The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> - In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> - <author>Created by librarian@cadsoft.de</author></description> -<packages> -</packages> -<symbols> -<symbol name="GND"> -<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> -<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="GND" prefix="GND"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="1" symbol="GND" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="openmv"> -<packages> -<package name="OPENMV3"> -<text x="0" y="44.958" size="1.27" layer="49" ratio="10">>NAME</text> -<text x="28.829" y="-1.778" size="1.27" layer="27">>VALUE</text> -<wire x1="0" y1="0" x2="0" y2="26.67" width="0.127" layer="49"/> -<wire x1="0" y1="26.67" x2="0" y2="44.45" width="0.127" layer="49"/> -<wire x1="0" y1="44.45" x2="35.56" y2="44.45" width="0.127" layer="49"/> -<wire x1="35.56" y1="44.45" x2="35.56" y2="26.67" width="0.127" layer="49"/> -<wire x1="35.56" y1="26.67" x2="35.56" y2="0" width="0.127" layer="49"/> -<wire x1="35.56" y1="0" x2="0" y2="0" width="0.127" layer="49"/> -<wire x1="3.302" y1="44.069" x2="3.302" y2="43.815" width="0.0508" layer="49"/> -<wire x1="3.302" y1="38.481" x2="3.302" y2="38.227" width="0.0508" layer="49"/> -<circle x="3.302" y="41.148" radius="2.921" width="0.1524" layer="49"/> -<circle x="3.302" y="41.148" radius="1.5" width="0.2032" layer="49"/> -<wire x1="32.258" y1="44.069" x2="32.258" y2="43.815" width="0.0508" layer="49"/> -<wire x1="32.258" y1="38.481" x2="32.258" y2="38.227" width="0.0508" layer="49"/> -<circle x="32.258" y="41.148" radius="2.921" width="0.1524" layer="49"/> -<circle x="32.258" y="41.148" radius="1.5" width="0.2032" layer="49"/> -<wire x1="9.78" y1="27.941" x2="9.78" y2="33.964" width="0.127" layer="49"/> -<wire x1="9.78" y1="33.964" x2="9.78" y2="37.918" width="0.127" layer="49"/> -<wire x1="9.78" y1="37.918" x2="9.78" y2="43.941" width="0.127" layer="49"/> -<wire x1="9.78" y1="43.941" x2="25.78" y2="43.941" width="0.127" layer="49"/> -<wire x1="25.78" y1="43.941" x2="25.78" y2="37.918" width="0.127" layer="49"/> -<wire x1="25.78" y1="37.918" x2="25.78" y2="33.964" width="0.127" layer="49"/> -<wire x1="25.78" y1="33.964" x2="25.78" y2="27.941" width="0.127" layer="49"/> -<wire x1="25.78" y1="27.941" x2="9.78" y2="27.941" width="0.127" layer="49"/> -<wire x1="9.78" y1="33.964" x2="9.78" y2="37.918" width="0.127" layer="49" curve="-270"/> -<wire x1="25.78" y1="37.918" x2="25.78" y2="33.964" width="0.127" layer="49" curve="-270"/> -<wire x1="10.78" y1="28.941" x2="24.78" y2="28.941" width="0.127" layer="49"/> -<wire x1="24.78" y1="28.941" x2="24.78" y2="42.941" width="0.127" layer="49"/> -<wire x1="24.78" y1="42.941" x2="10.78" y2="42.941" width="0.127" layer="49"/> -<wire x1="10.78" y1="42.941" x2="10.78" y2="28.941" width="0.127" layer="49"/> -<wire x1="1.016" y1="20.574" x2="0.381" y2="19.939" width="0.2032" layer="21"/> -<wire x1="0.381" y1="18.669" x2="1.016" y2="18.034" width="0.2032" layer="21"/> -<wire x1="1.016" y1="18.034" x2="0.381" y2="17.399" width="0.2032" layer="21"/> -<wire x1="0.381" y1="16.129" x2="1.016" y2="15.494" width="0.2032" layer="21"/> -<wire x1="1.016" y1="15.494" x2="0.381" y2="14.859" width="0.2032" layer="21"/> -<wire x1="0.381" y1="11.049" x2="1.016" y2="10.414" width="0.2032" layer="21"/> -<wire x1="1.016" y1="20.574" x2="2.286" y2="20.574" width="0.2032" layer="21"/> -<wire x1="2.286" y1="20.574" x2="2.921" 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rot="R180"/> -<pin name="SSEL" x="17.78" y="10.16" length="middle" rot="R180"/> -<text x="-12.7" y="12.7" size="1.778" layer="95">>NAME</text> -<text x="2.54" y="-20.32" size="1.778" layer="96">>VALUE</text> -<pin name="3.3V" x="-17.78" y="10.16" length="middle" direction="sup"/> -<pin name="PWM1" x="17.78" y="-2.54" length="middle" rot="R180"/> -<pin name="PWM2" x="17.78" y="-5.08" length="middle" rot="R180"/> -<pin name="TXD/SCL" x="17.78" y="-10.16" length="middle" rot="R180"/> -<pin name="RXD/SDA" x="17.78" y="-12.7" length="middle" rot="R180"/> -<pin name="ADC/DAC" x="17.78" y="-15.24" length="middle" rot="R180"/> -<pin name="SWC" x="-17.78" y="2.54" length="middle"/> -<pin name="SWD" x="-17.78" y="0" length="middle"/> -<pin name="RESET" x="-17.78" y="-2.54" length="middle"/> -<pin name="BOOT" x="-17.78" y="-5.08" length="middle"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="OPENMV3"> -<gates> -<gate name="G$1" symbol="OPENMV3" x="0" y="0"/> -</gates> -<devices> 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pad="4"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -</libraries> -<attributes> -</attributes> -<variantdefs> -</variantdefs> -<classes> -<class number="0" name="default" width="0" drill="0"> -</class> -<class number="1" name="vcc" width="1.016" drill="0"> -<clearance class="1" value="0.2032"/> -</class> -<class number="2" name="antenna" width="0.36321875" drill="0"> -<clearance class="2" value="0.3048"/> -</class> -<class number="3" name="1.8v" width="0.4572" drill="0"> -<clearance class="3" value="0.254"/> -</class> -</classes> -<parts> -<part name="FRAME1" library="frames" deviceset="DINA3_L" device=""/> -<part name="U3" library="SparkFun" deviceset="V_REG_LDO" device="SMD" value="2.6v"/> -<part name="GND1" library="SparkFun" deviceset="GND" device=""/> -<part name="GND9" library="SparkFun" deviceset="GND" device=""/> -<part name="GND10" library="SparkFun" deviceset="GND" device=""/> -<part name="C3" library="sfe" deviceset="CAP" device="0603-CAP" value="4.7uF"/> -<part name="C5" library="sfe" deviceset="CAP" device="0603-CAP" value="4.7uF"/> -<part name="P+5" library="sfe" deviceset="VCC" device=""/> -<part name="GND4" library="supply1" deviceset="GND" device=""/> -<part name="R2" library="sfe" deviceset="RESISTOR" device="0603-RES" value="10K"/> -<part name="U1" library="MLX90620" deviceset="MLX90620" device="" value="MLX9062x"/> -<part name="C1" library="sfe" deviceset="CAP" device="0603-CAP" value="0.1uF"/> -<part name="C2" library="sfe" deviceset="CAP" device="0603-CAP" value="0.01uF"/> -<part name="P+3" library="sfe" deviceset="VCC" device=""/> -<part name="GND2" library="SparkFun" deviceset="GND" device=""/> -<part name="R1" library="sfe" deviceset="RESISTOR" device="0603-RES" value="10K"/> -<part name="U$2" library="openmv" deviceset="OPENMV3" device=""/> -<part name="P+4" library="sfe" deviceset="3.3V" device=""/> -<part name="P+1" library="sfe" deviceset="3.3V" device=""/> -<part name="P+6" library="sfe" deviceset="3.3V" device=""/> -<part name="P+7" library="sfe" deviceset="3.3V" device=""/> -</parts> -<sheets> -<sheet> -<plain> -<wire x1="302.26" y1="127" x2="302.26" y2="0" width="0.1524" layer="94"/> -<wire x1="302.26" y1="0" x2="0" y2="0" width="0.1524" layer="94"/> -<text x="2.54" y="15.24" size="3.81" layer="150">Copyright (c) 2013 Ibrahim Abd Elkader <i.abdalkader@gmail.com></text> -<text x="2.54" y="10.16" size="3.81" layer="150">This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 License.</text> -<text x="2.54" y="5.08" size="3.81" layer="150">To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/</text> -<text x="294.64" y="7.62" size="2.54" layer="94" ratio="12">2</text> -<wire x1="302.26" y1="127" x2="0" y2="127" width="0.1524" layer="94"/> -<wire x1="0" y1="127" x2="0" y2="0" width="0.1524" layer="94"/> -</plain> -<instances> -<instance part="FRAME1" gate="G$2" x="200.66" y="0"/> -<instance part="U3" gate="G$1" x="134.62" y="76.2"/> -<instance part="GND1" gate="1" x="116.84" y="63.5"/> -<instance part="GND9" gate="1" x="147.32" y="63.5"/> -<instance part="GND10" gate="1" x="111.76" y="63.5"/> -<instance part="C3" gate="G$1" x="111.76" y="71.12"/> -<instance part="C5" gate="G$1" x="147.32" y="71.12"/> -<instance part="P+5" gate="1" x="147.32" y="88.9"/> -<instance part="GND4" gate="1" x="187.96" y="48.26"/> -<instance part="R2" gate="G$1" x="93.98" y="76.2" smashed="yes" rot="MR270"> -<attribute name="NAME" x="93.7514" y="73.025" size="1.016" layer="95" rot="MR270"/> -<attribute name="VALUE" x="94.488" y="78.74" size="1.016" layer="96" rot="MR90"/> -</instance> -<instance part="U1" gate="G$1" x="68.58" y="66.04"/> -<instance part="C1" gate="G$1" x="48.26" y="66.04"/> -<instance part="C2" gate="G$1" x="40.64" y="66.04"/> -<instance part="P+3" gate="1" x="40.64" y="86.36"/> -<instance part="GND2" gate="1" x="40.64" y="50.8"/> -<instance part="R1" gate="G$1" x="88.9" y="76.2" smashed="yes" rot="MR270"> -<attribute name="NAME" x="88.6714" y="73.025" size="1.016" layer="95" rot="MR270"/> -<attribute name="VALUE" x="89.408" y="78.74" size="1.016" layer="96" rot="MR90"/> -</instance> -<instance part="U$2" gate="G$1" x="215.9" y="76.2"/> -<instance part="P+4" gate="G$1" x="187.96" y="96.52"/> -<instance part="P+1" gate="G$1" x="93.98" y="86.36"/> -<instance part="P+6" gate="G$1" x="88.9" y="86.36"/> -<instance part="P+7" gate="G$1" x="111.76" y="88.9"/> -</instances> -<busses> -</busses> -<nets> -<net name="GND" class="0"> -<segment> -<wire x1="116.84" y1="66.04" x2="116.84" y2="76.2" width="0.1524" layer="91"/> -<wire x1="116.84" y1="76.2" x2="124.46" y2="76.2" width="0.1524" layer="91"/> -<pinref part="GND1" gate="1" pin="GND"/> -<pinref part="U3" gate="G$1" pin="GND"/> -</segment> -<segment> -<pinref part="C3" gate="G$1" pin="2"/> -<pinref part="GND10" gate="1" pin="GND"/> -<wire x1="111.76" y1="68.58" x2="111.76" y2="66.04" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="C5" gate="G$1" pin="2"/> -<pinref part="GND9" gate="1" pin="GND"/> -<wire x1="147.32" y1="68.58" x2="147.32" y2="66.04" width="0.1524" layer="91"/> -</segment> -<segment> -<wire x1="198.12" y1="60.96" x2="187.96" y2="60.96" width="0.1524" layer="91"/> -<pinref part="GND4" gate="1" pin="GND"/> -<wire x1="187.96" y1="60.96" x2="187.96" y2="50.8" width="0.1524" layer="91"/> -<pinref part="U$2" gate="G$1" pin="GND"/> -</segment> -<segment> -<pinref part="U1" gate="G$1" pin="VSS"/> -<wire x1="58.42" y1="63.5" x2="55.88" y2="63.5" width="0.1524" layer="91"/> -<wire x1="55.88" y1="63.5" x2="55.88" y2="60.96" width="0.1524" layer="91"/> -<pinref part="C2" gate="G$1" pin="2"/> -<wire x1="48.26" y1="60.96" x2="40.64" y2="60.96" width="0.1524" layer="91"/> -<wire x1="40.64" y1="60.96" x2="40.64" y2="63.5" width="0.1524" layer="91"/> -<pinref part="C1" gate="G$1" pin="2"/> -<wire x1="48.26" y1="63.5" x2="48.26" y2="60.96" width="0.1524" layer="91"/> -<wire x1="40.64" y1="60.96" x2="40.64" y2="53.34" width="0.1524" layer="91"/> -<junction x="40.64" y="60.96"/> -<pinref part="GND2" gate="1" pin="GND"/> -<wire x1="55.88" y1="60.96" x2="48.26" y2="60.96" width="0.1524" layer="91"/> -<junction x="48.26" y="60.96"/> -</segment> -</net> -<net name="VCC" class="0"> -<segment> -<pinref part="U3" gate="G$1" pin="OUT"/> -<wire x1="142.24" y1="81.28" x2="147.32" y2="81.28" width="0.1524" layer="91"/> -<wire x1="147.32" y1="81.28" x2="147.32" y2="88.9" width="0.1524" layer="91"/> -<pinref part="C5" gate="G$1" pin="1"/> -<wire x1="147.32" y1="81.28" x2="147.32" y2="76.2" width="0.1524" layer="91"/> -<junction x="147.32" y="81.28"/> -<pinref part="P+5" gate="1" pin="VCC"/> -</segment> -<segment> -<pinref part="U1" gate="G$1" pin="VDD"/> -<pinref part="C1" gate="G$1" pin="1"/> -<wire x1="58.42" y1="68.58" x2="55.88" y2="68.58" width="0.1524" layer="91"/> -<wire x1="55.88" y1="68.58" x2="55.88" y2="73.66" width="0.1524" layer="91"/> -<wire x1="55.88" y1="73.66" x2="48.26" y2="73.66" width="0.1524" layer="91"/> -<wire x1="48.26" y1="73.66" x2="48.26" y2="71.12" width="0.1524" layer="91"/> -<pinref part="C2" gate="G$1" pin="1"/> -<wire x1="48.26" y1="73.66" x2="40.64" y2="73.66" width="0.1524" layer="91"/> -<wire x1="40.64" y1="73.66" x2="40.64" y2="71.12" width="0.1524" layer="91"/> -<wire x1="40.64" y1="73.66" x2="40.64" y2="86.36" width="0.1524" layer="91"/> -<junction x="40.64" y="73.66"/> -<junction x="48.26" y="73.66"/> -<pinref part="P+3" gate="1" pin="VCC"/> -</segment> -</net> -<net name="SDA" class="0"> -<segment> -<pinref part="U1" gate="G$1" pin="SDA"/> -<wire x1="78.74" y1="63.5" x2="93.98" y2="63.5" width="0.1524" layer="91"/> -<label x="81.28" y="63.5" size="1.778" layer="95"/> -<pinref part="R2" gate="G$1" pin="2"/> -<wire x1="93.98" y1="63.5" x2="93.98" y2="71.12" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="U$2" gate="G$1" pin="RXD/SDA"/> -<wire x1="233.68" y1="63.5" x2="243.84" y2="63.5" width="0.1524" layer="91"/> -<label x="236.22" y="63.5" size="1.778" layer="95"/> -</segment> -</net> -<net name="SCL" class="0"> -<segment> -<pinref part="U1" gate="G$1" pin="SCL"/> -<wire x1="78.74" y1="68.58" x2="88.9" y2="68.58" width="0.1524" layer="91"/> -<label x="81.28" y="68.58" size="1.778" layer="95"/> -<pinref part="R1" gate="G$1" pin="2"/> -<wire x1="88.9" y1="68.58" x2="88.9" y2="71.12" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="U$2" gate="G$1" pin="TXD/SCL"/> -<wire x1="233.68" y1="66.04" x2="243.84" y2="66.04" width="0.1524" layer="91"/> -<label x="236.22" y="66.04" size="1.778" layer="95"/> -</segment> -</net> -<net name="3.3V" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="3.3V"/> -<wire x1="198.12" y1="86.36" x2="187.96" y2="86.36" width="0.1524" layer="91"/> -<wire x1="187.96" y1="86.36" x2="187.96" y2="96.52" width="0.1524" layer="91"/> -<pinref part="P+4" gate="G$1" pin="3.3V"/> -</segment> -<segment> -<pinref part="R1" gate="G$1" pin="1"/> -<wire x1="88.9" y1="81.28" x2="88.9" y2="86.36" width="0.1524" layer="91"/> -<pinref part="P+6" gate="G$1" pin="3.3V"/> -</segment> -<segment> -<pinref part="R2" gate="G$1" pin="1"/> -<wire x1="93.98" y1="81.28" x2="93.98" y2="86.36" width="0.1524" layer="91"/> -<pinref part="P+1" gate="G$1" pin="3.3V"/> -</segment> -<segment> -<wire x1="111.76" y1="81.28" x2="111.76" y2="88.9" width="0.1524" layer="91"/> -<wire x1="111.76" y1="81.28" x2="121.92" y2="81.28" width="0.1524" layer="91"/> -<pinref part="U3" gate="G$1" pin="IN"/> -<pinref part="U3" gate="G$1" pin="EN"/> -<wire x1="121.92" y1="81.28" x2="124.46" y2="81.28" width="0.1524" layer="91"/> -<wire x1="124.46" y1="71.12" x2="121.92" y2="71.12" width="0.1524" layer="91"/> -<wire x1="121.92" y1="71.12" x2="121.92" y2="81.28" width="0.1524" layer="91"/> -<wire x1="111.76" y1="81.28" x2="111.76" y2="76.2" width="0.1524" layer="91"/> -<pinref part="C3" gate="G$1" pin="1"/> -<junction x="111.76" y="81.28"/> -<junction x="121.92" y="81.28"/> -<pinref part="P+7" gate="G$1" pin="3.3V"/> -</segment> -</net> -</nets> -</sheet> -</sheets> -</schematic> -</drawing> -</eagle> |