diff options
Diffstat (limited to 'pcb_boven/openmv/openmv-boards-master/openmv-mp')
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.DSN | bin | 0 -> 595456 bytes | |||
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.pdf | bin | 0 -> 237570 bytes | |||
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.sch | 9996 |
3 files changed, 9996 insertions, 0 deletions
diff --git a/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.DSN b/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.DSN Binary files differnew file mode 100644 index 0000000..895e653 --- /dev/null +++ b/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.DSN diff --git a/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.pdf b/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.pdf Binary files differnew file mode 100644 index 0000000..db27763 --- /dev/null +++ b/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.pdf diff --git a/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.sch b/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.sch new file mode 100644 index 0000000..11ea177 --- /dev/null +++ b/pcb_boven/openmv/openmv-boards-master/openmv-mp/openmv-mp.sch @@ -0,0 +1,9996 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="9.1.2"> +<drawing> +<settings> +<setting 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+<pin name="RED" x="-10.16" y="0" visible="pin" length="short"/> +</symbol> +<symbol name="INDUCTOR"> +<wire x1="0" y1="2.54" x2="1.27" y2="1.27" width="0.254" layer="94" curve="-90" cap="flat"/> +<wire x1="0" y1="0" x2="1.27" y2="1.27" width="0.254" layer="94" curve="90" cap="flat"/> +<wire x1="0" y1="0" x2="1.27" y2="-1.27" width="0.254" layer="94" curve="-90" cap="flat"/> +<wire x1="0" y1="-2.54" x2="1.27" y2="-1.27" width="0.254" layer="94" curve="90" cap="flat"/> +<wire x1="0" y1="-2.54" x2="1.27" y2="-3.81" width="0.254" layer="94" curve="-90" cap="flat"/> +<wire x1="0" y1="-5.08" x2="1.27" y2="-3.81" width="0.254" layer="94" curve="90" cap="flat"/> +<text x="2.54" y="5.08" size="1.778" layer="95" font="vector">>NAME</text> +<text x="2.54" y="-5.08" size="1.778" layer="96" font="vector">>VALUE</text> +<pin name="1" x="0" y="5.08" visible="off" length="short" direction="pas" swaplevel="1" rot="R270"/> +<pin name="2" x="0" y="-7.62" visible="off" length="short" direction="pas" swaplevel="1" rot="R90"/> +</symbol> +<symbol name="LED"> +<wire x1="1.27" y1="0" x2="0" y2="-2.54" width="0.254" layer="94"/> +<wire x1="0" y1="-2.54" x2="-1.27" y2="0" width="0.254" layer="94"/> +<wire x1="1.27" y1="-2.54" x2="0" y2="-2.54" width="0.254" layer="94"/> +<wire x1="0" y1="-2.54" x2="-1.27" y2="-2.54" width="0.254" layer="94"/> +<wire x1="1.27" y1="0" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="0" y2="-2.54" width="0.1524" layer="94"/> +<wire x1="-2.032" y1="-0.762" x2="-3.429" y2="-2.159" width="0.1524" layer="94"/> +<wire x1="-1.905" y1="-1.905" x2="-3.302" y2="-3.302" width="0.1524" layer="94"/> +<text x="3.556" y="-4.572" size="1.778" layer="95" rot="R90">>NAME</text> +<text x="5.715" y="-4.572" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="C" x="0" y="-5.08" visible="off" length="short" direction="pas" rot="R90"/> +<pin name="A" x="0" y="2.54" visible="off" length="short" direction="pas" rot="R270"/> +<polygon width="0.1524" layer="94"> +<vertex x="-3.429" y="-2.159"/> +<vertex x="-3.048" y="-1.27"/> +<vertex x="-2.54" y="-1.778"/> +</polygon> +<polygon width="0.1524" layer="94"> +<vertex x="-3.302" y="-3.302"/> +<vertex x="-2.921" y="-2.413"/> +<vertex x="-2.413" y="-2.921"/> +</polygon> +</symbol> +<symbol name="SJ"> +<wire x1="0.381" y1="0.635" x2="0.381" y2="-0.635" width="1.27" layer="94" curve="-180" cap="flat"/> +<wire x1="-0.381" y1="-0.635" x2="-0.381" y2="0.635" width="1.27" layer="94" curve="-180" cap="flat"/> +<wire x1="2.54" y1="0" x2="1.651" y2="0" width="0.1524" layer="94"/> +<wire x1="-2.54" y1="0" x2="-1.651" y2="0" width="0.1524" layer="94"/> +<text x="-2.54" y="2.54" size="1.778" layer="95">>NAME</text> +<pin name="2" x="5.08" y="0" visible="off" length="short" direction="pas" swaplevel="1" rot="R180"/> +<pin name="1" x="-5.08" y="0" visible="off" length="short" direction="pas" swaplevel="1"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="GND" prefix="GND"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="1" symbol="GND" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="CAP" prefix="C" uservalue="yes"> +<description><b>Capacitor</b> +Standard 0603 ceramic capacitor, and 0.1" leaded capacitor.</description> +<gates> +<gate name="G$1" symbol="CAP" x="0" y="0"/> +</gates> +<devices> +<device name="PTH" package="CAP-PTH-SMALL"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH2" package="CAP-PTH-SMALL2"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0805" package="0805"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH3" package="CAP-PTH-LARGE"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="SMD" package="GRM43D"> +<connects> +<connect gate="G$1" pin="1" pad="A"/> +<connect gate="G$1" pin="2" pad="C"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0603-CAP" package="0603-CAP"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0402-CAP" package="0402-CAP"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH1" package="CAP-PTH-5MM"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_" package="AXIAL-5MM"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1210" package="1210"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1206" package="1206"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="ASMD" package="CTZ3"> +<connects> +<connect gate="G$1" pin="1" pad="+"/> +<connect gate="G$1" pin="2" pad="-"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0201-CAP" package="C0201"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="RESISTOR" prefix="R" uservalue="yes"> +<description><b>Resistor</b> +Basic schematic elements and footprints for 0603, 1206, and PTH resistors.</description> +<gates> +<gate name="G$1" symbol="RESISTOR" x="0" y="0"/> +</gates> +<devices> +<device name="1206" package="1206"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="AXIAL-0.3" package="AXIAL-0.3"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="2010" package="R2010"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0805-RES" package="0805"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0603-RES" package="0603-RES"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0402-RES" package="0402-RES"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH-1/6W" package="1/6W-RES"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="2512" package="R2512"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH-1/4W" package="AXIAL-0.4"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH-1/2W" package="AXIAL-0.5"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH-1W" package="AXIAL-0.6"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH-2W" package="AXIAL-0.8"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0201-RES" package="R0201"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="MOSFET-NCHANNEL" prefix="Q"> +<gates> +<gate name="G$1" symbol="MOSFET-NCHANNEL" x="0" y="0"/> +</gates> +<devices> +<device name="SMD" package="SOT23-3"> +<connects> +<connect gate="G$1" pin="D" pad="3"/> +<connect gate="G$1" pin="G" pad="1"/> +<connect gate="G$1" pin="S" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PTH" package="TO-92"> +<connects> +<connect gate="G$1" pin="D" pad="1"/> +<connect gate="G$1" pin="G" pad="3"/> +<connect gate="G$1" pin="S" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="FDD8580" package="DPAK"> +<connects> +<connect gate="G$1" pin="D" pad="4"/> +<connect gate="G$1" pin="G" pad="1"/> +<connect gate="G$1" pin="S" pad="3"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="LED-TRICOLOR" prefix="LED"> +<description><b>Tri-Color LED SMD</b> +Proven layout and schematic for triple color LED in SMD package - common anode. Spark Fun Electronics SKU : COM-07844</description> +<gates> +<gate name="G$1" symbol="LED-TRICOLORSMD" x="0" y="2.54"/> +</gates> +<devices> +<device name="SFE" package="LED-TRICOLOR-SMD"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="BLU" pad="B"/> +<connect gate="G$1" pin="GRN" pad="G"/> +<connect gate="G$1" pin="RED" pad="R"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="" package="LED-TRICOLOR-SMD-MF"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="BLU" pad="B"/> +<connect gate="G$1" pin="GRN" pad="G"/> +<connect gate="G$1" pin="RED" pad="R"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="INDUCTOR" prefix="L" uservalue="yes"> +<description><b>Inductors</b> +Basic Inductor/Choke - 0603 and 1206. Footprints are not proven and vary greatly between part numbers.</description> +<gates> +<gate name="G$1" symbol="INDUCTOR" x="0" y="0"/> +</gates> +<devices> +<device name="H*" package="INDUCTOR-1206"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name="1206"/> +</technologies> +</device> +<device name="0603" package="0603"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="CR54" package="CR54"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="PWR" package="CDRH125"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0402" package="C0402"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-B82462G" package="B82462G"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="CR75" package="CR75"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1210" package="1210"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1007" package="1007"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="_" package="COOPER_UP4B"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-" package="CDRH3D28"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0805" package="0805"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="CR75_V2" package="CR75_V2"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="." package="CDRH2D09"> +<connects> +<connect gate="G$1" pin="1" pad="P$1"/> +<connect gate="G$1" pin="2" pad="P$2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0202" package="C0201"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="LED" prefix="LED" uservalue="yes"> +<description><b>LEDs</b> +Standard schematic elements and footprints for 5mm, 3mm, 1206, and 0603 sized LEDs. 5mm - Spark Fun Electronics SKU : COM-00529 (and others)</description> +<gates> +<gate name="G$1" symbol="LED" x="0" y="0"/> +</gates> +<devices> +<device name="5MM" package="LED5MM"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="C" pad="K"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="3MM" package="LED3MM"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="C" pad="K"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="1206" package="LED-1206"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="C" pad="C"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0603" package="LED-0603"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="C" pad="C"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="10MM" package="LED10MM"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="C" pad="C"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-FKIT-1206" package="FKIT-LED-1206"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="C" pad="C"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="-3MM-NO_SILK" package="LED3MM-NS"> +<connects> +<connect gate="G$1" pin="A" pad="A"/> +<connect gate="G$1" pin="C" pad="K"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="SOLDERJUMPER" prefix="SJ"> +<description><b>Solder Jumper</b> +Standard SMD solder jumper. Used to automate production. Two varients : Normally Open and Normally Closed are the same, but have different paste layers. NC will have a large amount of paste and should jumper during reflow.</description> +<gates> +<gate name="1" symbol="SJ" x="0" y="0"/> +</gates> +<devices> +<device name="NC" package="SJ_2S"> +<connects> +<connect gate="1" pin="1" pad="1"/> +<connect gate="1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="TRACE" package="SJ_2S-TRACE"> +<connects> +<connect gate="1" pin="1" pad="1"/> +<connect gate="1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="NC2" package="SJ_2S-NOTRACE"> +<connects> +<connect gate="1" pin="1" pad="1"/> +<connect gate="1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="NO" package="SJ_2S-NO"> +<connects> +<connect gate="1" pin="1" pad="1"/> +<connect gate="1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> 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+<pin name="PH15" x="55.88" y="101.6" length="middle" rot="R180"/> +<pin name="PI0" x="55.88" y="91.44" length="middle" rot="R180"/> +<pin name="PI1" x="55.88" y="88.9" length="middle" rot="R180"/> +<pin name="PI2" x="55.88" y="86.36" length="middle" rot="R180"/> +<pin name="PI3" x="55.88" y="83.82" length="middle" rot="R180"/> +<pin name="PI4" x="55.88" y="81.28" length="middle" rot="R180"/> +<pin name="PI5" x="55.88" y="78.74" length="middle" rot="R180"/> +<pin name="PI6" x="55.88" y="76.2" length="middle" rot="R180"/> +<pin name="PI7" x="55.88" y="73.66" length="middle" rot="R180"/> +<pin name="PI8" x="55.88" y="71.12" length="middle" rot="R180"/> +<pin name="PI9" x="55.88" y="68.58" length="middle" rot="R180"/> +<pin name="PI10" x="55.88" y="66.04" length="middle" rot="R180"/> +<pin name="PI11" x="55.88" y="63.5" length="middle" rot="R180"/> +<pin name="PZ0" x="55.88" y="43.18" length="middle" rot="R180"/> +<pin name="PZ1" x="55.88" y="40.64" length="middle" rot="R180"/> +<pin name="PZ2" x="55.88" y="38.1" length="middle" rot="R180"/> +<pin name="PZ3" x="55.88" y="35.56" length="middle" rot="R180"/> +<pin name="PZ4/PMIC_SCL" x="55.88" y="33.02" length="middle" rot="R180"/> +<pin name="PZ5/PMIC_SDA" x="55.88" y="30.48" length="middle" rot="R180"/> +<pin name="PZ6" x="55.88" y="27.94" length="middle" rot="R180"/> +<pin name="PZ7" x="55.88" y="25.4" length="middle" rot="R180"/> +</symbol> +<symbol name="OSD32MP15X-LOGICAL-E"> +<wire x1="0" y1="96.52" x2="50.8" y2="96.52" width="0.254" layer="94"/> +<wire x1="50.8" y1="96.52" x2="50.8" y2="0" width="0.254" layer="94"/> +<wire x1="50.8" y1="0" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="0" y2="96.52" width="0.254" layer="94"/> +<text x="25.4" y="86.36" size="2.54" layer="94" align="bottom-center">SIP E</text> +<text x="0" y="99.06" size="1.778" layer="95" align="top-left">>NAME</text> +<text x="0" y="-2.54" size="1.778" layer="96">>VALUE</text> +<text x="27.94" y="12.7" size="1.778" layer="94" rot="R90">NOTE: Can use pours to connect VSS + pads instead of a via per pad.</text> +<pin name="VSS@1" x="-5.08" y="91.44" length="middle"/> +<pin name="VSS@2" x="-5.08" y="88.9" length="middle"/> +<pin name="VSS@3" x="-5.08" y="86.36" length="middle"/> +<pin name="VSS@4" x="-5.08" y="83.82" length="middle"/> +<pin name="VSS@5" x="-5.08" y="81.28" length="middle"/> +<pin name="VSS@6" x="-5.08" y="78.74" length="middle"/> +<pin name="VSS@7" x="-5.08" y="76.2" length="middle"/> +<pin name="VSS@8" x="-5.08" y="73.66" length="middle"/> +<pin name="VSS@9" x="-5.08" y="71.12" length="middle"/> +<pin name="VSS@10" x="-5.08" y="68.58" length="middle"/> +<pin name="VSS@11" x="-5.08" y="66.04" length="middle"/> +<pin name="VSS@12" x="-5.08" y="63.5" length="middle"/> +<pin name="VSS@13" x="-5.08" y="60.96" length="middle"/> +<pin name="VSS@14" x="-5.08" y="58.42" length="middle"/> +<pin name="VSS@15" x="-5.08" y="55.88" length="middle"/> +<pin name="VSS@16" x="-5.08" y="53.34" length="middle"/> +<pin name="VSS@17" x="-5.08" y="50.8" length="middle"/> +<pin name="VSS@18" x="-5.08" y="48.26" length="middle"/> +<pin name="VSS@19" x="-5.08" y="45.72" length="middle"/> +<pin name="VSS@20" x="-5.08" y="43.18" length="middle"/> +<pin name="VSS@21" x="-5.08" y="40.64" length="middle"/> +<pin name="VSS@22" x="-5.08" y="38.1" length="middle"/> +<pin name="VSS@23" x="-5.08" y="35.56" length="middle"/> +<pin name="VSS@24" x="-5.08" y="33.02" length="middle"/> +<pin name="VSS@25" x="-5.08" y="30.48" length="middle"/> +<pin name="VSS@26" x="-5.08" y="27.94" length="middle"/> +<pin name="VSS@27" x="-5.08" y="25.4" length="middle"/> +<pin name="VSS@28" x="-5.08" y="22.86" length="middle"/> +<pin name="VSS@29" x="-5.08" y="20.32" length="middle"/> +<pin name="VSS@30" x="-5.08" y="17.78" length="middle"/> +<pin name="VSS@31" x="-5.08" y="15.24" length="middle"/> +<pin name="VSS@32" x="-5.08" y="12.7" length="middle"/> +<pin name="VSS@33" x="-5.08" y="10.16" length="middle"/> +<pin name="VSS@34" x="-5.08" y="7.62" length="middle"/> +<pin name="VSS@35" x="-5.08" y="5.08" length="middle"/> +<pin name="VSS@36" x="55.88" y="91.44" length="middle" rot="R180"/> +<pin name="VSS@37" x="55.88" y="88.9" length="middle" rot="R180"/> +<pin name="VSS@38" x="55.88" y="86.36" length="middle" rot="R180"/> +<pin name="VSS@39" x="55.88" y="83.82" length="middle" rot="R180"/> +<pin name="VSS@40" x="55.88" y="81.28" length="middle" rot="R180"/> +<pin name="VSS@41" x="55.88" y="78.74" length="middle" rot="R180"/> +<pin name="VSS@42" x="55.88" y="76.2" length="middle" rot="R180"/> +<pin name="VSS@43" x="55.88" y="73.66" length="middle" rot="R180"/> +<pin name="VSS@44" x="55.88" y="71.12" length="middle" rot="R180"/> +<pin name="VSS@45" x="55.88" y="68.58" length="middle" rot="R180"/> +<pin name="VSS@46" x="55.88" y="66.04" length="middle" rot="R180"/> +<pin name="VSS@47" x="55.88" y="63.5" length="middle" rot="R180"/> +<pin name="VSS@48" x="55.88" y="60.96" length="middle" rot="R180"/> +<pin name="VSS@49" x="55.88" y="58.42" length="middle" rot="R180"/> +<pin name="VSS@50" x="55.88" y="55.88" length="middle" rot="R180"/> +<pin name="VSS@51" x="55.88" y="53.34" length="middle" rot="R180"/> +<pin name="VSS@52" x="55.88" y="50.8" length="middle" rot="R180"/> +<pin name="VSS@53" x="55.88" y="48.26" length="middle" rot="R180"/> +<pin name="VSS@54" x="55.88" y="45.72" length="middle" rot="R180"/> +<pin name="VSS@55" x="55.88" y="43.18" length="middle" rot="R180"/> +<pin name="VSS@56" x="55.88" y="40.64" length="middle" rot="R180"/> +<pin name="VSS@57" x="55.88" y="38.1" length="middle" rot="R180"/> +<pin name="VSS@58" x="55.88" y="35.56" length="middle" rot="R180"/> +<pin name="VSS@59" x="55.88" y="33.02" length="middle" rot="R180"/> +<pin name="VSS@60" x="55.88" y="30.48" length="middle" rot="R180"/> +<pin name="VSS@61" x="55.88" y="27.94" length="middle" rot="R180"/> +<pin name="VSS@62" x="55.88" y="25.4" length="middle" rot="R180"/> +<pin name="VSS@63" x="55.88" y="22.86" length="middle" rot="R180"/> +<pin name="VSS@64" x="55.88" y="20.32" length="middle" rot="R180"/> +<pin name="VSS@65" x="55.88" y="17.78" length="middle" rot="R180"/> +<pin name="VSS@66" x="55.88" y="15.24" length="middle" rot="R180"/> +<pin name="VSS@67" x="55.88" y="12.7" length="middle" rot="R180"/> +<pin name="VSS@68" x="55.88" y="10.16" length="middle" rot="R180"/> +<pin name="VSS@69" x="55.88" y="7.62" length="middle" rot="R180"/> +<pin name="VSS@70" x="55.88" y="5.08" length="middle" rot="R180"/> +</symbol> +<symbol name="OSD32MP15X-LOGICAL-F"> +<wire x1="0" y1="71.12" x2="50.8" y2="71.12" width="0.254" layer="94"/> +<wire x1="50.8" y1="71.12" x2="50.8" y2="40.64" width="0.254" layer="94"/> +<wire x1="50.8" y1="40.64" x2="50.8" y2="0" width="0.254" layer="94"/> +<wire x1="50.8" y1="0" x2="0" y2="0" width="0.254" layer="94"/> +<text x="25.4" y="66.04" size="2.54" layer="94" align="bottom-center">SIP F</text> +<text x="0" y="73.66" size="1.778" layer="95" align="top-left">>NAME</text> +<text x="0" y="-2.54" size="1.778" layer="96">>VALUE</text> +<text x="27.94" y="2.54" size="1.778" layer="94" rot="MR180" align="top-left">Do Not Use + +Test Point per +signal +recommended</text> +<wire x1="0" y1="0" x2="0" y2="40.64" width="0.254" layer="94"/> +<pin name="VDD_CORE" x="-5.08" y="66.04" length="middle"/> +<pin name="VDD_DDR" x="-5.08" y="63.5" length="middle"/> +<pin name="VTT_DDR" x="-5.08" y="60.96" length="middle"/> +<pin name="VREF_DDR" x="-5.08" y="58.42" length="middle"/> +<pin name="VDDA1V1_REG" x="-5.08" y="50.8" length="middle"/> +<pin name="VDDA1V8_REG" x="-5.08" y="48.26" length="middle"/> +<pin name="VDD3V3_USB" x="-5.08" y="53.34" length="middle"/> +<pin name="VDD1V2_DSI_REG" x="-5.08" y="45.72" length="middle"/> +<pin name="NRST_CORE" x="-5.08" y="5.08" length="middle"/> +<pin name="PDR_ON_CORE" x="-5.08" y="10.16" length="middle"/> +<pin name="PDR_ON" x="-5.08" y="12.7" length="middle"/> +<pin name="PWR_LP" x="-5.08" y="15.24" length="middle"/> +<pin name="PWR_ON/PMIC_PWRCTRL" x="-5.08" y="20.32" length="middle"/> +<wire x1="0" y1="40.64" x2="0" y2="71.12" width="0.254" layer="94"/> +<wire x1="0" y1="40.64" x2="50.8" y2="40.64" width="0.254" layer="94"/> +<text x="27.94" y="43.18" size="1.778" layer="94" rot="MR180" align="top-left">Do Not Use + +Test Point per +signal +recommended</text> +<text x="22.86" y="58.42" size="1.778" layer="94" rot="MR180" align="top-left">Power Rails</text> +<text x="22.86" y="35.56" size="1.778" layer="94" rot="MR180" align="top-left">Processor Control</text> +<pin name="HSE_OSC_TP" x="-5.08" y="35.56" length="middle"/> +<pin name="PA0/PMIC_INTN" x="-5.08" y="25.4" length="middle"/> +<pin name="PC13/PMIC_WAKEUP" x="-5.08" y="22.86" length="middle"/> +<pin name="LSE_OSC_TP" x="-5.08" y="33.02" length="middle"/> +<pin name="RSVD" x="-5.08" y="30.48" length="middle"/> +</symbol> +<symbol name="OSD32MP15X-LOGICAL-G"> +<wire x1="0" y1="33.02" x2="50.8" y2="33.02" width="0.254" layer="94"/> +<wire x1="50.8" y1="33.02" x2="50.8" y2="0" width="0.254" layer="94"/> +<wire x1="50.8" y1="0" x2="0" y2="0" width="0.254" layer="94"/> +<text x="30.48" y="22.86" size="2.54" layer="94" align="bottom-center">SIP G</text> +<text x="0" y="35.56" size="1.778" layer="95" align="top-left">>NAME</text> +<text x="0" y="-2.54" size="1.778" layer="96">>VALUE</text> +<text x="20.32" y="10.16" size="1.778" layer="94">Do Not Connect</text> +<text x="17.78" y="15.24" size="1.778" layer="94">All pins reserved +for future use</text> +<pin name="RSVD@1" x="-5.08" y="27.94" length="middle"/> +<pin name="RSVD@2" x="-5.08" y="25.4" length="middle"/> +<pin name="RSVD@3" x="-5.08" y="22.86" length="middle"/> +<pin name="RSVD@4" x="-5.08" y="20.32" length="middle"/> +<pin name="RSVD@5" x="-5.08" y="17.78" length="middle"/> +<pin name="RSVD@6" x="-5.08" y="15.24" length="middle"/> +<pin name="RSVD@7" x="-5.08" y="12.7" length="middle"/> +<pin name="RSVD@8" x="-5.08" y="10.16" length="middle"/> +<pin name="RSVD@9" x="-5.08" y="7.62" length="middle"/> +<pin name="RSVD@10" x="-5.08" y="5.08" length="middle"/> +<wire x1="0" y1="0" x2="0" y2="33.02" width="0.254" layer="94"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="OSD32MP157C-512M-BAA" prefix="U"> +<description>Octavo Systems LLC OSD32MP15x Family SiP: 18mm x 18mm, 1mm pitch 302 pin BGA contains STM32MP157C, 512MB DDR3, STPMIC1A, 4kB EEPROM, MEMS oscillators (24MHz and 32kHz) and passives. Commerical Temperature (case): 0C to 85C.</description> +<gates> +<gate name="A" symbol="OSD32MP15X-LOGICAL-A" x="0" y="0"/> +<gate name="B" symbol="OSD32MP15X-LOGICAL-B" x="83.82" y="33.02"/> +<gate name="D" symbol="OSD32MP15X-LOGICAL-D" x="233.68" y="60.96"/> +<gate name="C" symbol="OSD32MP15X-LOGICAL-C" x="157.48" y="-15.24"/> +<gate name="E" symbol="OSD32MP15X-LOGICAL-E" x="233.68" y="-50.8"/> +<gate name="F" symbol="OSD32MP15X-LOGICAL-F" x="83.82" y="-50.8"/> +<gate name="G" symbol="OSD32MP15X-LOGICAL-G" x="5.08" y="-50.8"/> +</gates> +<devices> +<device name="" package="OSD32MP15X-BGA-324"> +<connects> +<connect gate="A" pin="BOOT0" pad="J6"/> +<connect gate="A" pin="BOOT1" pad="H6"/> +<connect gate="A" pin="BOOT2" pad="G6"/> +<connect gate="A" pin="BYPASS_REG1V8" pad="M10"/> +<connect gate="A" pin="EEPROM_WP" pad="P4"/> +<connect gate="A" pin="HSE_OSC_OE" pad="J1"/> +<connect gate="A" pin="NRST" pad="M3"/> +<connect gate="A" pin="PMIC_BSTIN@1" pad="L8"/> +<connect gate="A" pin="PMIC_BSTIN@2" pad="M8"/> +<connect gate="A" pin="PMIC_BSTIN@3" pad="L9"/> +<connect gate="A" pin="PMIC_BSTIN@4" pad="M9"/> +<connect gate="A" pin="PMIC_BSTOUT@1" pad="J8"/> +<connect gate="A" pin="PMIC_BSTOUT@2" pad="J9"/> +<connect gate="A" pin="PMIC_LDO1" pad="J4"/> +<connect gate="A" pin="PMIC_LDO2" pad="G4"/> +<connect gate="A" pin="PMIC_LDO25IN" pad="G3"/> +<connect gate="A" pin="PMIC_LDO5" pad="G8"/> +<connect gate="A" pin="PMIC_LDO6" pad="H4"/> +<connect gate="A" pin="PMIC_PONKEYN" pad="D3"/> +<connect gate="A" pin="PMIC_SWIN@1" pad="H8"/> +<connect gate="A" pin="PMIC_SWIN@2" pad="H9"/> +<connect gate="A" pin="PMIC_SWOUT@1" pad="G9"/> +<connect gate="A" pin="PMIC_SWOUT@2" pad="G10"/> +<connect gate="A" pin="PMIC_VBUSOTG" pad="K8"/> +<connect gate="A" pin="PMIC_VOUT4@1" pad="H3"/> +<connect gate="A" pin="PMIC_VOUT4@2" pad="J3"/> +<connect gate="A" pin="VBAT" pad="K3"/> +<connect gate="A" pin="VDD@1" pad="G7"/> +<connect gate="A" pin="VDD@2" pad="H7"/> +<connect gate="A" pin="VDD@3" pad="J7"/> +<connect gate="A" pin="VDD@4" pad="K7"/> +<connect gate="A" pin="VDD@5" pad="L7"/> +<connect gate="A" pin="VDD@6" pad="M7"/> +<connect gate="A" pin="VDD@7" pad="K4"/> +<connect gate="A" pin="VDD@8" pad="L4"/> +<connect gate="A" pin="VDD@9" pad="M4"/> +<connect gate="A" pin="VIN@1" pad="G1"/> +<connect gate="A" pin="VIN@2" pad="H1"/> +<connect gate="A" pin="VIN@3" pad="G2"/> +<connect gate="A" pin="VIN@4" pad="H2"/> +<connect gate="B" pin="PA1" pad="C16"/> +<connect gate="B" pin="PA10" pad="L16"/> +<connect gate="B" pin="PA11" pad="L17"/> +<connect gate="B" pin="PA12" pad="L18"/> +<connect gate="B" pin="PA13" pad="A3"/> +<connect gate="B" pin="PA14" pad="B3"/> +<connect gate="B" pin="PA15" pad="T15"/> +<connect gate="B" pin="PA2" pad="A15"/> +<connect gate="B" pin="PA3" pad="A5"/> +<connect gate="B" pin="PA4" pad="B16"/> +<connect gate="B" pin="PA5" pad="A16"/> +<connect gate="B" pin="PA6" pad="B17"/> +<connect gate="B" pin="PA7" pad="A12"/> +<connect gate="B" pin="PA8" pad="T17"/> +<connect gate="B" pin="PA9" pad="U12"/> +<connect gate="B" pin="PB0" pad="A11"/> +<connect gate="B" pin="PB1" pad="B11"/> +<connect gate="B" pin="PB10" pad="A13"/> +<connect gate="B" pin="PB11" pad="A9"/> +<connect gate="B" pin="PB12" pad="B14"/> +<connect gate="B" pin="PB13" pad="A14"/> +<connect gate="B" pin="PB14" pad="T14"/> +<connect gate="B" pin="PB15" pad="V13"/> +<connect gate="B" pin="PB2" pad="M18"/> +<connect gate="B" pin="PB3" pad="V14"/> +<connect gate="B" pin="PB4" pad="U14"/> +<connect gate="B" pin="PB5" pad="C17"/> +<connect gate="B" pin="PB6" pad="H18"/> +<connect gate="B" pin="PB7" pad="V12"/> +<connect gate="B" pin="PB8" pad="T13"/> +<connect gate="B" pin="PB9" pad="U13"/> +<connect gate="B" pin="PC0" pad="A17"/> +<connect gate="B" pin="PC1" pad="B15"/> +<connect gate="B" pin="PC10" pad="V16"/> +<connect gate="B" pin="PC11" pad="U17"/> +<connect gate="B" pin="PC12" pad="V17"/> +<connect gate="B" pin="PC2" pad="C7"/> +<connect gate="B" pin="PC3" pad="B6"/> +<connect gate="B" pin="PC4" pad="B12"/> +<connect gate="B" pin="PC5" pad="C12"/> +<connect gate="B" pin="PC6" pad="R18"/> +<connect gate="B" pin="PC7" pad="R16"/> +<connect gate="B" pin="PC8" pad="T16"/> +<connect gate="B" pin="PC9" pad="U16"/> +<connect gate="B" pin="PD0" pad="V11"/> +<connect gate="B" pin="PD1" pad="U11"/> +<connect gate="B" pin="PD10" pad="V6"/> +<connect gate="B" pin="PD11" pad="E18"/> +<connect gate="B" pin="PD12" pad="F16"/> +<connect gate="B" pin="PD13" pad="F17"/> +<connect gate="B" pin="PD14" pad="C3"/> +<connect gate="B" pin="PD15" pad="A2"/> +<connect gate="B" pin="PD2" pad="U18"/> +<connect gate="B" pin="PD3" pad="T11"/> +<connect gate="B" pin="PD4" pad="V10"/> +<connect gate="B" pin="PD5" pad="U10"/> +<connect gate="B" pin="PD6" pad="T10"/> +<connect gate="B" pin="PD7" pad="U9"/> +<connect gate="B" pin="PD8" pad="B2"/> +<connect gate="B" pin="PD9" pad="B1"/> +<connect gate="C" pin="PE0" pad="U7"/> +<connect gate="C" pin="PE1" pad="T7"/> +<connect gate="C" pin="PE10" pad="E17"/> +<connect gate="C" pin="PE11" pad="V5"/> +<connect gate="C" pin="PE12" pad="U5"/> +<connect gate="C" pin="PE13" pad="T5"/> +<connect gate="C" pin="PE14" pad="V4"/> +<connect gate="C" pin="PE15" pad="U4"/> +<connect gate="C" pin="PE2" pad="A6"/> +<connect gate="C" pin="PE3" pad="T12"/> +<connect gate="C" pin="PE4" pad="R17"/> +<connect gate="C" pin="PE5" pad="V15"/> +<connect gate="C" pin="PE6" pad="T9"/> +<connect gate="C" pin="PE7" pad="D17"/> +<connect gate="C" pin="PE8" pad="D18"/> +<connect gate="C" pin="PE9" pad="E16"/> +<connect gate="C" pin="PF0" pad="U8"/> +<connect gate="C" pin="PF1" pad="V8"/> +<connect gate="C" pin="PF10" pad="H16"/> +<connect gate="C" pin="PF11" pad="B18"/> +<connect gate="C" pin="PF12" pad="C11"/> +<connect gate="C" pin="PF13" pad="A10"/> +<connect gate="C" pin="PF14" pad="B10"/> +<connect gate="C" pin="PF15" pad="C10"/> +<connect gate="C" pin="PF2" pad="T18"/> +<connect gate="C" pin="PF3" pad="C6"/> +<connect gate="C" pin="PF4" pad="V7"/> +<connect gate="C" pin="PF5" pad="T8"/> +<connect gate="C" pin="PF6" pad="F18"/> +<connect gate="C" pin="PF7" pad="G16"/> +<connect gate="C" pin="PF8" pad="G17"/> +<connect gate="C" pin="PF9" pad="G18"/> +<connect gate="C" pin="PG0" pad="C8"/> +<connect gate="C" pin="PG1" pad="B8"/> +<connect gate="C" pin="PG10" pad="C18"/> +<connect gate="C" pin="PG11" pad="C14"/> +<connect gate="C" pin="PG12" pad="A4"/> +<connect gate="C" pin="PG13" pad="B7"/> +<connect gate="C" pin="PG14" pad="A7"/> +<connect gate="C" pin="PG15" pad="V9"/> +<connect gate="C" pin="PG2" pad="A8"/> +<connect gate="C" pin="PG3" pad="C9"/> +<connect gate="C" pin="PG4" pad="B9"/> +<connect gate="C" pin="PG5" pad="C15"/> +<connect gate="C" pin="PG6" pad="U15"/> +<connect gate="C" pin="PG7" pad="H17"/> +<connect gate="C" pin="PG8" pad="D16"/> +<connect gate="C" pin="PG9" pad="M17"/> +<connect gate="C" pin="PH10" pad="U3"/> +<connect gate="C" pin="PH11" pad="V2"/> +<connect gate="C" pin="PH12" pad="U2"/> +<connect gate="C" pin="PH13" pad="U1"/> +<connect gate="C" pin="PH14" pad="T1"/> +<connect gate="C" pin="PH15" pad="T2"/> +<connect gate="C" pin="PH2" pad="B13"/> +<connect gate="C" pin="PH3" pad="C13"/> +<connect gate="C" pin="PH4" pad="U6"/> +<connect gate="C" pin="PH5" pad="T6"/> +<connect gate="C" pin="PH6" pad="B5"/> +<connect gate="C" pin="PH7" pad="C5"/> +<connect gate="C" pin="PH8" pad="T4"/> +<connect gate="C" pin="PH9" pad="V3"/> +<connect gate="C" pin="PI0" pad="T3"/> +<connect gate="C" pin="PI1" pad="R1"/> +<connect gate="C" pin="PI10" pad="B4"/> +<connect gate="C" pin="PI11" pad="C4"/> +<connect gate="C" pin="PI2" pad="R2"/> +<connect gate="C" pin="PI3" pad="R3"/> +<connect gate="C" pin="PI4" pad="P1"/> +<connect gate="C" pin="PI5" pad="P2"/> +<connect gate="C" pin="PI6" pad="P3"/> +<connect gate="C" pin="PI7" pad="N3"/> +<connect gate="C" pin="PI8" pad="C1"/> +<connect gate="C" pin="PI9" pad="C2"/> +<connect gate="C" pin="PZ0" pad="F1"/> +<connect gate="C" pin="PZ1" pad="F2"/> +<connect gate="C" pin="PZ2" pad="F3"/> +<connect gate="C" pin="PZ3" pad="E1"/> +<connect gate="C" pin="PZ4/PMIC_SCL" pad="E2"/> +<connect gate="C" pin="PZ5/PMIC_SDA" pad="E3"/> +<connect gate="C" pin="PZ6" pad="D1"/> +<connect gate="C" pin="PZ7" pad="D2"/> +<connect gate="D" pin="ANA0" pad="L1"/> +<connect gate="D" pin="ANA1" pad="L2"/> +<connect gate="D" pin="DSI_CKN" pad="P16"/> +<connect gate="D" pin="DSI_CKP" pad="N16"/> +<connect gate="D" pin="DSI_D0N" pad="P18"/> +<connect gate="D" pin="DSI_D0P" pad="P17"/> +<connect gate="D" pin="DSI_D1N" pad="N18"/> +<connect gate="D" pin="DSI_D1P" pad="N17"/> +<connect gate="D" pin="JTCK-SWCLK" pad="R15"/> +<connect gate="D" pin="JTDI" pad="R13"/> +<connect gate="D" pin="JTDO-TRACESWO" pad="R12"/> +<connect gate="D" pin="JTMS-SWDIO" pad="R14"/> +<connect gate="D" pin="NJTRST" pad="R11"/> +<connect gate="D" pin="OTG_VBUS" pad="K9"/> +<connect gate="D" pin="USB_DM1" pad="K18"/> +<connect gate="D" pin="USB_DM2" pad="J17"/> +<connect gate="D" pin="USB_DP1" pad="K17"/> +<connect gate="D" pin="USB_DP2" pad="J18"/> +<connect gate="D" pin="VDDA" pad="M1"/> +<connect gate="D" pin="VREF+" pad="M2"/> +<connect gate="D" pin="VREF-" pad="K2"/> +<connect gate="D" pin="VSSA" pad="K1"/> +<connect gate="E" pin="VSS@1" pad="D4"/> +<connect gate="E" pin="VSS@10" pad="L5"/> +<connect gate="E" pin="VSS@11" pad="M5"/> +<connect gate="E" pin="VSS@12" pad="N5"/> +<connect gate="E" pin="VSS@13" pad="P5"/> +<connect gate="E" pin="VSS@14" pad="E6"/> +<connect gate="E" pin="VSS@15" pad="F6"/> +<connect gate="E" pin="VSS@16" pad="N6"/> +<connect gate="E" pin="VSS@17" pad="P6"/> +<connect gate="E" pin="VSS@18" pad="E7"/> +<connect gate="E" pin="VSS@19" pad="F7"/> +<connect gate="E" pin="VSS@2" pad="E4"/> +<connect gate="E" pin="VSS@20" pad="N7"/> +<connect gate="E" pin="VSS@21" pad="P7"/> +<connect gate="E" pin="VSS@22" pad="E8"/> +<connect gate="E" pin="VSS@23" pad="F8"/> +<connect gate="E" pin="VSS@24" pad="N8"/> +<connect gate="E" pin="VSS@25" pad="P8"/> +<connect gate="E" pin="VSS@26" pad="E9"/> +<connect gate="E" pin="VSS@27" pad="F9"/> +<connect gate="E" pin="VSS@28" pad="N9"/> +<connect gate="E" pin="VSS@29" pad="E10"/> +<connect gate="E" pin="VSS@3" pad="F4"/> +<connect gate="E" pin="VSS@30" pad="F10"/> +<connect gate="E" pin="VSS@31" pad="N10"/> +<connect gate="E" pin="VSS@32" pad="E11"/> +<connect gate="E" pin="VSS@33" pad="F11"/> +<connect gate="E" pin="VSS@34" pad="G11"/> +<connect gate="E" pin="VSS@35" pad="M11"/> +<connect gate="E" pin="VSS@36" pad="N11"/> +<connect gate="E" pin="VSS@37" pad="E12"/> +<connect gate="E" pin="VSS@38" pad="F12"/> +<connect gate="E" pin="VSS@39" pad="G12"/> +<connect gate="E" pin="VSS@4" pad="E5"/> +<connect gate="E" pin="VSS@40" pad="M12"/> +<connect gate="E" pin="VSS@41" pad="N12"/> +<connect gate="E" pin="VSS@42" pad="E13"/> +<connect gate="E" pin="VSS@43" pad="F13"/> +<connect gate="E" pin="VSS@44" pad="G13"/> +<connect gate="E" pin="VSS@45" pad="H13"/> +<connect gate="E" pin="VSS@46" pad="J13"/> +<connect gate="E" pin="VSS@47" pad="K13"/> +<connect gate="E" pin="VSS@48" pad="L13"/> +<connect gate="E" pin="VSS@49" pad="M13"/> +<connect gate="E" pin="VSS@5" pad="F5"/> +<connect gate="E" pin="VSS@50" pad="N13"/> +<connect gate="E" pin="VSS@51" pad="E14"/> +<connect gate="E" pin="VSS@52" pad="F14"/> +<connect gate="E" pin="VSS@53" pad="G14"/> +<connect gate="E" pin="VSS@54" pad="H14"/> +<connect gate="E" pin="VSS@55" pad="J14"/> +<connect gate="E" pin="VSS@56" pad="K14"/> +<connect gate="E" pin="VSS@57" pad="L14"/> +<connect gate="E" pin="VSS@58" pad="M14"/> +<connect gate="E" pin="VSS@59" pad="N14"/> +<connect gate="E" pin="VSS@6" pad="G5"/> +<connect gate="E" pin="VSS@60" pad="E15"/> +<connect gate="E" pin="VSS@61" pad="F15"/> +<connect gate="E" pin="VSS@62" pad="G15"/> +<connect gate="E" pin="VSS@63" pad="H15"/> +<connect gate="E" pin="VSS@64" pad="J15"/> +<connect gate="E" pin="VSS@65" pad="K15"/> +<connect gate="E" pin="VSS@66" pad="L15"/> +<connect gate="E" pin="VSS@67" pad="M15"/> +<connect gate="E" pin="VSS@68" pad="N15"/> +<connect gate="E" pin="VSS@69" pad="J16"/> +<connect gate="E" pin="VSS@7" pad="H5"/> +<connect gate="E" pin="VSS@70" pad="K16"/> +<connect gate="E" pin="VSS@8" pad="J5"/> +<connect gate="E" pin="VSS@9" pad="K5"/> +<connect gate="F" pin="HSE_OSC_TP" pad="J2"/> +<connect gate="F" pin="LSE_OSC_TP" pad="N2"/> +<connect gate="F" pin="NRST_CORE" pad="N4"/> +<connect gate="F" pin="PA0/PMIC_INTN" pad="L3"/> +<connect gate="F" pin="PC13/PMIC_WAKEUP" pad="D6"/> +<connect gate="F" pin="PDR_ON" pad="M6"/> +<connect gate="F" pin="PDR_ON_CORE" pad="L6"/> +<connect gate="F" pin="PWR_LP" pad="K6"/> +<connect gate="F" pin="PWR_ON/PMIC_PWRCTRL" pad="D5"/> +<connect gate="F" pin="RSVD" pad="N1"/> +<connect gate="F" pin="VDD1V2_DSI_REG" pad="R6"/> +<connect gate="F" pin="VDD3V3_USB" pad="R5"/> +<connect gate="F" pin="VDDA1V1_REG" pad="R8"/> +<connect gate="F" pin="VDDA1V8_REG" pad="R7"/> +<connect gate="F" pin="VDD_CORE" pad="R4"/> +<connect gate="F" pin="VDD_DDR" pad="K12"/> +<connect gate="F" pin="VREF_DDR" pad="L12"/> +<connect gate="F" pin="VTT_DDR" pad="J12"/> +<connect gate="G" pin="RSVD@1" pad="D7"/> +<connect gate="G" pin="RSVD@10" pad="M16"/> +<connect gate="G" pin="RSVD@2" pad="D8"/> +<connect gate="G" pin="RSVD@3" pad="D9"/> +<connect gate="G" pin="RSVD@4" pad="P9"/> +<connect gate="G" pin="RSVD@5" pad="R9"/> +<connect gate="G" pin="RSVD@6" pad="D10"/> +<connect gate="G" pin="RSVD@7" pad="P10"/> +<connect gate="G" pin="RSVD@8" pad="R10"/> +<connect gate="G" pin="RSVD@9" pad="H12"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="supply1" urn="urn:adsk.eagle:library:371"> +<description><b>Supply Symbols</b><p> + GND, VCC, 0V, +5V, -5V, etc.<p> + Please keep in mind, that these devices are necessary for the + automatic wiring of the supply signals.<p> + The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> + In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> + <author>Created by librarian@cadsoft.de</author></description> +<packages> +</packages> +<symbols> +<symbol name="VDD" urn="urn:adsk.eagle:symbol:26943/1" library_version="1"> +<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> +<wire x1="0" y1="1.27" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> +<wire x1="1.27" y1="-1.905" x2="0" y2="1.27" width="0.254" layer="94"/> +<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="VDD" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="VDD" urn="urn:adsk.eagle:component:26970/1" prefix="VDD" library_version="1"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="G$1" symbol="VDD" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="503398-1892"> +<packages> +<package name="MOLEX_503398-1892"> +<rectangle x1="-5.2479" y1="-6.74156875" x2="-4.685" y2="-4.575" layer="41"/> +<rectangle x1="-6.84796875" y1="-1.27835" x2="-6.13" y2="1.125" layer="41"/> +<rectangle x1="-3.22806875" y1="-6.94236875" x2="-2.67" y2="-6.375" layer="41"/> +<wire x1="-6.55" y1="7.025" x2="6.55" y2="7.025" width="0.127" layer="51"/> +<wire x1="6.55" y1="7.025" x2="6.55" y2="-7.025" width="0.127" layer="51"/> +<wire x1="6.55" y1="-7.025" x2="-6.55" y2="-7.025" width="0.127" layer="51"/> +<wire x1="-6.55" y1="-7.025" x2="-6.55" y2="7.025" width="0.127" layer="51"/> +<wire x1="-6.55" y1="7.025" x2="6.55" y2="7.025" width="0.127" layer="21"/> +<wire x1="0.874" y1="-7.025" x2="5.876" y2="-7.025" width="0.127" layer="21"/> +<wire x1="-5.876" y1="-7.025" x2="-4.874" y2="-7.025" width="0.127" layer="21"/> +<circle x="-3.65" y="5.775" radius="0.1" width="0.2" layer="21"/> +<wire x1="-7" y1="7.25" x2="7" y2="7.25" width="0.05" layer="39"/> +<wire x1="7" y1="7.25" x2="7" y2="-7.5" width="0.05" layer="39"/> +<wire x1="7" y1="-7.5" x2="-7" y2="-7.5" width="0.05" layer="39"/> +<wire x1="-7" y1="-7.5" x2="-7" y2="7.25" width="0.05" layer="39"/> +<text x="-7.0923" y="7.788509375" size="1.272209375" layer="25">>NAME</text> +<text x="-7.10033125" y="-9.00076875" size="1.273640625" layer="27">>VALUE</text> +<polygon width="0.0001" layer="43"> +<vertex x="-3.17" y="3.725"/> +<vertex x="-3.17" y="-1.275"/> +<vertex x="-3.82" y="-1.275"/> +<vertex x="-3.82" y="-3.875"/> +<vertex x="0.57" y="-3.875"/> +<vertex x="0.57" y="-5.125"/> +<vertex x="-1.73" y="-5.125"/> +<vertex x="-1.73" y="-7.305"/> +<vertex x="-0.43" y="-7.305"/> +<vertex x="-0.43" y="-6.525"/> +<vertex x="6.13" y="-6.525"/> +<vertex x="6.13" y="-3.975"/> +<vertex x="6.83" y="-3.975"/> +<vertex x="6.83" y="3.725"/> +</polygon> +<rectangle x1="-6.84995" y1="-1.27873125" x2="-6.13" y2="1.125" layer="43"/> +<rectangle x1="-5.24888125" y1="-6.74283125" x2="-4.685" y2="-4.575" layer="43"/> +<rectangle x1="-3.230309375" y1="-6.94718125" x2="-2.67" y2="-6.375" layer="43"/> +<polygon width="0.0001" layer="41"> +<vertex x="-3.17" y="3.725"/> +<vertex x="-3.17" y="-1.275"/> +<vertex x="-3.82" y="-1.275"/> +<vertex x="-3.82" y="-3.875"/> +<vertex x="0.57" y="-3.875"/> +<vertex x="0.57" y="-5.125"/> +<vertex x="-1.73" y="-5.125"/> +<vertex x="-1.73" y="-7.305"/> +<vertex x="-0.43" y="-7.305"/> +<vertex x="-0.43" y="-6.525"/> +<vertex x="6.13" y="-6.525"/> +<vertex x="6.13" y="-3.975"/> +<vertex x="6.83" y="-3.975"/> +<vertex x="6.83" y="3.725"/> +</polygon> +<wire x1="-6.55" y1="4.325" x2="-6.55" y2="1.425" width="0.127" layer="21"/> +<wire x1="-6.55" y1="-1.575" x2="-6.55" y2="-3.675" width="0.127" layer="21"/> +<smd name="1" x="-2.38" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="2" x="-1.28" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="3" x="-0.18" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="4" x="0.92" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="5" x="2.02" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="6" x="3.12" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="7" x="4.22" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="8" x="5.32" y="5.625" dx="0.7" dy="1.1" layer="1"/> +<smd name="P1" x="-6.26" y="5.61" dx="1.14" dy="1.83" layer="1"/> +<smd name="P2" x="6.4" y="5.125" dx="0.86" dy="2.8" layer="1"/> +<smd name="P3" x="-6.48" y="-5.64" dx="0.7" dy="3.33" layer="1"/> +<smd name="P4" x="6.48" y="-5.64" dx="0.7" dy="3.33" layer="1"/> +<smd name="9" x="-4.17" y="-6.84" dx="0.9" dy="0.93" layer="1"/> +<smd name="10" x="0.095" y="-6.915" dx="1.05" dy="0.78" layer="1"/> +</package> +</packages> +<symbols> +<symbol name="503398-1892"> +<wire x1="12.7" y1="15.24" x2="-12.7" y2="15.24" width="0.254" layer="94"/> +<wire x1="-12.7" y1="15.24" x2="-12.7" y2="-17.78" width="0.254" layer="94"/> +<wire x1="-12.7" y1="-17.78" x2="12.7" y2="-17.78" width="0.254" layer="94"/> +<wire x1="12.7" y1="-17.78" x2="12.7" y2="15.24" width="0.254" layer="94"/> +<text x="-12.7468" y="15.2961" size="1.784540625" layer="95">>NAME</text> +<text x="-12.729" y="-17.8206" size="1.782059375" layer="96" rot="MR180">>VALUE</text> +<pin name="DAT2" x="17.78" y="-2.54" length="middle" direction="pas" rot="R180"/> +<pin name="CD/DAT3^2" x="17.78" y="-5.08" length="middle" direction="pas" rot="R180"/> +<pin name="CMD" x="17.78" y="7.62" length="middle" direction="pas" rot="R180"/> +<pin name="VDD" x="17.78" y="12.7" length="middle" direction="pwr" rot="R180"/> +<pin name="CLK" x="17.78" y="5.08" length="middle" direction="pas" function="clk" rot="R180"/> +<pin name="VSS" x="17.78" y="-15.24" length="middle" direction="pwr" rot="R180"/> +<pin name="DAT0" x="17.78" y="2.54" length="middle" direction="pas" rot="R180"/> +<pin name="DAT1" x="17.78" y="0" length="middle" direction="pas" rot="R180"/> +<pin name="DETECT_SWITCH" x="17.78" y="-7.62" length="middle" direction="pas" rot="R180"/> +<pin name="SHIELD" x="17.78" y="-12.7" length="middle" direction="pas" rot="R180"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="503398-1892" prefix="X"> +<description>1.10mm Pitch microSD Memory Card Connector, Normal Mount Surface Mount, Push-Push Type, 1.28mm Height</description> +<gates> +<gate name="G$1" symbol="503398-1892" x="0" y="0"/> +</gates> +<devices> +<device name="" package="MOLEX_503398-1892"> +<connects> +<connect gate="G$1" pin="CD/DAT3^2" pad="2"/> +<connect gate="G$1" pin="CLK" pad="5"/> +<connect gate="G$1" pin="CMD" pad="3"/> +<connect gate="G$1" pin="DAT0" pad="7"/> +<connect gate="G$1" pin="DAT1" pad="8"/> +<connect gate="G$1" pin="DAT2" pad="1"/> +<connect gate="G$1" pin="DETECT_SWITCH" pad="10"/> +<connect gate="G$1" pin="SHIELD" pad="P1 P2 P3 P4"/> +<connect gate="G$1" pin="VDD" pad="4"/> +<connect gate="G$1" pin="VSS" pad="6 9"/> +</connects> +<technologies> +<technology name=""> +<attribute name="AVAILABILITY" value="Good"/> +<attribute name="DESCRIPTION" value=" 1.10mm Pitch microSD Memory Card Connector, Normal Mount Surface Mount, Push-Push Type, 1.28mm Height "/> +<attribute name="MF" value="Molex"/> +<attribute name="MP" value="5033981892"/> +<attribute name="PACKAGE" value="None"/> +<attribute name="PRICE" value="1.67 USD"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="pinhead" urn="urn:adsk.eagle:library:325"> +<description><b>Pin Header Connectors</b><p> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="2X08" urn="urn:adsk.eagle:footprint:22373/1" library_version="3"> +<description><b>PIN HEADER</b></description> +<wire x1="-10.16" y1="-1.905" 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802.11b/g/n + Bluetooth 4.1/EDR</description> +<gates> +<gate name="G$1" symbol="LBEE5KL1DX-TEMP" x="0" y="0"/> +</gates> +<devices> +<device name="" package="XCVR_LBEE5KL1DX-TEMP"> +<connects> +<connect gate="G$1" pin="!BT_UART_CTS_N" pad="4"/> +<connect gate="G$1" pin="!BT_UART_RTS_N" pad="5"/> +<connect gate="G$1" pin="ANT" pad="41"/> +<connect gate="G$1" pin="BT_DEV_WAKE" pad="39"/> +<connect gate="G$1" pin="BT_GPIO_3" pad="6"/> +<connect gate="G$1" pin="BT_GPIO_4" pad="7"/> +<connect gate="G$1" pin="BT_GPIO_5" pad="13"/> +<connect gate="G$1" pin="BT_HOST_WAKE" pad="38"/> +<connect gate="G$1" pin="BT_I2S_DO" pad="16"/> +<connect gate="G$1" pin="BT_PCM_CLK" pad="11"/> +<connect gate="G$1" pin="BT_PCM_IN" pad="9"/> +<connect gate="G$1" pin="BT_PCM_OUT" pad="10"/> +<connect gate="G$1" pin="BT_PCM_SYNC" pad="8"/> +<connect gate="G$1" pin="BT_REG_ON" pad="14"/> +<connect gate="G$1" pin="BT_UART_RXD" pad="2"/> +<connect gate="G$1" pin="BT_UART_TXD" pad="3"/> +<connect gate="G$1" pin="GND" pad="1 12 19 21 29 35 40 42 43 44 45 46"/> +<connect gate="G$1" pin="GND_(SR_PVSS)" pad="32 33"/> +<connect gate="G$1" pin="LPO_IN_(32KHZ)" pad="37"/> +<connect gate="G$1" pin="SDIO_CLK" pad="20"/> +<connect gate="G$1" pin="SDIO_CMD" pad="22"/> +<connect gate="G$1" pin="SDIO_DATA_0" pad="24"/> +<connect gate="G$1" pin="SDIO_DATA_1" pad="26"/> +<connect gate="G$1" pin="SDIO_DATA_2" pad="23"/> +<connect gate="G$1" pin="SDIO_DATA_3" pad="25"/> +<connect gate="G$1" pin="SR_VLX" pad="34"/> +<connect gate="G$1" pin="VBAT" pad="30"/> +<connect gate="G$1" pin="VIN_LDO" pad="31"/> +<connect gate="G$1" pin="VIO" pad="36"/> +<connect gate="G$1" pin="WL_GPIO_0_HOST_WAKE" pad="27"/> +<connect gate="G$1" pin="WL_GPIO_1" pad="18"/> +<connect gate="G$1" pin="WL_GPIO_2" pad="17"/> +<connect gate="G$1" pin="WL_GPIO_4" pad="15"/> +<connect gate="G$1" pin="WL_REG_ON" pad="28"/> +</connects> +<technologies> +<technology name=""> +<attribute name="AVAILABILITY" value="Unavailable"/> +<attribute name="DESCRIPTION" value=" WICED Transceiver; 802.11 b/g/n _Wi-Fi, WiFi, WLAN_, Bluetooth® Smart Ready 4.x Dual Mode For Use With BCM4343W, i.MX 6 "/> +<attribute name="MF" value="Murata Electronics"/> +<attribute name="MP" value="LBEE5KL1DX-TEMP"/> +<attribute name="PACKAGE" value="None"/> +<attribute name="PRICE" value="None"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="2450AT18B100E"> +<packages> +<package name="ANT_2450AT18B100E"> +<wire x1="-0.73" y1="0.86" x2="-0.73" y2="-0.84" width="0.127" layer="21"/> +<wire x1="-0.73" y1="-0.84" x2="0.75" y2="-0.84" width="0.127" layer="21"/> +<wire x1="0.75" y1="-0.84" x2="0.75" y2="0.86" width="0.127" layer="21"/> +<wire x1="0.75" y1="0.86" x2="-0.73" y2="0.86" width="0.127" layer="21"/> +<wire x1="-2" y1="1.12" x2="2.03" y2="1.12" width="0.127" layer="39"/> +<wire x1="2.03" y1="1.12" x2="2.03" y2="-1.18" width="0.127" layer="39"/> +<wire x1="2.03" y1="-1.18" x2="-2.04" y2="-1.18" width="0.127" layer="39"/> +<wire x1="-2.04" y1="-1.18" x2="-2.04" y2="1.12" width="0.127" layer="39"/> +<text x="-2.92" y="1.25" size="1.27" layer="25">>NAME</text> +<text x="-3.44" y="-2.69" size="1.27" layer="27">>VALUE</text> +<rectangle x1="-0.635" y1="0" x2="-0.254" y2="0.127" layer="21"/> +<smd name="1" x="-1.3" y="0" dx="0.8" dy="1.6" layer="1"/> +<smd name="2" x="1.3" y="0" dx="0.8" dy="1.6" layer="1"/> +</package> +</packages> +<symbols> +<symbol name="2450AT18B100E"> +<wire x1="-2.54" y1="2.54" x2="0" y2="2.54" width="0.254" layer="94"/> +<wire x1="0" y1="2.54" x2="2.54" y2="2.54" width="0.254" layer="94"/> +<wire x1="2.54" y1="2.54" x2="0" y2="-2.54" width="0.254" layer="94"/> +<wire x1="0" y1="-2.54" x2="-2.54" y2="2.54" width="0.254" layer="94"/> +<wire x1="0" y1="-2.54" x2="0" y2="-5.08" width="0.254" layer="94"/> +<wire x1="0" y1="-2.54" x2="0" y2="2.54" width="0.254" layer="94"/> +<text x="-4.572" y="3.556" size="1.778" layer="95">>NAME</text> +<text x="-5.08" y="-10.16" size="1.778" layer="95">>VALUE</text> +<pin name="1" x="0" y="-5.08" length="middle" direction="in" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="2450AT18B100E" prefix="ANT"> +<description><b>ANTENNA, CERAMIC, 2.45GHZ; Bandwidth: 100MHz; Frequency: 2.45GHz; Gain: -0.5dB; Impedance: 50ohm</b><p>http://www.snapeda.com/parts/2450AT18B100E/Johanson/view-part/#</description> +<gates> +<gate name="G$1" symbol="2450AT18B100E" x="0" y="0"/> +</gates> +<devices> +<device name="" package="ANT_2450AT18B100E"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +</connects> +<technologies> +<technology name=""> +<attribute name="AVAILABILITY" value="Unavailable"/> +<attribute name="DESCRIPTION" value=" 2.4GHz Chip RF Antenna 2.4GHz ~ 2.5GHz 0.5dBi Solder Surface Mount "/> +<attribute name="MF" value="Johanson Technology"/> +<attribute name="MP" value="2450AT18B100E"/> +<attribute name="PACKAGE" value="None"/> +<attribute name="PRICE" value="None"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="testpad" urn="urn:adsk.eagle:library:385"> +<description><b>Test Pins/Pads</b><p> +Cream on SMD OFF.<br> +new: Attribute TP_SIGNAL_NAME<br> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="B1,27" urn="urn:adsk.eagle:footprint:27900/1" library_version="3"> +<description><b>TEST PAD</b></description> +<wire x1="-0.635" y1="0" x2="0.635" y2="0" width="0.0024" layer="37"/> +<wire x1="0" y1="0.635" x2="0" y2="-0.635" width="0.0024" layer="37"/> +<smd name="TP" x="0" y="0" dx="1.27" dy="1.27" layer="1" roundness="100" cream="no"/> +<text x="-0.635" y="1.016" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="-0.635" y="-0.762" size="0.0254" layer="27">>VALUE</text> +<text x="-0.635" y="-1.905" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="B2,54" urn="urn:adsk.eagle:footprint:27901/1" library_version="3"> +<description><b>TEST PAD</b></description> +<wire x1="-0.635" y1="0" x2="0.635" y2="0" width="0.0024" layer="37"/> +<wire x1="0" y1="-0.635" x2="0" y2="0.635" width="0.0024" layer="37"/> +<circle x="0" y="0" radius="0.635" width="0.254" layer="37"/> +<smd name="TP" x="0" y="0" dx="2.54" dy="2.54" layer="1" roundness="100" cream="no"/> +<text x="-1.27" y="1.651" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="-1.27" y="-1.397" size="0.0254" layer="27">>VALUE</text> +<text x="-1.27" y="-3.175" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="P1-13" urn="urn:adsk.eagle:footprint:27902/1" library_version="3"> +<description><b>TEST PAD</b></description> +<circle x="0" y="0" radius="0.762" width="0.1524" layer="51"/> +<pad name="TP" x="0" y="0" drill="1.3208" diameter="2.159" shape="octagon"/> +<text x="-1.016" y="1.27" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="0" y="0" size="0.0254" layer="27">>VALUE</text> +<text x="-1.27" y="-2.54" size="1" layer="37">>TP_SIGNAL_NAME</text> +<rectangle x1="-0.3302" y1="-0.3302" x2="0.3302" y2="0.3302" layer="51"/> +</package> +<package name="P1-13Y" urn="urn:adsk.eagle:footprint:27903/1" library_version="3"> +<description><b>TEST PAD</b></description> +<circle x="0" y="0" radius="0.762" width="0.1524" layer="51"/> +<pad name="TP" x="0" y="0" drill="1.3208" diameter="1.905" shape="long" rot="R90"/> +<text x="-0.889" y="2.159" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="0" y="0" size="0.0254" layer="27">>VALUE</text> +<text x="-1.27" y="-3.81" size="1" layer="37">>TP_SIGNAL_NAME</text> +<rectangle x1="-0.3302" y1="-0.3302" x2="0.3302" y2="0.3302" layer="51"/> +</package> +<package name="P1-17" urn="urn:adsk.eagle:footprint:27904/1" library_version="3"> +<description><b>TEST PAD</b></description> +<circle x="0" y="0" radius="0.8128" width="0.1524" layer="51"/> +<pad name="TP" x="0" y="0" drill="1.7018" diameter="2.54" shape="octagon"/> +<text x="-1.143" y="1.397" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="0" y="0" size="0.0254" layer="27">>VALUE</text> +<text x="-1.27" y="-3.175" size="1" layer="37">>TP_SIGNAL_NAME</text> +<rectangle x1="-0.3302" y1="-0.3302" x2="0.3302" y2="0.3302" layer="51"/> +</package> +<package name="P1-17Y" urn="urn:adsk.eagle:footprint:27905/1" library_version="3"> +<description><b>TEST PAD</b></description> +<circle x="0" y="0" radius="0.8128" width="0.1524" layer="51"/> +<pad name="TP" x="0" y="0" drill="1.7018" diameter="2.1208" shape="long" rot="R90"/> +<text x="-1.143" y="2.286" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="0" y="0" size="0.0254" layer="27">>VALUE</text> +<text x="-1.27" y="-3.81" size="1" layer="37">>TP_SIGNAL_NAME</text> +<rectangle x1="-0.3302" y1="-0.3302" x2="0.3302" y2="0.3302" layer="51"/> +</package> +<package name="P1-20" urn="urn:adsk.eagle:footprint:27906/1" library_version="3"> +<description><b>TEST PAD</b></description> +<circle x="0" y="0" radius="1.016" width="0.1524" layer="51"/> +<pad name="TP" x="0" y="0" drill="2.0066" diameter="3.1496" shape="octagon"/> +<text x="-1.524" y="1.778" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="0" y="0" size="0.0254" layer="27">>VALUE</text> +<text x="-1.27" y="-3.175" size="1" layer="37">>TP_SIGNAL_NAME</text> +<rectangle x1="-0.3302" y1="-0.3302" x2="0.3302" y2="0.3302" layer="51"/> +</package> +<package name="P1-20Y" urn="urn:adsk.eagle:footprint:27907/1" library_version="3"> +<description><b>TEST PAD</b></description> +<circle x="0" y="0" radius="1.016" width="0.1524" layer="51"/> +<pad name="TP" x="0" y="0" drill="2.0066" diameter="2.54" shape="long" rot="R90"/> +<text x="-1.27" y="2.794" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="0" y="0" size="0.0254" layer="27">>VALUE</text> +<text x="-1.27" y="-4.445" size="1" layer="37">>TP_SIGNAL_NAME</text> +<rectangle x1="-0.3302" y1="-0.3302" x2="0.3302" y2="0.3302" layer="51"/> +</package> +<package name="TP06R" urn="urn:adsk.eagle:footprint:27908/1" library_version="3"> +<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="0.6" dy="0.6" layer="1" roundness="100" cream="no"/> +<text x="-0.3" y="0.4001" size="1.27" layer="25">>NAME</text> +<text x="-0.254" y="-0.381" size="0.0254" layer="27">>VALUE</text> +<text x="0" y="-1.905" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="TP06SQ" urn="urn:adsk.eagle:footprint:27909/1" library_version="3"> +<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="0.5996" dy="0.5996" layer="1" cream="no"/> +<text x="-0.3" y="0.4001" size="1.27" layer="25">>NAME</text> +<text x="-0.254" y="-0.381" size="0.0254" layer="27">>VALUE</text> +<text x="0" y="-1.905" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="TP07R" urn="urn:adsk.eagle:footprint:27910/1" library_version="3"> +<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="0.7" dy="0.7" layer="1" roundness="100" cream="no"/> +<text x="-0.3" y="0.4001" size="1.27" layer="25">>NAME</text> +<text x="-0.254" y="-0.508" size="0.0254" layer="27">>VALUE</text> +<text x="0" y="-1.905" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="TP07SQ" urn="urn:adsk.eagle:footprint:27911/1" library_version="3"> +<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="0.7" dy="0.7" layer="1" cream="no"/> +<text x="-0.3" y="0.4001" size="1.27" layer="25">>NAME</text> +<text x="-0.381" y="-0.381" size="0.0254" layer="27">>VALUE</text> +<text x="0" y="-1.905" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="TP08R" urn="urn:adsk.eagle:footprint:27912/1" library_version="3"> +<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="0.8" dy="0.8" layer="1" roundness="100" cream="no"/> +<text x="-0.3" y="0.4001" size="1.27" layer="25">>NAME</text> +<text x="-0.381" y="-0.381" size="0.0254" layer="27">>VALUE</text> +<text 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+<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="0.8998" dy="0.8998" layer="1" cream="no"/> +<text x="-0.4501" y="0.5001" size="1.27" layer="25">>NAME</text> +<text x="-0.381" y="-0.508" size="0.0254" layer="27">>VALUE</text> +<text x="0" y="-1.905" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="TP10R" urn="urn:adsk.eagle:footprint:27916/1" library_version="3"> +<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="1" dy="1" layer="1" roundness="100" cream="no"/> +<text x="-0.5001" y="0.5499" size="1.27" layer="25">>NAME</text> +<text x="-0.381" y="-0.508" size="0.0254" layer="27">>VALUE</text> +<text x="0" y="-1.905" size="1" layer="37">>TP_SIGNAL_NAME</text> +</package> +<package name="TP10SQ" urn="urn:adsk.eagle:footprint:27917/1" library_version="3"> +<description><b>TEST PAD</b></description> +<smd name="TP" x="0" y="0" dx="1" dy="1" layer="1" cream="no"/> +<text x="-0.5001" y="0.5499" size="1.27" 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package="TP19SQ"> +<connects> +<connect gate="G$1" pin="TP" pad="TP"/> +</connects> +<package3dinstances> +<package3dinstance package3d_urn="urn:adsk.eagle:package:27978/1"/> +</package3dinstances> +<technologies> +<technology name=""> +<attribute name="POPULARITY" value="0" constant="no"/> +<attribute name="TP_SIGNAL_NAME" value="" constant="no"/> +</technology> +</technologies> +</device> +<device name="TP20SQ" package="TP20SQ"> +<connects> +<connect gate="G$1" pin="TP" pad="TP"/> +</connects> +<package3dinstances> +<package3dinstance package3d_urn="urn:adsk.eagle:package:27980/1"/> +</package3dinstances> +<technologies> +<technology name=""> +<attribute name="POPULARITY" value="2" constant="no"/> +<attribute name="TP_SIGNAL_NAME" value="" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="SparkFun-Sensors"> +<description><h3>SparkFun Sensors</h3> +This library contains sensors- accelerometers, gyros, compasses, magnetometers, light sensors, imagers, temp sensors, etc. +<br> +<br> +We've spent an enormous amount of time creating and checking these footprints and parts, but it is <b> the end user's responsibility</b> to ensure correctness and suitablity for a given componet or application. +<br> +<br>If you enjoy using this library, please buy one of our products at <a href=" www.sparkfun.com">SparkFun.com</a>. +<br> +<br> +<b>Licensing:</b> Creative Commons ShareAlike 4.0 International - https://creativecommons.org/licenses/by-sa/4.0/ +<br> +<br> +You are welcome to use this library for commercial purposes. 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+<wire x1="90.17" y1="177.8" x2="90.17" y2="181.61" width="0.1524" layer="94"/> +<wire x1="90.17" y1="181.61" x2="90.17" y2="185.42" width="0.1524" layer="94"/> +<wire x1="90.17" y1="181.61" x2="129.54" y2="181.61" width="0.1524" layer="94"/> +<wire x1="99.06" y1="185.42" x2="99.06" y2="170.18" width="0.1524" layer="94"/> +<wire x1="109.22" y1="185.42" x2="109.22" y2="170.18" width="0.1524" layer="94"/> +<wire x1="119.38" y1="185.42" x2="119.38" y2="170.18" width="0.1524" layer="94"/> +<text x="91.44" y="182.88" size="1.778" layer="94">MODE</text> +<text x="100.33" y="182.88" size="1.778" layer="94">BOOT0</text> +<text x="110.49" y="182.88" size="1.778" layer="94">BOOT1</text> +<text x="120.65" y="182.88" size="1.778" layer="94">BOOT2</text> +<text x="92.71" y="179.07" size="1.778" layer="94">SD</text> +<text x="92.71" y="175.26" size="1.778" layer="94">USB</text> +<text x="92.71" y="171.45" size="1.778" layer="94">N/A</text> +<text x="102.87" y="179.07" size="1.778" layer="94">1</text> +<text x="113.03" y="179.07" size="1.778" layer="94">0</text> +<text x="123.19" y="179.07" size="1.778" layer="94">1</text> +<text x="102.87" y="175.26" size="1.778" layer="94">0</text> +<text x="113.03" y="175.26" size="1.778" layer="94">0</text> +<text x="123.19" y="175.26" size="1.778" layer="94">0</text> +<text x="102.87" y="171.45" size="1.778" layer="94">0</text> +<text x="113.03" y="171.45" size="1.778" layer="94">0</text> +<text x="123.19" y="171.45" size="1.778" layer="94">1</text> +<wire x1="90.17" y1="173.99" x2="129.54" y2="173.99" width="0.1524" layer="94"/> +<wire x1="129.54" y1="177.8" x2="90.17" y2="177.8" width="0.1524" layer="94"/> +<wire x1="294.005" y1="87.376" x2="295.275" y2="87.376" width="0.1524" layer="150"/> +<wire x1="295.275" y1="87.376" x2="295.91" y2="86.741" width="0.1524" layer="150"/> +<wire x1="295.91" y1="86.741" x2="297.18" y2="86.741" width="0.1524" layer="150"/> +<wire x1="297.18" y1="86.741" x2="297.815" y2="87.376" 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+<wire x1="266.065" y1="295.656" x2="267.335" y2="295.656" width="0.1524" layer="150"/> +<wire x1="267.335" y1="295.656" x2="267.97" y2="295.021" width="0.1524" layer="150"/> +<wire x1="267.97" y1="295.021" x2="269.24" y2="295.021" width="0.1524" layer="150"/> +<wire x1="269.24" y1="295.021" x2="269.875" y2="295.656" width="0.1524" layer="150"/> +<wire x1="269.875" y1="295.656" x2="271.145" y2="295.656" width="0.1524" layer="150"/> +<wire x1="266.065" y1="296.291" x2="267.335" y2="296.291" width="0.1524" layer="150"/> +<wire x1="267.335" y1="296.291" x2="267.97" y2="296.926" width="0.1524" layer="150"/> +<wire x1="267.97" y1="296.926" x2="269.24" y2="296.926" width="0.1524" layer="150"/> +<wire x1="269.24" y1="296.926" x2="269.875" y2="296.291" width="0.1524" layer="150"/> +<wire x1="269.875" y1="296.291" x2="271.145" y2="296.291" width="0.1524" layer="150"/> +<wire x1="353.06" y1="-12.7" x2="353.06" y2="48.26" width="0.1524" layer="94" style="longdash"/> +<wire x1="353.06" y1="48.26" x2="454.66" y2="48.26" width="0.1524" layer="94" style="longdash"/> +<text x="355.6" y="116.84" size="6.4516" layer="94" font="vector" ratio="20">POWER MUX</text> +<wire x1="353.06" y1="48.26" x2="353.06" y2="124.46" width="0.1524" layer="94" style="longdash"/> +<text x="360.68" y="274.32" size="2.54" layer="150" ratio="20">* Tune Ant matching network</text> +<text x="360.68" y="276.86" size="2.54" layer="150" ratio="20">* Use 50ohm feed line</text> +<text x="355.6" y="271.78" size="6.4516" layer="150" ratio="17">!</text> +<wire x1="353.06" y1="279.4" x2="421.64" y2="279.4" width="0.1524" layer="150" style="longdash"/> +<wire x1="421.64" y1="279.4" x2="421.64" y2="269.24" width="0.1524" layer="150" style="longdash"/> +<wire x1="421.64" y1="269.24" x2="353.06" y2="269.24" width="0.1524" layer="150" style="longdash"/> +<wire x1="353.06" y1="269.24" x2="353.06" y2="279.4" width="0.1524" layer="150" style="longdash"/> +<text x="363.22" y="182.88" size="2.54" layer="150" font="vector" ratio="20">* No vias under socket</text> +<text x="360.68" y="180.34" size="6.4516" layer="150" ratio="17">!</text> +<wire x1="359.41" y1="187.96" x2="419.1" y2="187.96" width="0.1524" layer="150" style="longdash"/> +<wire x1="419.1" y1="187.96" x2="419.1" y2="177.8" width="0.1524" layer="150" style="longdash"/> +<wire x1="419.1" y1="177.8" x2="359.41" y2="177.8" width="0.1524" layer="150" style="longdash"/> +<wire x1="359.41" y1="177.8" x2="359.41" y2="187.96" width="0.1524" layer="150" style="longdash"/> +<text x="50.8" y="22.86" size="2.54" layer="150" ratio="20">* PMIC I2C4 +* DO NOT USE</text> +<text x="48.26" y="22.86" size="6.4516" layer="150" ratio="17">!</text> +<wire x1="45.72" y1="30.48" x2="78.74" y2="30.48" width="0.1524" layer="150" style="longdash"/> +<wire x1="78.74" y1="30.48" x2="78.74" y2="20.32" width="0.1524" layer="150" style="longdash"/> +<wire x1="78.74" y1="20.32" x2="45.72" y2="20.32" width="0.1524" layer="150" style="longdash"/> +<wire x1="45.72" y1="20.32" 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font="vector" ratio="20">* Length math SD signals.</text> +<text x="360.68" y="271.78" size="2.54" layer="150" ratio="20">* Length match SD signals.</text> +</plain> +<instances> +<instance part="H2" gate="G$1" x="383.54" y="-22.86"/> +<instance part="C9" gate="G$1" x="360.68" y="137.16" smashed="yes" rot="MR0"> +<attribute name="NAME" x="358.775" y="139.446" size="1.778" layer="95" rot="MR90"/> +<attribute name="VALUE" x="361.061" y="131.064" size="1.778" layer="96" rot="MR90"/> +</instance> +<instance part="GND17" gate="1" x="360.68" y="129.54"/> +<instance part="GND21" gate="1" x="419.1" y="129.54" rot="MR0"/> +<instance part="GND16" gate="1" x="355.6" y="129.54" rot="MR0"/> +<instance part="H1" gate="G$1" x="383.54" y="-17.78"/> +<instance part="Q1" gate="G$1" x="398.78" y="-2.54" smashed="yes" rot="R270"> +<attribute name="NAME" x="396.24" y="2.54" size="1.778" layer="95"/> +<attribute name="VALUE" x="393.7" y="-7.62" size="1.778" layer="96"/> +</instance> +<instance part="LED1" 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part="U1" gate="E" pin="VSS@6"/> +<wire x1="160.02" y1="294.64" x2="142.24" y2="294.64" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@7"/> +<wire x1="160.02" y1="292.1" x2="142.24" y2="292.1" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@8"/> +<wire x1="160.02" y1="289.56" x2="142.24" y2="289.56" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@9"/> +<wire x1="160.02" y1="287.02" x2="142.24" y2="287.02" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@10"/> +<wire x1="160.02" y1="284.48" x2="142.24" y2="284.48" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@11"/> +<wire x1="160.02" y1="281.94" x2="144.78" y2="281.94" width="0.1524" layer="91"/> +<wire x1="144.78" y1="281.94" x2="142.24" y2="281.94" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@12"/> +<wire x1="160.02" y1="279.4" x2="142.24" y2="279.4" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@13"/> +<wire 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y1="256.54" x2="142.24" y2="256.54" width="0.1524" layer="91"/> +<junction x="142.24" y="256.54"/> +<pinref part="U1" gate="E" pin="VSS@20"/> +<wire x1="160.02" y1="259.08" x2="142.24" y2="259.08" width="0.1524" layer="91"/> +<junction x="142.24" y="259.08"/> +<pinref part="U1" gate="E" pin="VSS@22"/> +<wire x1="160.02" y1="254" x2="142.24" y2="254" width="0.1524" layer="91"/> +<junction x="142.24" y="254"/> +<pinref part="U1" gate="E" pin="VSS@23"/> +<wire x1="160.02" y1="251.46" x2="142.24" y2="251.46" width="0.1524" layer="91"/> +<junction x="142.24" y="251.46"/> +<pinref part="U1" gate="E" pin="VSS@24"/> +<wire x1="160.02" y1="248.92" x2="142.24" y2="248.92" width="0.1524" layer="91"/> +<junction x="142.24" y="248.92"/> +<pinref part="U1" gate="E" pin="VSS@25"/> +<wire x1="160.02" y1="246.38" x2="142.24" y2="246.38" width="0.1524" layer="91"/> +<junction x="142.24" y="246.38"/> +<pinref part="U1" gate="E" pin="VSS@26"/> +<wire x1="160.02" y1="243.84" x2="142.24" y2="243.84" width="0.1524" layer="91"/> +<junction x="142.24" y="243.84"/> +<pinref part="U1" gate="E" pin="VSS@27"/> +<wire x1="160.02" y1="241.3" x2="142.24" y2="241.3" width="0.1524" layer="91"/> +<junction x="142.24" y="241.3"/> +<pinref part="U1" gate="E" pin="VSS@28"/> +<wire x1="160.02" y1="238.76" x2="142.24" y2="238.76" width="0.1524" layer="91"/> +<junction x="142.24" y="238.76"/> +<pinref part="U1" gate="E" pin="VSS@29"/> +<wire x1="160.02" y1="236.22" x2="142.24" y2="236.22" width="0.1524" layer="91"/> +<junction x="142.24" y="236.22"/> +<pinref part="U1" gate="E" pin="VSS@30"/> +<wire x1="160.02" y1="233.68" x2="142.24" y2="233.68" width="0.1524" layer="91"/> +<junction x="142.24" y="233.68"/> +<pinref part="U1" gate="E" pin="VSS@31"/> +<wire x1="160.02" y1="231.14" x2="142.24" y2="231.14" width="0.1524" layer="91"/> +<junction x="142.24" y="231.14"/> +<pinref part="U1" gate="E" pin="VSS@32"/> +<wire x1="160.02" y1="228.6" x2="142.24" y2="228.6" width="0.1524" layer="91"/> +<junction x="142.24" y="228.6"/> +<pinref part="U1" gate="E" pin="VSS@33"/> +<wire x1="160.02" y1="226.06" x2="142.24" y2="226.06" width="0.1524" layer="91"/> +<junction x="142.24" y="226.06"/> +<pinref part="U1" gate="E" pin="VSS@34"/> +<wire x1="160.02" y1="223.52" x2="142.24" y2="223.52" width="0.1524" layer="91"/> +<junction x="142.24" y="223.52"/> +<pinref part="U1" gate="E" pin="VSS@35"/> +<wire x1="160.02" y1="220.98" x2="142.24" y2="220.98" width="0.1524" layer="91"/> +<junction x="142.24" y="220.98"/> +<junction x="142.24" y="304.8"/> +<junction x="142.24" y="302.26"/> +<junction x="142.24" y="299.72"/> +<junction x="142.24" y="297.18"/> +<junction x="142.24" y="294.64"/> +<junction x="142.24" y="292.1"/> +<junction x="142.24" y="287.02"/> +<junction x="142.24" y="289.56"/> +<junction x="142.24" y="284.48"/> +<junction x="142.24" y="281.94"/> +<junction x="142.24" y="276.86"/> +<junction x="142.24" y="279.4"/> +<junction x="142.24" y="274.32"/> +<junction x="142.24" y="271.78"/> +<junction x="142.24" y="269.24"/> +</segment> +<segment> +<pinref part="U1" gate="E" pin="VSS@36"/> +<wire x1="220.98" y1="307.34" x2="241.3" y2="307.34" width="0.1524" layer="91"/> +<pinref part="U1" gate="E" pin="VSS@70"/> +<wire x1="220.98" y1="220.98" x2="241.3" y2="220.98" width="0.1524" layer="91"/> +<wire x1="241.3" y1="307.34" x2="241.3" y2="304.8" width="0.1524" layer="91"/> +<wire x1="241.3" y1="304.8" x2="241.3" y2="302.26" width="0.1524" layer="91"/> +<wire x1="241.3" y1="302.26" x2="241.3" y2="299.72" width="0.1524" layer="91"/> +<wire x1="241.3" y1="299.72" x2="241.3" y2="297.18" width="0.1524" layer="91"/> +<wire x1="241.3" y1="297.18" x2="241.3" y2="294.64" width="0.1524" layer="91"/> +<wire x1="241.3" y1="294.64" x2="241.3" y2="292.1" width="0.1524" layer="91"/> +<wire x1="241.3" y1="292.1" x2="241.3" y2="289.56" width="0.1524" layer="91"/> +<wire x1="241.3" y1="289.56" x2="241.3" y2="287.02" width="0.1524" layer="91"/> +<wire x1="241.3" y1="287.02" x2="241.3" y2="284.48" width="0.1524" layer="91"/> +<wire x1="241.3" y1="284.48" x2="241.3" y2="281.94" width="0.1524" layer="91"/> +<wire x1="241.3" y1="281.94" x2="241.3" y2="279.4" width="0.1524" layer="91"/> +<wire x1="241.3" y1="279.4" x2="241.3" y2="276.86" width="0.1524" layer="91"/> +<wire x1="241.3" y1="276.86" x2="241.3" y2="274.32" width="0.1524" layer="91"/> +<wire x1="241.3" y1="274.32" x2="241.3" y2="271.78" width="0.1524" layer="91"/> +<wire x1="241.3" y1="271.78" x2="241.3" y2="269.24" width="0.1524" layer="91"/> +<wire x1="241.3" y1="269.24" x2="241.3" y2="266.7" width="0.1524" layer="91"/> +<wire x1="241.3" y1="266.7" x2="241.3" y2="264.16" width="0.1524" layer="91"/> +<wire x1="241.3" y1="264.16" x2="241.3" y2="261.62" width="0.1524" layer="91"/> +<wire x1="241.3" y1="261.62" x2="241.3" y2="259.08" width="0.1524" layer="91"/> +<wire x1="241.3" y1="259.08" x2="241.3" y2="256.54" width="0.1524" layer="91"/> +<wire x1="241.3" y1="256.54" x2="241.3" y2="254" width="0.1524" layer="91"/> +<wire x1="241.3" y1="254" x2="241.3" y2="251.46" width="0.1524" layer="91"/> +<wire x1="241.3" y1="251.46" x2="241.3" y2="248.92" width="0.1524" layer="91"/> +<wire x1="241.3" y1="248.92" x2="241.3" y2="246.38" width="0.1524" layer="91"/> +<wire x1="241.3" y1="246.38" x2="241.3" y2="243.84" width="0.1524" layer="91"/> +<wire x1="241.3" y1="243.84" x2="241.3" y2="241.3" width="0.1524" layer="91"/> +<wire x1="241.3" y1="241.3" x2="241.3" y2="238.76" width="0.1524" layer="91"/> +<wire x1="241.3" y1="238.76" x2="241.3" y2="236.22" width="0.1524" layer="91"/> +<wire x1="241.3" y1="236.22" x2="241.3" y2="233.68" width="0.1524" layer="91"/> +<wire x1="241.3" y1="233.68" x2="241.3" y2="231.14" width="0.1524" layer="91"/> +<wire x1="241.3" y1="231.14" x2="241.3" y2="228.6" width="0.1524" layer="91"/> +<wire x1="241.3" y1="228.6" x2="241.3" y2="226.06" width="0.1524" layer="91"/> +<wire x1="241.3" y1="226.06" x2="241.3" y2="223.52" width="0.1524" layer="91"/> +<wire x1="241.3" y1="223.52" x2="241.3" y2="220.98" width="0.1524" layer="91"/> +<wire x1="241.3" y1="220.98" x2="241.3" y2="218.44" width="0.1524" layer="91"/> +<junction x="241.3" y="220.98"/> +<pinref part="GND5" gate="1" pin="GND"/> +<pinref part="U1" gate="E" pin="VSS@37"/> +<wire x1="220.98" y1="304.8" x2="241.3" y2="304.8" width="0.1524" layer="91"/> +<junction x="241.3" y="304.8"/> +<pinref part="U1" gate="E" pin="VSS@38"/> +<wire x1="220.98" y1="302.26" x2="241.3" y2="302.26" width="0.1524" layer="91"/> +<junction x="241.3" y="302.26"/> +<pinref part="U1" gate="E" pin="VSS@39"/> +<wire x1="220.98" y1="299.72" x2="241.3" y2="299.72" width="0.1524" layer="91"/> +<junction x="241.3" y="299.72"/> +<pinref part="U1" gate="E" pin="VSS@40"/> +<wire x1="220.98" y1="297.18" x2="241.3" y2="297.18" width="0.1524" layer="91"/> +<junction x="241.3" y="297.18"/> +<pinref part="U1" gate="E" pin="VSS@41"/> +<wire x1="220.98" y1="294.64" x2="241.3" y2="294.64" width="0.1524" layer="91"/> +<junction x="241.3" y="294.64"/> +<pinref part="U1" gate="E" pin="VSS@42"/> +<wire x1="220.98" y1="292.1" x2="241.3" y2="292.1" width="0.1524" layer="91"/> +<junction x="241.3" y="292.1"/> +<pinref part="U1" gate="E" pin="VSS@43"/> +<wire x1="220.98" y1="289.56" x2="241.3" y2="289.56" width="0.1524" layer="91"/> +<junction x="241.3" y="289.56"/> +<pinref part="U1" gate="E" pin="VSS@44"/> +<wire x1="220.98" y1="287.02" x2="241.3" y2="287.02" width="0.1524" layer="91"/> +<junction x="241.3" y="287.02"/> +<pinref part="U1" gate="E" pin="VSS@45"/> +<wire x1="220.98" y1="284.48" x2="241.3" y2="284.48" width="0.1524" layer="91"/> +<junction x="241.3" y="284.48"/> +<pinref part="U1" gate="E" pin="VSS@46"/> +<wire x1="220.98" y1="281.94" x2="241.3" y2="281.94" width="0.1524" layer="91"/> +<junction x="241.3" y="281.94"/> +<pinref part="U1" gate="E" pin="VSS@47"/> +<wire x1="220.98" y1="279.4" x2="241.3" y2="279.4" width="0.1524" layer="91"/> +<junction x="241.3" y="279.4"/> +<pinref part="U1" gate="E" pin="VSS@48"/> +<wire x1="220.98" y1="276.86" x2="241.3" y2="276.86" width="0.1524" layer="91"/> +<junction x="241.3" y="276.86"/> +<pinref part="U1" gate="E" pin="VSS@49"/> +<wire x1="220.98" y1="274.32" x2="241.3" y2="274.32" width="0.1524" layer="91"/> +<junction x="241.3" y="274.32"/> +<pinref part="U1" gate="E" pin="VSS@50"/> +<wire x1="220.98" y1="271.78" x2="241.3" y2="271.78" width="0.1524" layer="91"/> +<junction x="241.3" y="271.78"/> +<pinref part="U1" gate="E" pin="VSS@51"/> +<wire x1="220.98" y1="269.24" x2="241.3" y2="269.24" width="0.1524" layer="91"/> +<junction x="241.3" y="269.24"/> +<pinref part="U1" gate="E" pin="VSS@52"/> +<wire x1="220.98" y1="266.7" x2="241.3" y2="266.7" width="0.1524" layer="91"/> +<junction x="241.3" y="266.7"/> +<pinref part="U1" gate="E" pin="VSS@53"/> +<wire x1="220.98" y1="264.16" x2="241.3" y2="264.16" width="0.1524" layer="91"/> +<junction x="241.3" y="264.16"/> +<pinref part="U1" gate="E" pin="VSS@54"/> +<wire x1="220.98" y1="261.62" x2="241.3" y2="261.62" width="0.1524" layer="91"/> +<junction x="241.3" y="261.62"/> +<pinref part="U1" gate="E" pin="VSS@55"/> +<wire x1="220.98" y1="259.08" x2="241.3" y2="259.08" width="0.1524" layer="91"/> +<junction x="241.3" y="259.08"/> +<pinref part="U1" gate="E" pin="VSS@56"/> +<wire x1="220.98" y1="256.54" x2="241.3" y2="256.54" width="0.1524" layer="91"/> +<junction x="241.3" y="256.54"/> +<pinref part="U1" gate="E" pin="VSS@58"/> +<wire x1="220.98" y1="251.46" x2="241.3" y2="251.46" width="0.1524" layer="91"/> +<junction x="241.3" y="251.46"/> +<pinref part="U1" gate="E" pin="VSS@57"/> +<wire x1="220.98" y1="254" x2="241.3" y2="254" width="0.1524" layer="91"/> +<junction x="241.3" y="254"/> +<pinref part="U1" gate="E" pin="VSS@59"/> +<wire x1="220.98" y1="248.92" x2="241.3" y2="248.92" width="0.1524" layer="91"/> +<junction x="241.3" y="248.92"/> +<pinref part="U1" gate="E" pin="VSS@60"/> +<wire x1="220.98" y1="246.38" x2="241.3" y2="246.38" width="0.1524" layer="91"/> +<junction x="241.3" y="246.38"/> +<pinref part="U1" gate="E" pin="VSS@61"/> +<wire x1="220.98" y1="243.84" x2="241.3" y2="243.84" width="0.1524" layer="91"/> +<junction x="241.3" y="243.84"/> +<pinref part="U1" gate="E" pin="VSS@62"/> +<wire x1="220.98" y1="241.3" x2="241.3" y2="241.3" width="0.1524" layer="91"/> +<junction x="241.3" y="241.3"/> +<pinref part="U1" gate="E" pin="VSS@63"/> +<wire x1="220.98" y1="238.76" x2="241.3" y2="238.76" width="0.1524" layer="91"/> +<junction x="241.3" y="238.76"/> +<pinref part="U1" gate="E" pin="VSS@64"/> +<wire x1="220.98" y1="236.22" x2="241.3" y2="236.22" width="0.1524" layer="91"/> +<junction x="241.3" y="236.22"/> +<pinref part="U1" gate="E" pin="VSS@65"/> +<wire x1="220.98" y1="233.68" x2="241.3" y2="233.68" width="0.1524" layer="91"/> +<junction x="241.3" y="233.68"/> +<pinref part="U1" gate="E" pin="VSS@66"/> +<wire x1="220.98" y1="231.14" x2="241.3" y2="231.14" width="0.1524" layer="91"/> +<junction x="241.3" y="231.14"/> +<pinref part="U1" gate="E" pin="VSS@68"/> +<wire x1="220.98" y1="226.06" x2="241.3" y2="226.06" width="0.1524" layer="91"/> +<junction x="241.3" y="226.06"/> +<pinref part="U1" gate="E" pin="VSS@67"/> +<wire x1="220.98" y1="228.6" x2="241.3" y2="228.6" width="0.1524" layer="91"/> +<junction x="241.3" y="228.6"/> +<pinref part="U1" gate="E" pin="VSS@69"/> +<wire x1="220.98" y1="223.52" x2="241.3" y2="223.52" width="0.1524" layer="91"/> +<junction x="241.3" y="223.52"/> +</segment> +<segment> +<pinref part="GND2" gate="1" pin="GND"/> +<wire x1="-12.7" y1="187.96" x2="-12.7" y2="185.42" width="0.1524" layer="91"/> +<pinref part="U1" gate="A" pin="BYPASS_REG1V8"/> +<wire x1="22.86" y1="187.96" x2="20.32" y2="187.96" width="0.1524" layer="91"/> +<wire x1="20.32" y1="187.96" x2="-12.7" y2="187.96" width="0.1524" layer="91"/> +<pinref part="R4" gate="G$1" pin="1"/> +<wire x1="-2.54" y1="208.28" x2="-12.7" y2="208.28" width="0.1524" layer="91"/> +<wire x1="-12.7" y1="208.28" x2="-12.7" y2="187.96" width="0.1524" layer="91"/> +<junction x="-12.7" y="187.96"/> +</segment> +<segment> +<wire x1="134.62" y1="238.76" x2="134.62" y2="190.5" width="0.1524" layer="91"/> +<pinref part="GND3" gate="1" pin="GND"/> +<pinref part="C5" gate="G$1" pin="2"/> +<pinref part="R5" gate="G$1" pin="2"/> +<wire x1="134.62" y1="190.5" x2="134.62" y2="185.42" width="0.1524" layer="91"/> +<wire x1="114.3" y1="190.5" x2="124.46" y2="190.5" width="0.1524" layer="91"/> +<junction x="134.62" y="190.5"/> +<pinref part="C3" gate="G$1" pin="2"/> +<wire x1="124.46" y1="190.5" x2="129.54" y2="190.5" width="0.1524" layer="91"/> +<wire x1="129.54" y1="190.5" x2="134.62" y2="190.5" width="0.1524" layer="91"/> +<wire x1="124.46" y1="190.5" x2="124.46" y2="238.76" width="0.1524" layer="91"/> +<junction x="124.46" y="190.5"/> +<pinref part="C4" gate="G$1" pin="2"/> +<wire x1="129.54" y1="238.76" x2="129.54" y2="190.5" width="0.1524" layer="91"/> +<junction x="129.54" y="190.5"/> +</segment> +<segment> +<pinref part="JP2" gate="A" pin="15"/> +<wire x1="396.24" y1="309.88" x2="368.3" y2="309.88" width="0.1524" layer="91"/> +<wire x1="368.3" y1="309.88" x2="368.3" y2="292.1" width="0.1524" layer="91"/> +<pinref part="GND20" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="GND16" gate="1" pin="GND"/> +<pinref part="C8" gate="G$1" pin="2"/> +<wire x1="355.6" y1="147.32" x2="355.6" y2="132.08" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="D5" gate="G$1" pin="A"/> +<pinref part="GND14" gate="1" pin="GND"/> +<wire x1="342.9" y1="297.18" x2="342.9" y2="289.56" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="D1" gate="G$1" pin="A"/> +<pinref part="GND7" gate="1" pin="GND"/> +<wire x1="259.08" y1="297.18" x2="259.08" y2="289.56" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C6" gate="G$1" pin="2"/> +<pinref part="GND8" gate="1" pin="GND"/> +<wire x1="264.16" y1="297.18" x2="264.16" y2="289.56" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="D2" gate="G$1" pin="A"/> +<pinref part="GND10" gate="1" pin="GND"/> +<wire x1="294.64" y1="63.5" x2="294.64" y2="55.88" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="D3" gate="G$1" pin="A"/> +<pinref part="GND11" gate="1" pin="GND"/> +<wire x1="302.26" y1="63.5" x2="302.26" y2="55.88" width="0.1524" layer="91"/> +</segment> +<segment> +<wire x1="441.96" y1="63.5" x2="441.96" y2="60.96" width="0.1524" layer="91"/> +<wire x1="441.96" y1="60.96" x2="441.96" y2="58.42" width="0.1524" layer="91"/> +<wire x1="441.96" y1="58.42" x2="441.96" y2="55.88" width="0.1524" layer="91"/> +<wire x1="419.1" y1="60.96" x2="426.72" y2="60.96" width="0.1524" layer="91"/> +<wire x1="426.72" y1="60.96" x2="434.34" y2="60.96" width="0.1524" layer="91"/> +<wire x1="434.34" y1="60.96" x2="441.96" y2="60.96" width="0.1524" layer="91"/> +<wire x1="419.1" y1="58.42" x2="441.96" y2="58.42" width="0.1524" layer="91"/> +<pinref part="GND24" gate="1" pin="GND"/> +<junction x="441.96" y="58.42"/> +<junction x="441.96" y="60.96"/> +<pinref part="C20" gate="G$1" pin="2"/> +<wire x1="441.96" y1="68.58" x2="441.96" y2="63.5" width="0.1524" layer="91"/> +<pinref part="U6" gate="G$1" pin="PR1"/> +<pinref part="U6" gate="G$1" pin="CP2"/> +<pinref part="R26" gate="G$1" pin="2"/> +<wire x1="426.72" y1="66.04" x2="426.72" y2="60.96" width="0.1524" layer="91"/> +<wire x1="426.72" y1="60.96" x2="434.34" y2="60.96" width="0.1524" layer="91"/> +<pinref part="C19" gate="G$1" pin="2"/> +<wire x1="434.34" y1="68.58" x2="434.34" y2="60.96" width="0.1524" layer="91"/> +<junction x="426.72" y="60.96"/> +<junction x="434.34" y="60.96"/> +</segment> +<segment> +<pinref part="GND13" gate="1" pin="GND"/> +<pinref part="U2" gate="G$1" pin="GND"/> +<wire x1="314.96" y1="292.1" x2="337.82" y2="292.1" width="0.1524" layer="91"/> +<wire x1="337.82" y1="292.1" x2="337.82" y2="289.56" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="D6" gate="G$1" pin="A"/> +<wire x1="439.42" y1="297.18" x2="439.42" y2="294.64" width="0.1524" layer="91"/> +<pinref part="X2" gate="G$1" pin="1"/> +<wire x1="439.42" y1="294.64" x2="439.42" y2="292.1" width="0.1524" layer="91"/> +<wire x1="396.24" y1="294.64" x2="416.56" y2="294.64" width="0.1524" layer="91"/> +<pinref part="GND23" gate="1" pin="GND"/> +<wire x1="416.56" y1="294.64" x2="439.42" y2="294.64" width="0.1524" layer="91"/> +<wire x1="403.86" y1="309.88" x2="416.56" y2="309.88" width="0.1524" layer="91"/> +<wire x1="416.56" y1="309.88" x2="416.56" y2="294.64" width="0.1524" layer="91"/> +<wire x1="439.42" y1="294.64" x2="439.42" y2="292.1" width="0.1524" layer="91"/> +<pinref part="JP2" gate="A" pin="16"/> +<junction x="416.56" y="294.64"/> +<junction x="439.42" y="294.64"/> +</segment> +<segment> +<pinref part="C1" gate="G$1" pin="1"/> +<wire x1="-7.62" y1="289.56" x2="-12.7" y2="289.56" width="0.1524" layer="91"/> +<wire x1="-12.7" y1="289.56" x2="-12.7" y2="271.78" width="0.1524" layer="91"/> +<pinref part="C2" gate="G$1" pin="1"/> +<wire x1="-12.7" y1="271.78" x2="-12.7" y2="261.62" width="0.1524" layer="91"/> +<wire x1="-7.62" y1="271.78" x2="-12.7" y2="271.78" width="0.1524" layer="91"/> +<pinref part="GND1" gate="1" pin="GND"/> +<junction x="-12.7" y="271.78"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="GND"/> +<wire x1="386.08" y1="208.28" x2="416.56" y2="208.28" width="0.1524" layer="91"/> +<junction x="431.8" y="208.28"/> +<wire x1="416.56" y1="208.28" x2="421.64" y2="208.28" width="0.1524" layer="91"/> +<wire x1="421.64" y1="208.28" x2="426.72" y2="208.28" width="0.1524" layer="91"/> +<wire x1="426.72" y1="208.28" x2="431.8" y2="208.28" width="0.1524" layer="91"/> +<wire x1="431.8" y1="223.52" x2="431.8" y2="208.28" width="0.1524" layer="91"/> +<pinref part="C18" gate="G$1" pin="2"/> +<wire x1="426.72" y1="223.52" x2="426.72" y2="208.28" width="0.1524" layer="91"/> +<pinref part="C17" gate="G$1" pin="2"/> +<pinref part="U4" gate="G$1" pin="GND_(SR_PVSS)"/> +<wire x1="386.08" y1="210.82" x2="416.56" y2="210.82" width="0.1524" layer="91"/> +<pinref part="C15" gate="G$1" pin="2"/> +<wire x1="416.56" y1="223.52" x2="416.56" y2="210.82" width="0.1524" layer="91"/> +<wire x1="416.56" y1="210.82" x2="416.56" y2="208.28" width="0.1524" layer="91"/> +<junction x="426.72" y="208.28"/> +<junction x="416.56" y="208.28"/> +<junction x="416.56" y="210.82"/> +<pinref part="L5" gate="G$1" pin="1"/> +<wire x1="436.88" y1="231.14" x2="436.88" y2="208.28" width="0.1524" layer="91"/> +<pinref part="GND22" gate="1" pin="GND"/> +<wire x1="436.88" y1="208.28" x2="436.88" y2="205.74" width="0.1524" layer="91"/> +<wire x1="431.8" y1="208.28" x2="436.88" y2="208.28" width="0.1524" layer="91"/> +<junction x="436.88" y="208.28"/> +<pinref part="C16" gate="G$1" pin="2"/> +<wire x1="421.64" y1="223.52" x2="421.64" y2="208.28" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="GND9" gate="1" pin="GND"/> +<pinref part="U4" gate="G$1" pin="LPO_IN_(32KHZ)"/> +<wire x1="320.04" y1="261.62" x2="314.96" y2="261.62" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C21" gate="G$1" pin="2"/> +<wire x1="147.32" y1="106.68" x2="147.32" y2="99.06" width="0.1524" layer="91"/> +<pinref part="GND26" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="C22" gate="G$1" pin="2"/> +<wire x1="152.4" y1="106.68" x2="152.4" y2="99.06" width="0.1524" layer="91"/> +<pinref part="GND27" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="U7" gate="U1" pin="GND"/> +<wire x1="172.72" y1="99.06" x2="160.02" y2="99.06" width="0.1524" layer="91"/> +<pinref part="GND28" gate="1" pin="GND"/> +<wire x1="160.02" y1="99.06" x2="157.48" y2="99.06" width="0.1524" layer="91"/> +</segment> +</net> +<net name="NRST" class="0"> +<segment> +<wire x1="403.86" y1="327.66" x2="436.88" y2="327.66" width="0.1524" layer="91"/> +<label x="411.48" y="327.66" size="1.778" layer="95"/> +<pinref part="JP2" gate="A" pin="2"/> +</segment> +<segment> +<pinref part="U1" gate="A" pin="NRST"/> +<wire x1="22.86" y1="218.44" x2="-2.54" y2="218.44" width="0.1524" layer="91"/> +<label x="-7.62" y="218.44" size="1.778" layer="95"/> +<wire x1="-2.54" y1="218.44" x2="-7.62" y2="218.44" width="0.1524" layer="91"/> +<pinref part="R1" gate="G$1" pin="2"/> +<wire x1="-12.7" y1="233.68" x2="-12.7" y2="218.44" width="0.1524" layer="91"/> +<wire x1="-7.62" y1="218.44" x2="-12.7" y2="218.44" width="0.1524" layer="91"/> +</segment> +</net> +<net name="BOOT" class="0"> +<segment> +<wire x1="403.86" y1="325.12" x2="436.88" y2="325.12" width="0.1524" layer="91"/> +<label x="411.48" y="325.12" size="1.778" layer="95"/> +<pinref part="JP2" gate="A" pin="4"/> +</segment> +<segment> +<pinref part="U1" gate="A" pin="BOOT0"/> +<wire x1="93.98" y1="193.04" x2="119.38" y2="193.04" width="0.1524" layer="91"/> +<label x="96.52" y="193.04" size="1.778" layer="95"/> +<wire x1="111.76" y1="187.96" x2="93.98" y2="187.96" width="0.1524" layer="91"/> +<label x="96.52" y="187.96" size="1.778" layer="95"/> +<pinref part="U1" gate="A" pin="BOOT2"/> +<wire x1="111.76" y1="187.96" x2="119.38" y2="187.96" width="0.1524" layer="91"/> +<wire x1="119.38" y1="187.96" x2="119.38" y2="193.04" width="0.1524" layer="91"/> +<wire x1="119.38" y1="193.04" x2="119.38" y2="198.12" width="0.1524" layer="91"/> +<junction x="119.38" y="193.04"/> +<pinref part="R6" gate="G$1" pin="2"/> +</segment> +</net> +<net name="VBUS" class="0"> +<segment> +<pinref part="VBUS1" gate="G$1" pin="VBUS"/> +<wire x1="335.28" y1="111.76" x2="335.28" y2="104.14" width="0.1524" layer="91"/> +<pinref part="L1" gate="G$1" pin="2"/> +<wire x1="322.58" y1="104.14" x2="335.28" y2="104.14" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="VBUS2" gate="G$1" pin="VBUS"/> +<wire x1="363.22" y1="106.68" x2="368.3" y2="106.68" width="0.1524" layer="91"/> +<wire x1="363.22" y1="111.76" x2="363.22" y2="106.68" width="0.1524" layer="91"/> +<wire x1="363.22" y1="106.68" x2="368.3" y2="106.68" width="0.1524" layer="91"/> +<pinref part="C11" gate="G$1" pin="1"/> +<wire x1="368.3" y1="86.36" x2="368.3" y2="106.68" width="0.1524" layer="91"/> +<pinref part="C10" gate="G$1" pin="1"/> +<wire x1="363.22" y1="73.66" x2="363.22" y2="106.68" width="0.1524" layer="91"/> +<junction x="363.22" y="106.68"/> +<junction x="368.3" y="106.68"/> +<wire x1="368.3" y1="106.68" x2="388.62" y2="106.68" width="0.1524" layer="91"/> +<pinref part="R23" gate="G$1" pin="1"/> +<wire x1="388.62" y1="106.68" x2="393.7" y2="106.68" width="0.1524" layer="91"/> +<wire x1="388.62" y1="104.14" x2="388.62" y2="106.68" width="0.1524" layer="91"/> +<junction x="388.62" y="106.68"/> +<pinref part="U6" gate="G$1" pin="IN1"/> +</segment> +</net> +<net name="DCMI_D0" class="0"> +<segment> +<wire x1="287.02" y1="134.62" x2="256.54" y2="134.62" width="0.1524" layer="91"/> +<label x="256.54" y="134.62" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="31"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PH9"/> +<wire x1="91.44" y1="101.6" x2="124.46" y2="101.6" width="0.1524" layer="91"/> +<label x="96.52" y="101.6" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D1" class="0"> +<segment> +<wire x1="287.02" y1="137.16" x2="256.54" y2="137.16" width="0.1524" layer="91"/> +<label x="256.54" y="137.16" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="29"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PH10"/> +<wire x1="91.44" y1="99.06" x2="124.46" y2="99.06" width="0.1524" layer="91"/> +<label x="96.52" y="99.06" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_PCLK" class="0"> +<segment> +<wire x1="309.88" y1="157.48" x2="340.36" y2="157.48" width="0.1524" layer="91"/> +<label x="312.42" y="157.48" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="14"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PA6"/> +<wire x1="162.56" y1="63.5" x2="142.24" y2="63.5" width="0.1524" layer="91"/> +<label x="142.24" y="63.5" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_HSYNC" class="0"> +<segment> +<wire x1="309.88" y1="152.4" x2="340.36" y2="152.4" width="0.1524" layer="91"/> +<label x="312.42" y="152.4" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="18"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PH8"/> +<wire x1="91.44" y1="104.14" x2="124.46" y2="104.14" width="0.1524" layer="91"/> +<label x="96.52" y="104.14" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_VSYNC" class="0"> +<segment> +<wire x1="309.88" y1="154.94" x2="340.36" y2="154.94" width="0.1524" layer="91"/> +<label x="312.42" y="154.94" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="16"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PI5"/> +<wire x1="91.44" y1="63.5" x2="124.46" y2="63.5" width="0.1524" layer="91"/> +<label x="96.52" y="63.5" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_CLK" class="0"> +<segment> +<wire x1="309.88" y1="160.02" x2="340.36" y2="160.02" width="0.1524" layer="91"/> +<label x="312.42" y="160.02" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="12"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PE11"/> +<wire x1="30.48" y1="96.52" x2="-7.62" y2="96.52" width="0.1524" layer="91"/> +<label x="-7.62" y="96.52" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_RST" class="0"> +<segment> +<wire x1="287.02" y1="147.32" x2="256.54" y2="147.32" width="0.1524" layer="91"/> +<label x="256.54" y="147.32" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="21"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PF4"/> +<wire x1="30.48" y1="66.04" x2="-7.62" y2="66.04" width="0.1524" layer="91"/> +<label x="-7.62" y="66.04" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_PWDN" class="0"> +<segment> +<wire x1="287.02" y1="142.24" x2="256.54" y2="142.24" width="0.1524" layer="91"/> +<label x="256.54" y="142.24" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="25"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PF1"/> +<wire x1="30.48" y1="73.66" x2="-7.62" y2="73.66" width="0.1524" layer="91"/> +<label x="-7.62" y="73.66" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D2" class="0"> +<segment> +<wire x1="287.02" y1="129.54" x2="256.54" y2="129.54" width="0.1524" layer="91"/> +<label x="256.54" y="129.54" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="35"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PH11"/> +<wire x1="91.44" y1="96.52" x2="124.46" y2="96.52" width="0.1524" layer="91"/> +<label x="96.52" y="96.52" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D3" class="0"> +<segment> +<wire x1="309.88" y1="139.7" x2="340.36" y2="139.7" width="0.1524" layer="91"/> +<label x="312.42" y="139.7" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="28"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PH12"/> +<wire x1="91.44" y1="93.98" x2="124.46" y2="93.98" width="0.1524" layer="91"/> +<label x="96.52" y="93.98" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D4" class="0"> +<segment> +<wire x1="309.88" y1="142.24" x2="340.36" y2="142.24" width="0.1524" layer="91"/> +<label x="312.42" y="142.24" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="26"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PH14"/> +<wire x1="91.44" y1="88.9" x2="124.46" y2="88.9" width="0.1524" layer="91"/> +<label x="96.52" y="88.9" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D5" class="0"> +<segment> +<wire x1="287.02" y1="132.08" x2="256.54" y2="132.08" width="0.1524" layer="91"/> +<label x="256.54" y="132.08" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="33"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PI4"/> +<wire x1="91.44" y1="66.04" x2="124.46" y2="66.04" width="0.1524" layer="91"/> +<label x="96.52" y="66.04" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D6" class="0"> +<segment> +<wire x1="309.88" y1="144.78" x2="340.36" y2="144.78" width="0.1524" layer="91"/> +<label x="312.42" y="144.78" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="24"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PB8"/> +<wire x1="162.56" y1="10.16" x2="142.24" y2="10.16" width="0.1524" layer="91"/> +<label x="142.24" y="10.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D7" class="0"> +<segment> +<wire x1="309.88" y1="147.32" x2="340.36" y2="147.32" width="0.1524" layer="91"/> +<label x="312.42" y="147.32" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="22"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PE6"/> +<wire x1="30.48" y1="109.22" x2="-7.62" y2="109.22" width="0.1524" layer="91"/> +<label x="-7.62" y="109.22" size="1.778" layer="95"/> +</segment> +</net> +<net name="LED_G" class="0"> +<segment> +<wire x1="378.46" y1="25.4" x2="363.22" y2="25.4" width="0.1524" layer="91"/> +<label x="363.22" y="25.4" size="1.778" layer="95"/> +<pinref part="R21" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PE9"/> +<wire x1="30.48" y1="101.6" x2="-7.62" y2="101.6" width="0.1524" layer="91"/> +<label x="-7.62" y="101.6" size="1.778" layer="95"/> +</segment> +</net> +<net name="LED_B" class="0"> +<segment> +<wire x1="378.46" y1="27.94" x2="363.22" y2="27.94" width="0.1524" layer="91"/> +<label x="363.22" y="27.94" size="1.778" layer="95"/> +<pinref part="R20" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PE10"/> +<wire x1="30.48" y1="99.06" x2="-7.62" y2="99.06" width="0.1524" layer="91"/> +<label x="-7.62" y="99.06" size="1.778" layer="95"/> +</segment> +</net> +<net name="LED_R" class="0"> +<segment> +<wire x1="378.46" y1="30.48" x2="363.22" y2="30.48" width="0.1524" layer="91"/> +<label x="363.22" y="30.48" size="1.778" layer="95"/> +<pinref part="R19" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PE8"/> +<wire x1="30.48" y1="104.14" x2="-7.62" y2="104.14" width="0.1524" layer="91"/> +<label x="-7.62" y="104.14" size="1.778" layer="95"/> +</segment> +</net> +<net name="TIM4_CH1" class="0"> +<segment> +<wire x1="403.86" y1="314.96" x2="436.88" y2="314.96" width="0.1524" layer="91"/> +<label x="411.48" y="314.96" size="1.778" layer="95"/> +<pinref part="JP2" gate="A" pin="12"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PD12"/> +<wire x1="223.52" y1="0" x2="243.84" y2="0" width="0.1524" layer="91"/> +<label x="228.6" y="0" size="1.778" layer="95"/> +</segment> +</net> +<net name="TIM4_CH2" class="0"> +<segment> +<wire x1="403.86" y1="317.5" x2="436.88" y2="317.5" width="0.1524" layer="91"/> +<label x="411.48" y="317.5" size="1.778" layer="95"/> +<pinref part="JP2" gate="A" pin="10"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PD13"/> +<wire x1="223.52" y1="-2.54" x2="243.84" y2="-2.54" width="0.1524" layer="91"/> +<label x="228.6" y="-2.54" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$5" class="0"> +<segment> +<pinref part="Q1" gate="G$1" pin="G"/> +<wire x1="388.62" y1="17.78" x2="398.78" y2="17.78" width="0.1524" layer="91"/> +<wire x1="398.78" y1="17.78" x2="398.78" y2="12.7" width="0.1524" layer="91"/> +<pinref part="R16" gate="G$1" pin="2"/> +<wire x1="398.78" y1="12.7" x2="398.78" y2="5.08" width="0.1524" layer="91"/> +<wire x1="398.78" y1="12.7" x2="363.22" y2="12.7" width="0.1524" layer="91"/> +<wire x1="363.22" y1="12.7" x2="363.22" y2="10.16" width="0.1524" layer="91"/> +<junction x="398.78" y="12.7"/> +<pinref part="R22" gate="G$1" pin="2"/> +</segment> +</net> +<net name="N$8" class="0"> +<segment> +<wire x1="388.62" y1="30.48" x2="403.86" y2="30.48" width="0.1524" layer="91"/> +<pinref part="LED1" gate="G$1" pin="RED"/> +<pinref part="R19" gate="G$1" pin="2"/> +</segment> +</net> +<net name="LED_IR" class="0"> +<segment> +<wire x1="363.22" y1="17.78" x2="378.46" y2="17.78" width="0.1524" layer="91"/> +<label x="363.22" y="17.78" size="1.778" layer="95"/> +<pinref part="R22" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PZ0"/> +<wire x1="91.44" y1="27.94" x2="124.46" y2="27.94" width="0.1524" layer="91"/> +<label x="96.52" y="27.94" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$14" class="0"> +<segment> +<pinref part="Q1" gate="G$1" pin="D"/> +<wire x1="403.86" y1="-2.54" x2="406.4" y2="-2.54" width="0.1524" layer="91"/> +<pinref part="R25" gate="G$1" pin="1"/> +</segment> +</net> +<net name="N$10" class="0"> +<segment> +<wire x1="416.56" y1="-2.54" x2="419.1" y2="-2.54" width="0.1524" layer="91"/> +<pinref part="R25" gate="G$1" pin="2"/> +<pinref part="LED2" gate="G$1" pin="C"/> +</segment> +</net> +<net name="SPI2_SCLK" class="0"> +<segment> +<wire x1="269.24" y1="322.58" x2="299.72" y2="322.58" width="0.1524" layer="91"/> +<label x="269.24" y="322.58" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="5"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PB10"/> +<wire x1="162.56" y1="5.08" x2="142.24" y2="5.08" width="0.1524" layer="91"/> +<label x="142.24" y="5.08" size="1.778" layer="95"/> +</segment> +</net> +<net name="I2C2_SCL" class="0"> +<segment> +<wire x1="299.72" y1="317.5" x2="269.24" y2="317.5" width="0.1524" layer="91"/> +<label x="269.24" y="317.5" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="9"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PZ2"/> +<wire x1="91.44" y1="22.86" x2="124.46" y2="22.86" width="0.1524" layer="91"/> +<label x="96.52" y="22.86" size="1.778" layer="95"/> +</segment> +</net> +<net name="I2C2_SDA" class="0"> +<segment> +<wire x1="299.72" y1="314.96" x2="269.24" y2="314.96" width="0.1524" layer="91"/> +<label x="269.24" y="314.96" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="11"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PZ1"/> +<wire x1="91.44" y1="25.4" x2="124.46" y2="25.4" width="0.1524" layer="91"/> +<label x="96.52" y="25.4" size="1.778" layer="95"/> +</segment> +</net> +<net name="SPI2_NSS" class="0"> +<segment> +<wire x1="269.24" y1="320.04" x2="299.72" y2="320.04" width="0.1524" layer="91"/> +<label x="269.24" y="320.04" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="7"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PB12"/> +<wire x1="162.56" y1="0" x2="142.24" y2="0" width="0.1524" layer="91"/> +<label x="142.24" y="0" size="1.778" layer="95"/> +</segment> +</net> +<net name="SPI2_MISO" class="0"> +<segment> +<wire x1="269.24" y1="325.12" x2="299.72" y2="325.12" width="0.1524" layer="91"/> +<label x="269.24" y="325.12" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="3"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PC2"/> +<wire x1="223.52" y1="73.66" x2="243.84" y2="73.66" width="0.1524" layer="91"/> +<label x="228.6" y="73.66" size="1.778" layer="95"/> +</segment> +</net> +<net name="SPI2_MOSI" class="0"> +<segment> +<wire x1="269.24" y1="327.66" x2="299.72" y2="327.66" width="0.1524" layer="91"/> +<label x="269.24" y="327.66" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="1"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PC3"/> +<wire x1="223.52" y1="71.12" x2="243.84" y2="71.12" width="0.1524" layer="91"/> +<label x="228.6" y="71.12" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$17" class="0"> +<segment> +<wire x1="434.34" y1="-2.54" x2="426.72" y2="-2.54" width="0.1524" layer="91"/> +<pinref part="LED2" gate="G$1" pin="A"/> +<pinref part="LED3" gate="G$1" pin="C"/> +</segment> +</net> +<net name="TIM4_CH3" class="0"> +<segment> +<wire x1="403.86" y1="320.04" x2="436.88" y2="320.04" width="0.1524" layer="91"/> +<label x="411.48" y="320.04" size="1.778" layer="95"/> +<pinref part="JP2" gate="A" pin="8"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PD14"/> +<wire x1="223.52" y1="-5.08" x2="243.84" y2="-5.08" width="0.1524" layer="91"/> +<label x="228.6" y="-5.08" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$6" class="0"> +<segment> +<pinref part="LED1" gate="G$1" pin="BLU"/> +<wire x1="388.62" y1="27.94" x2="403.86" y2="27.94" width="0.1524" layer="91"/> +<pinref part="R20" gate="G$1" pin="2"/> +</segment> +</net> +<net name="N$9" class="0"> +<segment> +<pinref part="LED1" gate="G$1" pin="GRN"/> +<wire x1="403.86" y1="25.4" x2="388.62" y2="25.4" width="0.1524" layer="91"/> +<pinref part="R21" gate="G$1" pin="2"/> +</segment> +</net> +<net name="VIN" class="0"> +<segment> +<pinref part="U1" gate="A" pin="PMIC_LDO25IN"/> +<wire x1="22.86" y1="259.08" x2="7.62" y2="259.08" width="0.1524" layer="91"/> +<pinref part="U1" gate="A" pin="PMIC_SWIN@2"/> +<wire x1="22.86" y1="269.24" x2="7.62" y2="269.24" width="0.1524" layer="91"/> +<wire x1="7.62" y1="269.24" x2="7.62" y2="271.78" width="0.1524" layer="91"/> +<pinref part="U1" gate="A" pin="PMIC_SWIN@1"/> +<wire x1="22.86" y1="271.78" x2="7.62" y2="271.78" width="0.1524" layer="91"/> +<junction x="7.62" y="271.78"/> +<pinref part="U1" gate="A" pin="PMIC_BSTIN@4"/> +<wire x1="22.86" y1="281.94" x2="7.62" y2="281.94" width="0.1524" layer="91"/> +<wire x1="7.62" y1="281.94" x2="7.62" y2="284.48" width="0.1524" layer="91"/> +<pinref part="U1" gate="A" pin="PMIC_BSTIN@3"/> +<wire x1="7.62" y1="284.48" x2="7.62" y2="287.02" width="0.1524" layer="91"/> +<wire x1="7.62" y1="287.02" x2="7.62" y2="289.56" width="0.1524" layer="91"/> +<wire x1="22.86" y1="284.48" x2="7.62" y2="284.48" width="0.1524" layer="91"/> +<junction x="7.62" y="284.48"/> +<pinref part="U1" gate="A" pin="PMIC_BSTIN@2"/> +<wire x1="22.86" y1="287.02" x2="7.62" y2="287.02" width="0.1524" layer="91"/> +<junction x="7.62" y="287.02"/> +<pinref part="U1" gate="A" pin="PMIC_BSTIN@1"/> +<wire x1="22.86" y1="289.56" x2="7.62" y2="289.56" width="0.1524" layer="91"/> +<junction x="7.62" y="289.56"/> +<pinref part="U1" gate="A" pin="VIN@4"/> +<wire x1="22.86" y1="299.72" x2="7.62" y2="299.72" width="0.1524" layer="91"/> +<wire x1="7.62" y1="299.72" x2="7.62" y2="302.26" width="0.1524" layer="91"/> +<pinref part="U1" gate="A" pin="VIN@3"/> +<wire x1="7.62" y1="302.26" x2="7.62" y2="304.8" width="0.1524" layer="91"/> +<wire x1="7.62" y1="304.8" x2="7.62" y2="307.34" width="0.1524" layer="91"/> +<wire x1="7.62" y1="307.34" x2="7.62" y2="309.88" width="0.1524" layer="91"/> +<wire x1="22.86" y1="302.26" x2="7.62" y2="302.26" width="0.1524" layer="91"/> +<junction x="7.62" y="302.26"/> +<pinref part="U1" gate="A" pin="VIN@2"/> +<wire x1="22.86" y1="304.8" x2="7.62" y2="304.8" width="0.1524" layer="91"/> +<junction x="7.62" y="304.8"/> +<pinref part="U1" gate="A" pin="VIN@1"/> +<wire x1="7.62" y1="304.8" x2="7.62" y2="307.34" width="0.1524" layer="91"/> +<wire x1="7.62" y1="307.34" x2="22.86" y2="307.34" width="0.1524" layer="91"/> +<junction x="7.62" y="307.34"/> +<pinref part="VIN1" gate="G$1" pin="VIN"/> +<wire x1="7.62" y1="289.56" x2="7.62" y2="299.72" width="0.1524" layer="91" style="longdash"/> +<junction x="7.62" y="299.72"/> +<wire x1="7.62" y1="271.78" x2="7.62" y2="281.94" width="0.1524" layer="91" style="longdash"/> +<junction x="7.62" y="281.94"/> +<wire x1="7.62" y1="259.08" x2="7.62" y2="269.24" width="0.1524" layer="91" style="longdash"/> +<junction x="7.62" y="269.24"/> +<pinref part="C1" gate="G$1" pin="2"/> +<wire x1="7.62" y1="289.56" x2="0" y2="289.56" width="0.1524" layer="91"/> +<pinref part="C2" gate="G$1" pin="2"/> +<wire x1="0" y1="271.78" x2="7.62" y2="271.78" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C20" gate="G$1" pin="1"/> +<pinref part="VIN2" gate="G$1" pin="VIN"/> +<wire x1="441.96" y1="76.2" x2="441.96" y2="106.68" width="0.1524" layer="91"/> +<wire x1="441.96" y1="106.68" x2="441.96" y2="111.76" width="0.1524" layer="91"/> +<wire x1="419.1" y1="106.68" x2="434.34" y2="106.68" width="0.1524" layer="91"/> +<junction x="441.96" y="106.68"/> +<pinref part="U6" gate="G$1" pin="OUT"/> +<wire x1="434.34" y1="106.68" x2="441.96" y2="106.68" width="0.1524" layer="91"/> +</segment> +</net> +<net name="DCMI_FSIN" class="0"> +<segment> +<wire x1="403.86" y1="322.58" x2="436.88" y2="322.58" width="0.1524" layer="91"/> +<label x="411.48" y="322.58" size="1.778" layer="95"/> +<pinref part="JP2" gate="A" pin="6"/> +</segment> +<segment> +<wire x1="287.02" y1="144.78" x2="256.54" y2="144.78" width="0.1524" layer="91"/> +<label x="256.54" y="144.78" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="23"/> +</segment> +</net> +<net name="SPI3_MISO" class="0"> +<segment> +<wire x1="287.02" y1="154.94" x2="256.54" y2="154.94" width="0.1524" layer="91"/> +<label x="256.54" y="154.94" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="15"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PD10"/> +<wire x1="223.52" y1="5.08" x2="243.84" y2="5.08" width="0.1524" layer="91"/> +<label x="228.6" y="5.08" size="1.778" layer="95"/> +</segment> +</net> +<net name="SPI3_MOSI" class="0"> +<segment> +<wire x1="287.02" y1="152.4" x2="256.54" y2="152.4" width="0.1524" layer="91"/> +<label x="256.54" y="152.4" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="17"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PA8"/> +<wire x1="162.56" y1="58.42" x2="142.24" y2="58.42" width="0.1524" layer="91"/> +<label x="142.24" y="58.42" size="1.778" layer="95"/> +</segment> +</net> +<net name="SPI3_SSEL" class="0"> +<segment> +<wire x1="287.02" y1="160.02" x2="256.54" y2="160.02" width="0.1524" layer="91"/> +<label x="256.54" y="160.02" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="11"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PA15"/> +<wire x1="162.56" y1="40.64" x2="142.24" y2="40.64" width="0.1524" layer="91"/> +<label x="142.24" y="40.64" size="1.778" layer="95"/> +</segment> +</net> +<net name="USBD_DP" class="0"> +<segment> +<pinref part="U1" gate="D" pin="USB_DP2"/> +<wire x1="271.78" y1="-20.32" x2="251.46" y2="-20.32" width="0.1524" layer="91"/> +<label x="251.46" y="-20.32" size="1.778" layer="95"/> +</segment> +<segment> +<label x="322.58" y="86.36" size="1.778" layer="95"/> +<wire x1="322.58" y1="86.36" x2="332.74" y2="86.36" width="0.1524" layer="91"/> +<pinref part="U3" gate="G$1" pin="DM_O"/> +</segment> +</net> +<net name="USBD_DM" class="0"> +<segment> +<pinref part="U1" gate="D" pin="USB_DM2"/> +<wire x1="271.78" y1="-17.78" x2="251.46" y2="-17.78" width="0.1524" layer="91"/> +<label x="251.46" y="-17.78" size="1.778" layer="95"/> +</segment> +<segment> +<label x="322.58" y="88.9" size="1.778" layer="95"/> +<wire x1="322.58" y1="88.9" x2="332.74" y2="88.9" width="0.1524" layer="91"/> +<pinref part="U3" gate="G$1" pin="DP_O"/> +</segment> +</net> +<net name="N$34" class="0"> +<segment> +<pinref part="L1" gate="G$1" pin="1"/> +<wire x1="309.88" y1="99.06" x2="292.1" y2="99.06" width="0.1524" layer="91"/> +<wire x1="292.1" y1="99.06" x2="292.1" y2="104.14" width="0.1524" layer="91"/> +<wire x1="292.1" y1="104.14" x2="309.88" y2="104.14" width="0.1524" layer="91"/> +<pinref part="D4" gate="G$1" pin="C"/> +<pinref part="J1" gate="G$1" pin="VBUS"/> +<junction x="292.1" y="104.14"/> +<wire x1="292.1" y1="104.14" x2="284.48" y2="104.14" width="0.1524" layer="91"/> +</segment> +</net> +<net name="SDMMC1_D0" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PC8"/> +<wire x1="223.52" y1="58.42" x2="243.84" y2="58.42" width="0.1524" layer="91"/> +<label x="228.6" y="58.42" size="1.778" layer="95"/> +</segment> +<segment> +<label x="363.22" y="162.56" size="1.778" layer="95"/> +<pinref part="U5" gate="G$1" pin="DAT0_IN"/> +<wire x1="378.46" y1="162.56" x2="363.22" y2="162.56" width="0.1524" layer="91"/> +</segment> +</net> +<net name="SDMMC1_D1" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PC9"/> +<wire x1="223.52" y1="55.88" x2="243.84" y2="55.88" width="0.1524" layer="91"/> +<label x="228.6" y="55.88" size="1.778" layer="95"/> +</segment> +<segment> +<label x="363.22" y="160.02" size="1.778" layer="95"/> +<pinref part="U5" gate="G$1" pin="DAT1_IN"/> +<wire x1="378.46" y1="160.02" x2="363.22" y2="160.02" width="0.1524" layer="91"/> +</segment> +</net> +<net name="SDMMC1_D2" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PC10"/> +<wire x1="223.52" y1="53.34" x2="243.84" y2="53.34" width="0.1524" layer="91"/> +<label x="228.6" y="53.34" size="1.778" layer="95"/> +</segment> +<segment> +<label x="363.22" y="157.48" size="1.778" layer="95"/> +<pinref part="U5" gate="G$1" pin="DAT2_IN"/> +<wire x1="378.46" y1="157.48" x2="363.22" y2="157.48" width="0.1524" layer="91"/> +</segment> +</net> +<net name="SDMMC1_D3" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PC11"/> +<wire x1="223.52" y1="50.8" x2="243.84" y2="50.8" width="0.1524" layer="91"/> +<label x="228.6" y="50.8" size="1.778" layer="95"/> +</segment> +<segment> +<label x="363.22" y="154.94" size="1.778" layer="95"/> +<pinref part="U5" gate="G$1" pin="DAT3_IN"/> +<wire x1="378.46" y1="154.94" x2="363.22" y2="154.94" width="0.1524" layer="91"/> +</segment> +</net> +<net name="SDMMC1_CK" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PC12"/> +<wire x1="223.52" y1="48.26" x2="243.84" y2="48.26" width="0.1524" layer="91"/> +<label x="228.6" y="48.26" size="1.778" layer="95"/> +</segment> +<segment> +<label x="363.22" y="165.1" size="1.778" layer="95"/> +<pinref part="U5" gate="G$1" pin="CLK_IN"/> +<wire x1="378.46" y1="165.1" x2="363.22" y2="165.1" width="0.1524" layer="91"/> +</segment> +</net> +<net name="SDMMC1_CMD" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD2"/> +<wire x1="223.52" y1="25.4" x2="243.84" y2="25.4" width="0.1524" layer="91"/> +<label x="228.6" y="25.4" size="1.778" layer="95"/> +</segment> +<segment> +<label x="363.22" y="167.64" size="1.778" layer="95"/> +<pinref part="U5" gate="G$1" pin="CMD_IN"/> +<wire x1="378.46" y1="167.64" x2="363.22" y2="167.64" width="0.1524" layer="91"/> +</segment> +</net> +<net name="USD_DETECT" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB7"/> +<wire x1="162.56" y1="12.7" x2="142.24" y2="12.7" width="0.1524" layer="91"/> +<label x="142.24" y="12.7" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="X3" gate="G$1" pin="DETECT_SWITCH"/> +<wire x1="421.64" y1="152.4" x2="408.94" y2="152.4" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="WP/CD"/> +<label x="411.48" y="152.4" size="1.778" layer="95"/> +</segment> +</net> +<net name="DCMI_D8" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PI1"/> +<wire x1="91.44" y1="73.66" x2="124.46" y2="73.66" width="0.1524" layer="91"/> +<label x="96.52" y="73.66" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="287.02" y1="170.18" x2="256.54" y2="170.18" width="0.1524" layer="91"/> +<label x="256.54" y="170.18" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="3"/> +</segment> +</net> +<net name="DCMI_D9" class="0"> +<segment> +<wire x1="287.02" y1="172.72" x2="256.54" y2="172.72" width="0.1524" layer="91"/> +<label x="256.54" y="172.72" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PI2"/> +<wire x1="91.44" y1="71.12" x2="124.46" y2="71.12" width="0.1524" layer="91"/> +<label x="96.52" y="71.12" size="1.778" layer="95"/> +</segment> +</net> +<net name="SPI3_SCLK" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PE0"/> +<wire x1="30.48" y1="124.46" x2="-7.62" y2="124.46" width="0.1524" layer="91"/> +<label x="-7.62" y="124.46" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="287.02" y1="157.48" x2="256.54" y2="157.48" width="0.1524" layer="91"/> +<label x="256.54" y="157.48" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="13"/> +</segment> +</net> +<net name="UART4_RX" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB2"/> +<wire x1="162.56" y1="25.4" x2="142.24" y2="25.4" width="0.1524" layer="91"/> +<label x="142.24" y="25.4" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="6"/> +<wire x1="307.34" y1="322.58" x2="337.82" y2="322.58" width="0.1524" layer="91"/> +<label x="314.96" y="322.58" size="1.778" layer="95"/> +</segment> +</net> +<net name="UART4_TX" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PG11"/> +<wire x1="30.48" y1="0" x2="-7.62" y2="0" width="0.1524" layer="91"/> +<label x="-7.62" y="0" size="1.778" layer="95"/> +<wire x1="-7.62" y1="0" x2="-12.7" y2="0" width="0.1524" layer="91"/> +<wire x1="-12.7" y1="15.24" x2="-12.7" y2="0" width="0.1524" layer="91"/> +<pinref part="R2" gate="G$1" pin="2"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="8"/> +<wire x1="307.34" y1="320.04" x2="337.82" y2="320.04" width="0.1524" layer="91"/> +<label x="314.96" y="320.04" size="1.778" layer="95"/> +</segment> +</net> +<net name="EEPROM_WP" class="0"> +<segment> +<pinref part="SJ1" gate="1" pin="1"/> +<wire x1="7.62" y1="198.12" x2="-7.62" y2="198.12" width="0.1524" layer="91"/> +<label x="-7.62" y="198.12" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PI6"/> +<wire x1="91.44" y1="60.96" x2="124.46" y2="60.96" width="0.1524" layer="91"/> +<label x="96.52" y="60.96" size="1.778" layer="95"/> +</segment> +</net> +<net name="VDD" class="0"> +<segment> +<pinref part="U1" gate="A" pin="VBAT"/> +<wire x1="93.98" y1="203.2" x2="109.22" y2="203.2" width="0.1524" layer="91"/> +<wire x1="109.22" y1="203.2" x2="111.76" y2="203.2" width="0.1524" layer="91"/> +<wire x1="111.76" y1="203.2" x2="111.76" y2="213.36" width="0.1524" layer="91"/> +<pinref part="U1" gate="A" pin="VDD@1"/> +<wire x1="111.76" y1="213.36" x2="111.76" y2="215.9" width="0.1524" layer="91"/> +<wire x1="111.76" y1="215.9" x2="111.76" y2="218.44" width="0.1524" layer="91"/> +<wire x1="111.76" y1="218.44" x2="111.76" y2="228.6" width="0.1524" layer="91"/> +<wire x1="111.76" y1="228.6" x2="111.76" y2="231.14" width="0.1524" layer="91"/> +<wire x1="111.76" y1="231.14" x2="111.76" y2="233.68" width="0.1524" layer="91"/> +<wire x1="111.76" y1="233.68" x2="111.76" y2="236.22" width="0.1524" layer="91"/> +<wire x1="111.76" y1="236.22" x2="111.76" y2="238.76" width="0.1524" layer="91"/> +<wire x1="111.76" y1="238.76" x2="111.76" y2="241.3" width="0.1524" layer="91"/> +<wire x1="111.76" y1="241.3" x2="111.76" y2="246.38" width="0.1524" layer="91"/> +<wire x1="93.98" y1="241.3" x2="111.76" y2="241.3" width="0.1524" layer="91"/> +<junction x="111.76" y="241.3"/> +<pinref part="U1" gate="A" pin="VDD@2"/> +<wire x1="93.98" y1="238.76" x2="111.76" y2="238.76" width="0.1524" layer="91"/> +<junction x="111.76" y="238.76"/> +<pinref part="U1" gate="A" pin="VDD@3"/> +<wire x1="93.98" y1="236.22" x2="111.76" y2="236.22" width="0.1524" layer="91"/> +<junction x="111.76" y="236.22"/> +<pinref part="U1" gate="A" pin="VDD@4"/> +<wire x1="93.98" y1="233.68" x2="111.76" y2="233.68" width="0.1524" layer="91"/> +<junction x="111.76" y="233.68"/> +<pinref part="U1" gate="A" pin="VDD@5"/> +<wire x1="93.98" y1="231.14" x2="111.76" y2="231.14" width="0.1524" layer="91"/> +<junction x="111.76" y="231.14"/> +<pinref part="U1" gate="A" pin="VDD@6"/> +<wire x1="93.98" y1="228.6" x2="111.76" y2="228.6" width="0.1524" layer="91"/> +<junction x="111.76" y="228.6"/> +<pinref part="U1" gate="A" pin="VDD@7"/> +<wire x1="93.98" y1="218.44" x2="111.76" y2="218.44" width="0.1524" layer="91"/> +<junction x="111.76" y="218.44"/> +<pinref part="U1" gate="A" pin="VDD@8"/> +<wire x1="93.98" y1="215.9" x2="111.76" y2="215.9" width="0.1524" layer="91"/> +<junction x="111.76" y="215.9"/> +<pinref part="U1" gate="A" pin="VDD@9"/> +<wire x1="93.98" y1="213.36" x2="111.76" y2="213.36" width="0.1524" layer="91"/> +<junction x="111.76" y="213.36"/> +<pinref part="VDD1" gate="G$1" pin="VDD"/> +</segment> +</net> +<net name="3V3" class="0"> +<segment> +<pinref part="R6" gate="G$1" pin="1"/> +<pinref part="3V34" gate="G$1" pin="3V3"/> +<wire x1="119.38" y1="256.54" x2="119.38" y2="208.28" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="U1" gate="A" pin="PMIC_VOUT4@2"/> +<pinref part="3V35" gate="G$1" pin="3V3"/> +<wire x1="93.98" y1="304.8" x2="127" y2="304.8" width="0.1524" layer="91"/> +<wire x1="127" y1="304.8" x2="134.62" y2="304.8" width="0.1524" layer="91"/> +<wire x1="134.62" y1="304.8" x2="134.62" y2="307.34" width="0.1524" layer="91"/> +<wire x1="134.62" y1="307.34" x2="134.62" y2="312.42" width="0.1524" layer="91"/> +<wire x1="134.62" y1="304.8" x2="134.62" y2="246.38" width="0.1524" layer="91"/> +<junction x="134.62" y="304.8"/> +<pinref part="U1" gate="A" pin="PMIC_VOUT4@1"/> +<wire x1="93.98" y1="307.34" x2="109.22" y2="307.34" width="0.1524" layer="91"/> +<wire x1="109.22" y1="307.34" x2="134.62" y2="307.34" width="0.1524" layer="91"/> +<junction x="134.62" y="307.34"/> +<pinref part="C5" gate="G$1" pin="1"/> +</segment> +<segment> +<junction x="360.68" y="172.72"/> +<junction x="360.68" y="172.72"/> +<wire x1="360.68" y1="172.72" x2="355.6" y2="172.72" width="0.1524" layer="91"/> +<wire x1="355.6" y1="172.72" x2="355.6" y2="177.8" width="0.1524" layer="91"/> +<pinref part="C9" gate="G$1" pin="1"/> +<wire x1="360.68" y1="172.72" x2="360.68" y2="149.86" width="0.1524" layer="91"/> +<wire x1="360.68" y1="149.86" x2="360.68" y2="147.32" width="0.1524" layer="91"/> +<wire x1="360.68" y1="147.32" x2="360.68" y2="142.24" width="0.1524" layer="91"/> +<wire x1="421.64" y1="172.72" x2="360.68" y2="172.72" width="0.1524" layer="91"/> +<wire x1="360.68" y1="172.72" x2="355.6" y2="172.72" width="0.1524" layer="91"/> +<pinref part="3V311" gate="G$1" pin="3V3"/> +<pinref part="X3" gate="G$1" pin="VDD"/> +<pinref part="C8" gate="G$1" pin="1"/> +<wire x1="355.6" y1="154.94" x2="355.6" y2="172.72" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="VCC"/> +<wire x1="378.46" y1="149.86" x2="360.68" y2="149.86" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="RDATA_VCC"/> +<wire x1="378.46" y1="147.32" x2="360.68" y2="147.32" width="0.1524" layer="91"/> +<junction x="360.68" y="149.86"/> +<junction x="360.68" y="147.32"/> +<junction x="355.6" y="172.72"/> +</segment> +<segment> +<wire x1="441.96" y1="27.94" x2="441.96" y2="35.56" width="0.1524" layer="91"/> +<pinref part="LED1" gate="G$1" pin="A"/> +<wire x1="426.72" y1="27.94" x2="441.96" y2="27.94" width="0.1524" layer="91"/> +<pinref part="3V315" gate="G$1" pin="3V3"/> +</segment> +<segment> +<wire x1="441.96" y1="-2.54" x2="441.96" y2="15.24" width="0.1524" layer="91"/> +<pinref part="LED3" gate="G$1" pin="A"/> +<pinref part="3V316" gate="G$1" pin="3V3"/> +</segment> +<segment> +<wire x1="347.98" y1="177.8" x2="347.98" y2="154.94" width="0.1524" layer="91"/> +<pinref part="3V39" gate="G$1" pin="3V3"/> +<pinref part="C7" gate="G$1" pin="1"/> +</segment> +<segment> +<wire x1="309.88" y1="149.86" x2="342.9" y2="149.86" width="0.1524" layer="91"/> +<label x="312.42" y="149.86" size="1.778" layer="95"/> +<wire x1="342.9" y1="162.56" x2="342.9" y2="149.86" width="0.1524" layer="91"/> +<wire x1="309.88" y1="137.16" x2="342.9" y2="137.16" width="0.1524" layer="91"/> +<label x="312.42" y="137.16" size="1.778" layer="95"/> +<wire x1="342.9" y1="149.86" x2="342.9" y2="137.16" width="0.1524" layer="91"/> +<wire x1="342.9" y1="137.16" x2="342.9" y2="134.62" width="0.1524" layer="91"/> +<wire x1="342.9" y1="134.62" x2="342.9" y2="132.08" width="0.1524" layer="91"/> +<wire x1="342.9" y1="132.08" x2="342.9" y2="129.54" width="0.1524" layer="91"/> +<wire x1="342.9" y1="177.8" x2="342.9" y2="172.72" width="0.1524" layer="91"/> +<junction x="342.9" y="149.86"/> +<junction x="342.9" y="137.16"/> +<wire x1="342.9" y1="172.72" x2="342.9" y2="170.18" width="0.1524" layer="91"/> +<wire x1="342.9" y1="170.18" x2="342.9" y2="162.56" width="0.1524" layer="91"/> +<wire x1="342.9" y1="129.54" x2="309.88" y2="129.54" width="0.1524" layer="91"/> +<label x="312.42" y="129.54" size="1.778" layer="95"/> +<wire x1="342.9" y1="162.56" x2="309.88" y2="162.56" width="0.1524" layer="91"/> +<pinref part="X1" gate="G$1" pin="10"/> +<pinref part="X1" gate="G$1" pin="20"/> +<pinref part="X1" gate="G$1" pin="30"/> +<pinref part="X1" gate="G$1" pin="36"/> +<pinref part="R14" gate="G$1" pin="1"/> +<wire x1="337.82" y1="134.62" x2="342.9" y2="134.62" width="0.1524" layer="91"/> +<pinref part="R15" gate="G$1" pin="1"/> +<wire x1="337.82" y1="132.08" x2="342.9" y2="132.08" width="0.1524" layer="91"/> +<junction x="342.9" y="134.62"/> +<junction x="342.9" y="132.08"/> +<pinref part="X1" gate="G$1" pin="2"/> +<wire x1="309.88" y1="172.72" x2="342.9" y2="172.72" width="0.1524" layer="91"/> +<junction x="342.9" y="172.72"/> +<junction x="342.9" y="162.56"/> +<label x="312.42" y="172.72" size="1.778" layer="95"/> +<label x="312.42" y="162.56" size="1.778" layer="95"/> +<pinref part="3V38" gate="G$1" pin="3V3"/> +<pinref part="X1" gate="G$1" pin="4"/> +<wire x1="309.88" y1="170.18" x2="342.9" y2="170.18" width="0.1524" layer="91"/> +<label x="312.42" y="170.18" size="1.778" layer="95"/> +<junction x="342.9" y="170.18"/> +</segment> +<segment> +<pinref part="3V36" gate="G$1" pin="3V3"/> +<wire x1="259.08" y1="309.88" x2="259.08" y2="332.74" width="0.1524" layer="91"/> +<pinref part="D1" gate="G$1" pin="C"/> +<wire x1="259.08" y1="302.26" x2="259.08" y2="309.88" width="0.1524" layer="91"/> +<wire x1="299.72" y1="309.88" x2="266.7" y2="309.88" width="0.1524" layer="91"/> +<pinref part="JP1" gate="A" pin="15"/> +<label x="269.24" y="309.88" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="16"/> +<wire x1="307.34" y1="309.88" x2="337.82" y2="309.88" width="0.1524" layer="91"/> +<label x="314.96" y="309.88" size="1.778" layer="95"/> +<wire x1="337.82" y1="309.88" x2="337.82" y2="304.8" width="0.1524" layer="91"/> +<wire x1="337.82" y1="304.8" x2="266.7" y2="304.8" width="0.1524" layer="91"/> +<wire x1="266.7" y1="304.8" x2="266.7" y2="309.88" width="0.1524" layer="91"/> +<junction x="266.7" y="309.88"/> +<wire x1="266.7" y1="309.88" x2="264.16" y2="309.88" width="0.1524" layer="91"/> +<junction x="259.08" y="309.88"/> +<pinref part="C6" gate="G$1" pin="1"/> +<wire x1="264.16" y1="309.88" x2="259.08" y2="309.88" width="0.1524" layer="91"/> +<wire x1="264.16" y1="304.8" x2="264.16" y2="309.88" width="0.1524" layer="91"/> +<junction x="264.16" y="309.88"/> +</segment> +<segment> +<pinref part="3V32" gate="G$1" pin="3V3"/> +<wire x1="-12.7" y1="25.4" x2="-12.7" y2="45.72" width="0.1524" layer="91"/> +<pinref part="R2" gate="G$1" pin="1"/> +</segment> +<segment> +<pinref part="C17" gate="G$1" pin="1"/> +<wire x1="426.72" y1="266.7" x2="426.72" y2="259.08" width="0.1524" layer="91"/> +<pinref part="3V312" gate="G$1" pin="3V3"/> +<pinref part="U4" gate="G$1" pin="VBAT"/> +<wire x1="426.72" y1="259.08" x2="426.72" y2="231.14" width="0.1524" layer="91"/> +<wire x1="386.08" y1="259.08" x2="421.64" y2="259.08" width="0.1524" layer="91"/> +<wire x1="421.64" y1="259.08" x2="426.72" y2="259.08" width="0.1524" layer="91"/> +<wire x1="426.72" y1="259.08" x2="426.72" y2="266.7" width="0.1524" layer="91"/> +<junction x="426.72" y="259.08"/> +<pinref part="C16" gate="G$1" pin="1"/> +<wire x1="421.64" y1="231.14" x2="421.64" y2="259.08" width="0.1524" layer="91"/> +<junction x="421.64" y="259.08"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="VIO"/> +<wire x1="386.08" y1="261.62" x2="421.64" y2="261.62" width="0.1524" layer="91"/> +<wire x1="421.64" y1="261.62" x2="431.8" y2="261.62" width="0.1524" layer="91"/> +<wire x1="431.8" y1="261.62" x2="431.8" y2="231.14" width="0.1524" layer="91"/> +<pinref part="C18" gate="G$1" pin="1"/> +<wire x1="431.8" y1="261.62" x2="431.8" y2="271.78" width="0.1524" layer="91"/> +<junction x="431.8" y="261.62"/> +<pinref part="3V313" gate="G$1" pin="3V3"/> +</segment> +<segment> +<wire x1="266.7" y1="208.28" x2="259.08" y2="208.28" width="0.1524" layer="91"/> +<wire x1="259.08" y1="208.28" x2="259.08" y2="210.82" width="0.1524" layer="91"/> +<pinref part="3V37" gate="G$1" pin="3V3"/> +<wire x1="259.08" y1="210.82" x2="259.08" y2="213.36" width="0.1524" layer="91"/> +<wire x1="259.08" y1="213.36" x2="259.08" y2="215.9" width="0.1524" layer="91"/> +<wire x1="259.08" y1="215.9" x2="259.08" y2="218.44" width="0.1524" layer="91"/> +<wire x1="259.08" y1="218.44" x2="259.08" y2="220.98" width="0.1524" layer="91"/> +<wire x1="259.08" y1="220.98" x2="259.08" y2="266.7" width="0.1524" layer="91"/> +<wire x1="266.7" y1="218.44" x2="259.08" y2="218.44" width="0.1524" layer="91"/> +<wire x1="266.7" y1="215.9" x2="259.08" y2="215.9" width="0.1524" layer="91"/> +<wire x1="266.7" y1="213.36" x2="259.08" y2="213.36" width="0.1524" layer="91"/> +<wire x1="266.7" y1="210.82" x2="259.08" y2="210.82" width="0.1524" layer="91"/> +<junction x="259.08" y="218.44"/> +<junction x="259.08" y="215.9"/> +<junction x="259.08" y="213.36"/> +<junction x="259.08" y="210.82"/> +<pinref part="R7" gate="G$1" pin="2"/> +<pinref part="R8" gate="G$1" pin="2"/> +<pinref part="R9" gate="G$1" pin="2"/> +<pinref part="R10" gate="G$1" pin="2"/> +<pinref part="R11" gate="G$1" pin="2"/> +</segment> +<segment> +<pinref part="3V33" gate="G$1" pin="3V3"/> +<pinref part="R3" gate="G$1" pin="1"/> +<wire x1="-7.62" y1="251.46" x2="-7.62" y2="243.84" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="3V31" gate="G$1" pin="3V3"/> +<pinref part="R1" gate="G$1" pin="1"/> +<wire x1="-12.7" y1="251.46" x2="-12.7" y2="243.84" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="U1" gate="D" pin="VREF+"/> +<wire x1="332.74" y1="35.56" x2="347.98" y2="35.56" width="0.1524" layer="91"/> +<wire x1="347.98" y1="35.56" x2="347.98" y2="40.64" width="0.1524" layer="91"/> +<pinref part="3V310" gate="G$1" pin="3V3"/> +</segment> +<segment> +<pinref part="R27" gate="G$1" pin="1"/> +<pinref part="3V314" gate="G$1" pin="3V3"/> +<wire x1="434.34" y1="101.6" x2="434.34" y2="111.76" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R31" gate="G$1" pin="1"/> +<pinref part="3V2" gate="G$1" pin="3V3"/> +<wire x1="226.06" y1="127" x2="226.06" y2="116.84" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R30" gate="G$1" pin="1"/> +<pinref part="3V3" gate="G$1" pin="3V3"/> +<wire x1="220.98" y1="127" x2="220.98" y2="116.84" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R29" gate="G$1" pin="1"/> +<pinref part="3V4" gate="G$1" pin="3V3"/> +<wire x1="215.9" y1="127" x2="215.9" y2="116.84" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="R28" gate="G$1" pin="1"/> +<pinref part="3V5" gate="G$1" pin="3V3"/> +<wire x1="210.82" y1="127" x2="210.82" y2="116.84" width="0.1524" layer="91"/> +</segment> +<segment> +<wire x1="157.48" y1="106.68" x2="157.48" y2="127" width="0.1524" layer="91"/> +<pinref part="U7" gate="U1" pin="VCC"/> +<wire x1="172.72" y1="106.68" x2="157.48" y2="106.68" width="0.1524" layer="91"/> +<pinref part="3V1" gate="G$1" pin="3V3"/> +</segment> +<segment> +<pinref part="C22" gate="G$1" pin="1"/> +<pinref part="3V6" gate="G$1" pin="3V3"/> +<wire x1="152.4" y1="127" x2="152.4" y2="114.3" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C21" gate="G$1" pin="1"/> +<pinref part="3V7" gate="G$1" pin="3V3"/> +<wire x1="147.32" y1="127" x2="147.32" y2="114.3" width="0.1524" layer="91"/> +</segment> +</net> +<net name="PONKEY" class="0"> +<segment> +<pinref part="U1" gate="A" pin="PMIC_PONKEYN"/> +<wire x1="22.86" y1="228.6" x2="0" y2="228.6" width="0.1524" layer="91"/> +<label x="-7.62" y="228.6" size="1.778" layer="95"/> +<pinref part="R3" gate="G$1" pin="2"/> +<wire x1="-7.62" y1="233.68" x2="-7.62" y2="228.6" width="0.1524" layer="91"/> +<wire x1="0" y1="228.6" x2="-7.62" y2="228.6" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="JP2" gate="A" pin="1"/> +<wire x1="396.24" y1="327.66" x2="368.3" y2="327.66" width="0.1524" layer="91"/> +<label x="368.3" y="327.66" size="1.778" layer="95"/> +</segment> +</net> +<net name="VBAT" class="0"> +<segment> +<pinref part="D6" gate="G$1" pin="C"/> +<wire x1="439.42" y1="302.26" x2="439.42" y2="304.8" width="0.1524" layer="91"/> +<pinref part="X2" gate="G$1" pin="2"/> +<wire x1="396.24" y1="297.18" x2="401.32" y2="297.18" width="0.1524" layer="91"/> +<wire x1="401.32" y1="297.18" x2="401.32" y2="304.8" width="0.1524" layer="91"/> +<wire x1="401.32" y1="304.8" x2="439.42" y2="304.8" width="0.1524" layer="91"/> +<wire x1="439.42" y1="304.8" x2="439.42" y2="312.42" width="0.1524" layer="91"/> +<wire x1="403.86" y1="312.42" x2="439.42" y2="312.42" width="0.1524" layer="91"/> +<label x="411.48" y="312.42" size="1.778" layer="95"/> +<wire x1="439.42" y1="312.42" x2="439.42" y2="332.74" width="0.1524" layer="91"/> +<junction x="439.42" y="312.42"/> +<pinref part="JP2" gate="A" pin="14"/> +<pinref part="PS4" gate="G$1" pin="VBAT"/> +<label x="411.48" y="297.18" size="1.778" layer="95"/> +<junction x="439.42" y="304.8"/> +</segment> +<segment> +<pinref part="C12" gate="G$1" pin="1"/> +<wire x1="373.38" y1="73.66" x2="373.38" y2="88.9" width="0.1524" layer="91"/> +<pinref part="PS3" gate="G$1" pin="VBAT"/> +<wire x1="373.38" y1="88.9" x2="373.38" y2="111.76" width="0.1524" layer="91"/> +<wire x1="393.7" y1="88.9" x2="391.16" y2="88.9" width="0.1524" layer="91"/> +<wire x1="391.16" y1="88.9" x2="383.54" y2="88.9" width="0.1524" layer="91"/> +<pinref part="R17" gate="G$1" pin="1"/> +<wire x1="383.54" y1="86.36" x2="383.54" y2="88.9" width="0.1524" layer="91"/> +<wire x1="383.54" y1="88.9" x2="378.46" y2="88.9" width="0.1524" layer="91"/> +<pinref part="C13" gate="G$1" pin="1"/> +<wire x1="378.46" y1="88.9" x2="373.38" y2="88.9" width="0.1524" layer="91"/> +<wire x1="378.46" y1="86.36" x2="378.46" y2="88.9" width="0.1524" layer="91"/> +<junction x="383.54" y="88.9"/> +<junction x="378.46" y="88.9"/> +<junction x="373.38" y="88.9"/> +<pinref part="U6" gate="G$1" pin="IN2"/> +</segment> +</net> +<net name="DAC1" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PA4"/> +<wire x1="162.56" y1="68.58" x2="142.24" y2="68.58" width="0.1524" layer="91"/> +<label x="142.24" y="68.58" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="299.72" y1="312.42" x2="269.24" y2="312.42" width="0.1524" layer="91"/> +<label x="269.24" y="312.42" size="1.778" layer="95"/> +<pinref part="JP1" gate="A" pin="13"/> +</segment> +</net> +<net name="I2C5_SCL" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PA11"/> +<wire x1="162.56" y1="50.8" x2="142.24" y2="50.8" width="0.1524" layer="91"/> +<label x="142.24" y="50.8" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="309.88" y1="134.62" x2="327.66" y2="134.62" width="0.1524" layer="91"/> +<label x="312.42" y="134.62" size="1.778" layer="95"/> +<pinref part="R14" gate="G$1" pin="2"/> +<pinref part="X1" gate="G$1" pin="32"/> +</segment> +</net> +<net name="I2C5_SDA" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PA12"/> +<wire x1="162.56" y1="48.26" x2="142.24" y2="48.26" width="0.1524" layer="91"/> +<label x="142.24" y="48.26" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="309.88" y1="132.08" x2="327.66" y2="132.08" width="0.1524" layer="91"/> +<label x="312.42" y="132.08" size="1.778" layer="95"/> +<pinref part="R15" gate="G$1" pin="2"/> +<pinref part="X1" gate="G$1" pin="34"/> +</segment> +</net> +<net name="USBH_DP" class="0"> +<segment> +<pinref part="U2" gate="G$1" pin="DM_I"/> +<wire x1="292.1" y1="294.64" x2="269.24" y2="294.64" width="0.1524" layer="91"/> +<label x="271.78" y="294.64" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="D" pin="USB_DP1"/> +<wire x1="271.78" y1="-10.16" x2="251.46" y2="-10.16" width="0.1524" layer="91"/> +<label x="251.46" y="-10.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="USBH_DM" class="0"> +<segment> +<pinref part="U2" gate="G$1" pin="DP_I"/> +<wire x1="292.1" y1="297.18" x2="269.24" y2="297.18" width="0.1524" layer="91"/> +<label x="271.78" y="297.18" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="D" pin="USB_DM1"/> +<wire x1="271.78" y1="-7.62" x2="251.46" y2="-7.62" width="0.1524" layer="91"/> +<label x="251.46" y="-7.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="VBUS_SW" class="0"> +<segment> +<pinref part="PS1" gate="G$1" pin="VBUS_SW"/> +<pinref part="U1" gate="A" pin="PMIC_BSTOUT@1"/> +<wire x1="93.98" y1="294.64" x2="129.54" y2="294.64" width="0.1524" layer="91"/> +<wire x1="129.54" y1="294.64" x2="129.54" y2="312.42" width="0.1524" layer="91"/> +<junction x="129.54" y="294.64"/> +<wire x1="129.54" y1="292.1" x2="129.54" y2="294.64" width="0.1524" layer="91"/> +<pinref part="U1" gate="A" pin="PMIC_BSTOUT@2"/> +<wire x1="93.98" y1="292.1" x2="124.46" y2="292.1" width="0.1524" layer="91"/> +<pinref part="C3" gate="G$1" pin="1"/> +<wire x1="124.46" y1="246.38" x2="124.46" y2="292.1" width="0.1524" layer="91"/> +<junction x="124.46" y="292.1"/> +<wire x1="124.46" y1="292.1" x2="129.54" y2="292.1" width="0.1524" layer="91"/> +<junction x="129.54" y="292.1"/> +<pinref part="C4" gate="G$1" pin="1"/> +<wire x1="129.54" y1="246.38" x2="129.54" y2="292.1" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="PS2" gate="G$1" pin="VBUS_SW"/> +<wire x1="342.9" y1="332.74" x2="342.9" y2="312.42" width="0.1524" layer="91"/> +<pinref part="JP1" gate="A" pin="14"/> +<wire x1="307.34" y1="312.42" x2="337.82" y2="312.42" width="0.1524" layer="91"/> +<label x="314.96" y="312.42" size="1.778" layer="95"/> +<pinref part="D5" gate="G$1" pin="C"/> +<wire x1="342.9" y1="312.42" x2="337.82" y2="312.42" width="0.1524" layer="91"/> +<wire x1="342.9" y1="302.26" x2="342.9" y2="312.42" width="0.1524" layer="91"/> +<junction x="342.9" y="312.42"/> +<junction x="342.9" y="312.42"/> +<junction x="342.9" y="312.42"/> +<junction x="342.9" y="312.42"/> +<junction x="342.9" y="312.42"/> +</segment> +</net> +<net name="DCMI_D10" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PI3"/> +<wire x1="91.44" y1="68.58" x2="121.92" y2="68.58" width="0.1524" layer="91"/> +<wire x1="124.46" y1="68.58" x2="121.92" y2="68.58" width="0.1524" layer="91"/> +<label x="96.52" y="68.58" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="287.02" y1="165.1" x2="256.54" y2="165.1" width="0.1524" layer="91"/> +<label x="256.54" y="165.1" size="1.778" layer="95"/> +<pinref part="X1" gate="G$1" pin="7"/> +</segment> +</net> +<net name="DCMI_D11" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PH15"/> +<wire x1="91.44" y1="86.36" x2="124.46" y2="86.36" width="0.1524" layer="91"/> +<label x="96.52" y="86.36" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="X1" gate="G$1" pin="9"/> +<wire x1="287.02" y1="162.56" x2="256.54" y2="162.56" width="0.1524" layer="91"/> +<label x="256.54" y="162.56" size="1.778" layer="95"/> +</segment> +</net> +<net name="RSVD5" class="0"> +<segment> +<pinref part="X1" gate="G$1" pin="8"/> +<wire x1="309.88" y1="165.1" x2="340.36" y2="165.1" width="0.1524" layer="91"/> +<label x="312.42" y="165.1" size="1.778" layer="95"/> +</segment> +</net> +<net name="RSVD6" class="0"> +<segment> +<pinref part="X1" gate="G$1" pin="6"/> +<wire x1="309.88" y1="167.64" x2="340.36" y2="167.64" width="0.1524" layer="91"/> +<label x="312.42" y="167.64" size="1.778" layer="95"/> +</segment> +</net> +<net name="SPI6_NSS" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PG8"/> +<wire x1="30.48" y1="7.62" x2="-7.62" y2="7.62" width="0.1524" layer="91"/> +<label x="-7.62" y="7.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$2" class="0"> +<segment> +<pinref part="U1" gate="A" pin="HSE_OSC_OE"/> +<pinref part="R4" gate="G$1" pin="2"/> +<wire x1="7.62" y1="208.28" x2="22.86" y2="208.28" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$7" class="0"> +<segment> +<pinref part="U1" gate="A" pin="EEPROM_WP"/> +<pinref part="SJ1" gate="1" pin="2"/> +<wire x1="22.86" y1="198.12" x2="20.32" y2="198.12" width="0.1524" layer="91"/> +<wire x1="20.32" y1="198.12" x2="17.78" y2="198.12" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$12" class="0"> +<segment> +<pinref part="X3" gate="G$1" pin="CD/DAT3^2"/> +<wire x1="421.64" y1="154.94" x2="408.94" y2="154.94" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="DAT3_EX"/> +</segment> +</net> +<net name="N$13" class="0"> +<segment> +<pinref part="X3" gate="G$1" pin="DAT2"/> +<wire x1="421.64" y1="157.48" x2="408.94" y2="157.48" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="DAT2_EX"/> +</segment> +</net> +<net name="N$30" class="0"> +<segment> +<pinref part="X3" gate="G$1" pin="DAT1"/> +<wire x1="421.64" y1="160.02" x2="408.94" y2="160.02" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="DAT1_EX"/> +</segment> +</net> +<net name="N$31" class="0"> +<segment> +<pinref part="X3" gate="G$1" pin="DAT0"/> +<wire x1="421.64" y1="162.56" x2="408.94" y2="162.56" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="DAT0_EX"/> +</segment> +</net> +<net name="N$32" class="0"> +<segment> +<pinref part="X3" gate="G$1" pin="CLK"/> +<wire x1="421.64" y1="165.1" x2="408.94" y2="165.1" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="CLK_EX"/> +</segment> +</net> +<net name="N$33" class="0"> +<segment> +<pinref part="X3" gate="G$1" pin="CMD"/> +<wire x1="421.64" y1="167.64" x2="408.94" y2="167.64" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="CMD_EX"/> +</segment> +</net> +<net name="DN" class="0"> +<segment> +<wire x1="287.02" y1="88.9" x2="287.02" y2="68.58" width="0.1524" layer="91"/> +<pinref part="J1" gate="G$1" pin="D-"/> +<wire x1="287.02" y1="68.58" x2="284.48" y2="68.58" width="0.1524" layer="91"/> +<pinref part="U3" gate="G$1" pin="DP_I"/> +<wire x1="299.72" y1="88.9" x2="287.02" y2="88.9" width="0.1524" layer="91"/> +<label x="289.56" y="88.9" size="1.778" layer="95"/> +</segment> +</net> +<net name="DP" class="0"> +<segment> +<pinref part="J1" gate="G$1" pin="D+"/> +<wire x1="284.48" y1="66.04" x2="289.56" y2="66.04" width="0.1524" layer="91"/> +<wire x1="289.56" y1="66.04" x2="289.56" y2="86.36" width="0.1524" layer="91"/> +<pinref part="U3" gate="G$1" pin="DM_I"/> +<wire x1="299.72" y1="86.36" x2="289.56" y2="86.36" width="0.1524" layer="91"/> +<label x="289.56" y="86.36" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$4" class="0"> +<segment> +<pinref part="L2" gate="G$1" pin="1"/> +<pinref part="J1" gate="G$1" pin="SHLD"/> +<wire x1="284.48" y1="58.42" x2="309.88" y2="58.42" width="0.1524" layer="91"/> +</segment> +</net> +<net name="ANA0" class="0"> +<segment> +<pinref part="U1" gate="D" pin="ANA0"/> +<wire x1="332.74" y1="7.62" x2="342.9" y2="7.62" width="0.1524" layer="91"/> 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x2="337.82" y2="294.64" width="0.1524" layer="91"/> +<label x="317.5" y="294.64" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="2"/> +<wire x1="307.34" y1="327.66" x2="337.82" y2="327.66" width="0.1524" layer="91"/> +<label x="314.96" y="327.66" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$47" class="0"> +<segment> +<pinref part="U4" gate="G$1" pin="VIN_LDO"/> +<wire x1="386.08" y1="256.54" x2="416.56" y2="256.54" width="0.1524" layer="91"/> +<pinref part="L3" gate="G$1" pin="2"/> +<wire x1="406.4" y1="254" x2="416.56" y2="254" width="0.1524" layer="91"/> +<wire x1="416.56" y1="254" x2="416.56" y2="256.54" width="0.1524" layer="91"/> +<pinref part="C15" gate="G$1" pin="1"/> +<wire x1="416.56" y1="231.14" x2="416.56" y2="254" width="0.1524" layer="91"/> +<junction x="416.56" y="254"/> +</segment> +</net> +<net name="SDMMC2_D3" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB4"/> +<wire x1="162.56" y1="20.32" x2="142.24" y2="20.32" width="0.1524" layer="91"/> +<label x="142.24" y="20.32" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="SDIO_DATA_3"/> +<wire x1="320.04" y1="208.28" x2="276.86" y2="208.28" width="0.1524" layer="91"/> +<label x="281.94" y="208.28" size="1.778" layer="95"/> +<pinref part="R11" gate="G$1" pin="1"/> +</segment> +</net> +<net name="SDMMC2_D2" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB3"/> +<wire x1="162.56" y1="22.86" x2="142.24" y2="22.86" width="0.1524" layer="91"/> +<label x="142.24" y="22.86" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="SDIO_DATA_2"/> +<wire x1="320.04" y1="210.82" x2="276.86" y2="210.82" width="0.1524" layer="91"/> +<label x="281.94" y="210.82" size="1.778" layer="95"/> +<pinref part="R10" gate="G$1" pin="1"/> +</segment> +</net> +<net name="SDMMC2_D1" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB15"/> +<wire x1="162.56" y1="-7.62" x2="142.24" y2="-7.62" width="0.1524" layer="91"/> +<label x="142.24" y="-7.62" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="SDIO_DATA_1"/> +<wire x1="320.04" y1="213.36" x2="276.86" y2="213.36" width="0.1524" layer="91"/> +<label x="281.94" y="213.36" size="1.778" layer="95"/> +<pinref part="R9" gate="G$1" pin="1"/> +</segment> +</net> +<net name="SDMMC2_D0" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB14"/> +<wire x1="162.56" y1="-5.08" x2="142.24" y2="-5.08" width="0.1524" layer="91"/> +<label x="142.24" y="-5.08" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="SDIO_DATA_0"/> +<wire x1="320.04" y1="215.9" x2="276.86" y2="215.9" width="0.1524" layer="91"/> +<label x="281.94" y="215.9" size="1.778" layer="95"/> +<pinref part="R8" gate="G$1" pin="1"/> +</segment> +</net> +<net name="SDMMC2_CMD" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PG6"/> +<wire x1="30.48" y1="12.7" x2="-7.62" y2="12.7" width="0.1524" layer="91"/> +<label x="-7.62" y="12.7" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="SDIO_CMD"/> +<wire x1="320.04" y1="218.44" x2="276.86" y2="218.44" width="0.1524" layer="91"/> +<label x="281.94" y="218.44" size="1.778" layer="95"/> +<pinref part="R7" gate="G$1" pin="1"/> +</segment> +</net> +<net name="SDMMC2_CK" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PE3"/> +<wire x1="30.48" y1="116.84" x2="-7.62" y2="116.84" width="0.1524" layer="91"/> +<label x="-7.62" y="116.84" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="SDIO_CLK"/> +<wire x1="320.04" y1="220.98" x2="281.94" y2="220.98" width="0.1524" layer="91"/> +<label x="281.94" y="220.98" size="1.778" layer="95"/> +</segment> +</net> +<net name="WL_REG_ON" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PH4"/> +<wire x1="91.44" y1="114.3" x2="124.46" y2="114.3" width="0.1524" layer="91"/> +<label x="96.52" y="114.3" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="WL_REG_ON"/> +<wire x1="386.08" y1="241.3" x2="406.4" y2="241.3" width="0.1524" layer="91"/> +<label x="388.62" y="241.3" size="1.778" layer="95"/> +</segment> +</net> +<net name="WL_HOST_WAKE" class="0"> +<segment> +<pinref part="U4" gate="G$1" pin="WL_GPIO_0_HOST_WAKE"/> +<wire x1="386.08" y1="238.76" x2="406.4" y2="238.76" width="0.1524" layer="91"/> +<label x="388.62" y="238.76" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PD7"/> +<wire x1="223.52" y1="12.7" x2="243.84" y2="12.7" width="0.1524" layer="91"/> +<label x="228.6" y="12.7" size="1.778" layer="95"/> +</segment> +</net> +<net name="WL_LPO_32" class="0"> +<segment> +<pinref part="U1" gate="C" pin="PI8"/> +<wire x1="91.44" y1="55.88" x2="127" y2="55.88" width="0.1524" layer="91"/> +<label x="96.52" y="55.88" size="1.778" layer="95"/> +<pinref part="TP1" gate="G$1" pin="TP"/> +<wire x1="127" y1="58.42" x2="127" y2="55.88" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$48" class="0"> +<segment> +<pinref part="U4" gate="G$1" pin="SR_VLX"/> +<pinref part="L3" gate="G$1" pin="1"/> +<wire x1="393.7" y1="254" x2="386.08" y2="254" width="0.1524" layer="91"/> +</segment> +</net> +<net name="BT_HOST_WAKE" class="0"> +<segment> +<pinref part="U4" gate="G$1" pin="BT_HOST_WAKE"/> +<wire x1="320.04" y1="238.76" x2="281.94" y2="238.76" width="0.1524" layer="91"/> +<label x="281.94" y="238.76" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PZ3"/> +<wire x1="91.44" y1="20.32" x2="124.46" y2="20.32" width="0.1524" layer="91"/> +<label x="96.52" y="20.32" size="1.778" layer="95"/> +</segment> +</net> +<net name="BT_REG_ON" class="0"> +<segment> +<pinref part="U4" gate="G$1" pin="BT_REG_ON"/> +<wire x1="320.04" y1="241.3" x2="281.94" y2="241.3" width="0.1524" layer="91"/> +<label x="281.94" y="241.3" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PZ6"/> +<wire x1="91.44" y1="12.7" x2="124.46" y2="12.7" width="0.1524" layer="91"/> +<label x="96.52" y="12.7" size="1.778" layer="95"/> +</segment> +</net> +<net name="USART2_TX" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD5"/> +<wire x1="223.52" y1="17.78" x2="243.84" y2="17.78" width="0.1524" layer="91"/> +<label x="228.6" y="17.78" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="BT_UART_RXD"/> +<wire x1="320.04" y1="254" x2="281.94" y2="254" width="0.1524" layer="91"/> +<label x="281.94" y="254" size="1.778" layer="95"/> +</segment> +</net> +<net name="USART2_RTS" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD4"/> +<wire x1="223.52" y1="20.32" x2="243.84" y2="20.32" width="0.1524" layer="91"/> +<label x="228.6" y="20.32" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="!BT_UART_CTS_N"/> +<wire x1="320.04" y1="251.46" x2="281.94" y2="251.46" width="0.1524" layer="91"/> +<label x="281.94" y="251.46" size="1.778" layer="95"/> +</segment> +</net> +<net name="USART2_CTS" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD3"/> +<wire x1="223.52" y1="22.86" x2="243.84" y2="22.86" width="0.1524" layer="91"/> +<label x="228.6" y="22.86" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="!BT_UART_RTS_N"/> +<wire x1="320.04" y1="248.92" x2="281.94" y2="248.92" width="0.1524" layer="91"/> +<label x="281.94" y="248.92" size="1.778" layer="95"/> +</segment> +</net> +<net name="USART2_RX" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD6"/> +<wire x1="223.52" y1="15.24" x2="243.84" y2="15.24" width="0.1524" layer="91"/> +<label x="228.6" y="15.24" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U4" gate="G$1" pin="BT_UART_TXD"/> +<wire x1="320.04" y1="256.54" x2="281.94" y2="256.54" width="0.1524" layer="91"/> +<label x="281.94" y="256.54" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$44" class="0"> +<segment> +<wire x1="436.88" y1="251.46" x2="436.88" y2="248.92" width="0.1524" layer="91"/> +<pinref part="L5" gate="G$1" pin="2"/> +<wire x1="436.88" y1="243.84" x2="436.88" y2="248.92" width="0.1524" layer="91"/> +<pinref part="C14" gate="G$1" pin="1"/> +<wire x1="401.32" y1="248.92" x2="436.88" y2="248.92" width="0.1524" layer="91"/> +<pinref part="L4" gate="G$1" pin="1"/> +<junction x="436.88" y="248.92"/> +</segment> +</net> +<net name="BT_DEV_WAKE" class="0"> +<segment> +<pinref part="U4" gate="G$1" pin="BT_DEV_WAKE"/> +<wire x1="320.04" y1="236.22" x2="281.94" y2="236.22" width="0.1524" layer="91"/> +<label x="281.94" y="236.22" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="C" pin="PZ7"/> +<wire x1="91.44" y1="10.16" x2="124.46" y2="10.16" width="0.1524" layer="91"/> +<label x="96.52" y="10.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$45" class="0"> +<segment> +<pinref part="ANT1" gate="G$1" pin="1"/> +<pinref part="L4" gate="G$1" pin="2"/> +<wire x1="436.88" y1="264.16" x2="436.88" y2="266.7" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$46" class="0"> +<segment> +<pinref part="C14" gate="G$1" pin="2"/> +<pinref part="U4" gate="G$1" pin="ANT"/> +<wire x1="393.7" y1="248.92" x2="386.08" y2="248.92" width="0.1524" layer="91"/> +</segment> +</net> +<net name="FDCAN2_TX" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB13"/> +<wire x1="162.56" y1="-2.54" x2="142.24" y2="-2.54" width="0.1524" layer="91"/> +<label x="142.24" y="-2.54" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="10"/> +<wire x1="307.34" y1="317.5" x2="337.82" y2="317.5" width="0.1524" layer="91"/> +<label x="314.96" y="317.5" size="1.778" layer="95"/> +</segment> +</net> +<net name="FDCAN2_RX" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PB5"/> +<wire x1="162.56" y1="17.78" x2="142.24" y2="17.78" width="0.1524" layer="91"/> +<label x="142.24" y="17.78" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JP1" gate="A" pin="12"/> +<wire x1="307.34" y1="314.96" x2="337.82" y2="314.96" width="0.1524" layer="91"/> +<label x="314.96" y="314.96" size="1.778" layer="95"/> +</segment> +</net> +<net name="USART3_TX" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD8"/> +<wire x1="223.52" y1="10.16" x2="243.84" y2="10.16" width="0.1524" layer="91"/> +<label x="228.6" y="10.16" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JP2" gate="A" pin="11"/> +<wire x1="396.24" y1="314.96" x2="368.3" y2="314.96" width="0.1524" layer="91"/> +<label x="368.3" y="314.96" size="1.778" layer="95"/> +</segment> +</net> +<net name="USART3_RX" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD9"/> +<wire x1="223.52" y1="7.62" x2="243.84" y2="7.62" width="0.1524" layer="91"/> +<label x="228.6" y="7.62" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JP2" gate="A" pin="13"/> +<wire x1="396.24" y1="312.42" x2="368.3" y2="312.42" width="0.1524" layer="91"/> +<label x="368.3" y="312.42" size="1.778" layer="95"/> +</segment> +</net> +<net name="SWO" class="0"> +<segment> +<pinref part="U1" gate="D" pin="JTDO-TRACESWO"/> +<wire x1="342.9" y1="-15.24" x2="332.74" y2="-15.24" width="0.1524" layer="91"/> +<label x="335.28" y="-15.24" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="JP2" gate="A" pin="3"/> +<wire x1="396.24" y1="325.12" x2="368.3" y2="325.12" width="0.1524" layer="91"/> +<label x="368.3" y="325.12" size="1.778" layer="95"/> +</segment> +</net> +<net name="SWC" class="0"> +<segment> +<pinref part="JP2" gate="A" pin="5"/> +<wire x1="396.24" y1="322.58" x2="368.3" y2="322.58" width="0.1524" layer="91"/> +<label x="368.3" y="322.58" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="D" pin="JTCK-SWCLK"/> +<wire x1="342.9" y1="-10.16" x2="332.74" y2="-10.16" width="0.1524" layer="91"/> +<label x="335.28" y="-10.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="SWD" class="0"> +<segment> +<pinref part="JP2" gate="A" pin="7"/> +<wire x1="396.24" y1="320.04" x2="368.3" y2="320.04" width="0.1524" layer="91"/> +<label x="368.3" y="320.04" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="D" pin="JTMS-SWDIO"/> +<wire x1="342.9" y1="-7.62" x2="332.74" y2="-7.62" width="0.1524" layer="91"/> +<label x="335.28" y="-7.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="PWR_ST" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PA7"/> +<wire x1="162.56" y1="60.96" x2="142.24" y2="60.96" width="0.1524" layer="91"/> +<label x="142.24" y="60.96" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U6" gate="G$1" pin="ST"/> +<wire x1="419.1" y1="83.82" x2="434.34" y2="83.82" width="0.1524" layer="91"/> +<label x="421.64" y="83.82" size="1.778" layer="95"/> +<pinref part="R27" gate="G$1" pin="2"/> +<wire x1="434.34" y1="91.44" x2="434.34" y2="83.82" width="0.1524" layer="91"/> +</segment> +</net> +<net name="VSSA" class="0"> +<segment> +<pinref part="U1" gate="D" pin="VSSA"/> +<wire x1="332.74" y1="17.78" x2="347.98" y2="17.78" width="0.1524" layer="91"/> +<wire x1="347.98" y1="17.78" x2="347.98" y2="12.7" width="0.1524" layer="91"/> +<pinref part="V-1" gate="G$1" pin="VSSA"/> +<pinref part="U1" gate="D" pin="VREF-"/> +<wire x1="332.74" y1="20.32" x2="347.98" y2="20.32" width="0.1524" layer="91"/> +<wire x1="347.98" y1="20.32" x2="347.98" y2="17.78" width="0.1524" layer="91"/> +<junction x="347.98" y="17.78"/> +</segment> +</net> +<net name="N$11" class="0"> +<segment> +<pinref part="U1" gate="A" pin="PMIC_LDO5"/> +<wire x1="93.98" y1="256.54" x2="111.76" y2="256.54" width="0.1524" layer="91"/> +<wire x1="111.76" y1="256.54" x2="111.76" y2="266.7" width="0.1524" layer="91"/> +<pinref part="TP2" gate="G$1" pin="TP"/> +</segment> +</net> +<net name="VLX_SHUT" class="0"> +<segment> +<pinref part="U7" gate="U1" pin="!SHUT"/> +<wire x1="193.04" y1="106.68" x2="210.82" y2="106.68" width="0.1524" layer="91"/> +<pinref part="R28" gate="G$1" pin="2"/> +<label x="195.58" y="106.68" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PA5"/> +<wire x1="162.56" y1="66.04" x2="142.24" y2="66.04" width="0.1524" layer="91"/> +<label x="142.24" y="66.04" size="1.778" layer="95"/> +</segment> +</net> +<net name="VLX_IRQ" class="0"> +<segment> +<pinref part="U7" gate="U1" pin="!INT"/> +<wire x1="193.04" y1="99.06" x2="210.82" y2="99.06" width="0.1524" layer="91"/> +<pinref part="R31" gate="G$1" pin="2"/> +<wire x1="210.82" y1="99.06" x2="226.06" y2="99.06" width="0.1524" layer="91"/> +<wire x1="226.06" y1="99.06" x2="226.06" y2="106.68" width="0.1524" layer="91"/> +<label x="195.58" y="99.06" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U1" gate="B" pin="PA2"/> +<wire x1="162.56" y1="73.66" x2="142.24" y2="73.66" width="0.1524" layer="91"/> +<label x="142.24" y="73.66" size="1.778" layer="95"/> +</segment> +</net> +<net name="I2C6_SDA" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD0"/> +<wire x1="223.52" y1="30.48" x2="243.84" y2="30.48" width="0.1524" layer="91"/> +<label x="228.6" y="30.48" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U7" gate="U1" pin="SDA"/> +<wire x1="193.04" y1="104.14" x2="210.82" y2="104.14" width="0.1524" layer="91"/> +<pinref part="R29" gate="G$1" pin="2"/> +<wire x1="210.82" y1="104.14" x2="215.9" y2="104.14" width="0.1524" layer="91"/> +<wire x1="215.9" y1="104.14" x2="215.9" y2="106.68" width="0.1524" layer="91"/> +<label x="195.58" y="104.14" size="1.778" layer="95"/> +</segment> +</net> +<net name="I2C6_SCL" class="0"> +<segment> +<pinref part="U1" gate="B" pin="PD1"/> +<wire x1="223.52" y1="27.94" x2="243.84" y2="27.94" width="0.1524" layer="91"/> +<label x="228.6" y="27.94" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U7" gate="U1" pin="SCL"/> +<wire x1="193.04" y1="101.6" x2="210.82" y2="101.6" width="0.1524" layer="91"/> +<pinref part="R30" gate="G$1" pin="2"/> +<wire x1="210.82" y1="101.6" x2="220.98" y2="101.6" width="0.1524" layer="91"/> +<wire x1="220.98" y1="101.6" x2="220.98" y2="106.68" width="0.1524" layer="91"/> +<label x="195.58" y="101.6" size="1.778" layer="95"/> +</segment> +</net> +</nets> +</sheet> +</sheets> +<errors> +<approved hash="101,1,381,-22.86,H2,MOUNT,,,,"/> +<approved hash="101,1,381,-17.78,H1,MOUNT,,,,"/> +</errors> +</schematic> +</drawing> +<compatibility> +<note version="6.3" minversion="6.2.2" severity="warning"> +Since Version 6.2.2 text objects can contain more than one line, +which will not be processed correctly with this version. +</note> +<note version="8.2" severity="warning"> +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. +</note> +<note version="8.3" severity="warning"> +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. +</note> +<note version="8.3" severity="warning"> +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. +</note> +</compatibility> +</eagle> |