diff options
Diffstat (limited to 'pcb_boven/openmv/openmv-boards-master/openmv4/plus')
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-16-bit.brd | 6913 | ||||
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-16-bit.pdf | bin | 100285 -> 0 bytes | |||
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-16-bit.sch | 8887 | ||||
| -rw-r--r-- | pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-32-bit.pdf | bin | 76019 -> 0 bytes |
4 files changed, 0 insertions, 15800 deletions
diff --git a/pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-16-bit.brd b/pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-16-bit.brd deleted file mode 100644 index bdda764..0000000 --- a/pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-16-bit.brd +++ /dev/null @@ -1,6913 +0,0 @@ -<?xml version="1.0" encoding="utf-8"?> -<!DOCTYPE eagle SYSTEM "eagle.dtd"> -<eagle version="9.4.0"> -<drawing> -<settings> -<setting alwaysvectorfont="no"/> -<setting keepoldvectorfont="yes"/> -<setting verticaltext="up"/> -</settings> -<grid distance="5" unitdist="mil" unit="mil" style="lines" multiple="1" display="yes" altdistance="2.5" altunitdist="mil" altunit="mil"/> -<layers> -<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> -<layer number="2" name="GND" color="35" fill="1" visible="yes" active="yes"/> -<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/> -<layer number="4" name="Route4" color="1" fill="4" visible="no" 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name="D" x="0" y="5.08" visible="off" length="short" direction="pas" rot="R270"/> -<pin name="S" x="0" y="-5.08" visible="off" length="short" direction="pas" rot="R90"/> -</symbol> -<symbol name="DIODE"> -<wire x1="-1.27" y1="-1.27" x2="1.27" y2="0" width="0.254" layer="94"/> -<wire x1="1.27" y1="0" x2="-1.27" y2="1.27" width="0.254" layer="94"/> -<wire x1="1.27" y1="1.27" x2="1.27" y2="0" width="0.254" layer="94"/> -<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.254" layer="94"/> -<wire x1="1.27" y1="0" x2="1.27" y2="-1.27" width="0.254" layer="94"/> -<text x="2.54" y="0.4826" size="1.778" layer="95">>NAME</text> -<text x="2.54" y="-2.3114" size="1.778" layer="96">>VALUE</text> -<pin name="A" x="-2.54" y="0" visible="off" length="short" direction="pas"/> -<pin name="C" x="2.54" y="0" visible="off" length="short" direction="pas" rot="R180"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="GND" prefix="GND"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="1" symbol="GND" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="CAP" prefix="C" uservalue="yes"> -<description><b>Capacitor</b> -Standard 0603 ceramic capacitor, and 0.1" leaded capacitor.</description> -<gates> -<gate name="G$1" symbol="CAP" x="0" y="0"/> -</gates> -<devices> -<device name="PTH" package="CAP-PTH-SMALL"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH2" package="CAP-PTH-SMALL2"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0805" package="0805"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH3" package="CAP-PTH-LARGE"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="SMD" package="GRM43D"> -<connects> -<connect gate="G$1" pin="1" pad="A"/> -<connect gate="G$1" pin="2" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0603-CAP" package="0603-CAP"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0402-CAP" package="0402-CAP"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH1" package="CAP-PTH-5MM"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="_" package="AXIAL-5MM"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="1210" package="1210"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="1206" package="1206"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="ASMD" package="CTZ3"> -<connects> -<connect gate="G$1" pin="1" pad="+"/> -<connect gate="G$1" pin="2" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="RESISTOR" prefix="R" uservalue="yes"> -<description><b>Resistor</b> -Basic schematic elements and footprints for 0603, 1206, and PTH resistors.</description> -<gates> -<gate name="G$1" symbol="RESISTOR" x="0" y="0"/> -</gates> -<devices> -<device name="1206" package="1206@1"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="AXIAL-0.3" package="AXIAL-0.3"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="2010" package="R2010"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0805-RES" package="0805"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0603-RES" package="0603-RES"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0402-RES" package="0402-RES"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1/6W" package="1/6W-RES"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="2512" package="R2512"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1/4W" package="AXIAL-0.4"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1/2W" package="AXIAL-0.5"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-1W" package="AXIAL-0.6"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH-2W" package="AXIAL-0.8"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="MOSFET-NCHANNEL" prefix="Q"> -<gates> -<gate name="G$1" symbol="MOSFET-NCHANNEL" x="0" y="0"/> -</gates> -<devices> -<device name="SMD" package="SOT23-3"> -<connects> -<connect gate="G$1" pin="D" pad="3"/> -<connect gate="G$1" pin="G" pad="1"/> -<connect gate="G$1" pin="S" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH" package="TO-92"> -<connects> -<connect gate="G$1" pin="D" pad="1"/> -<connect gate="G$1" pin="G" pad="3"/> -<connect gate="G$1" pin="S" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="FDD8580" package="DPAK"> -<connects> -<connect gate="G$1" pin="D" pad="4"/> -<connect gate="G$1" pin="G" pad="1"/> -<connect gate="G$1" pin="S" pad="3"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="LED-TRICOLOR"> -<description><b>Tri-Color LED SMD</b> -Proven layout and schematic for triple color LED in SMD package - common anode. Spark Fun Electronics SKU : COM-07844</description> -<gates> -<gate name="G$1" symbol="LED-TRICOLORSMD" x="0" y="2.54"/> -</gates> -<devices> -<device name="" package="LED-TRICOLOR-SMD"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="BLU" pad="B"/> -<connect gate="G$1" pin="GRN" pad="G"/> -<connect gate="G$1" pin="RED" pad="R"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="INDUCTOR" prefix="L" uservalue="yes"> -<description><b>Inductors</b> -Basic Inductor/Choke - 0603 and 1206. Footprints are not proven and vary greatly between part numbers.</description> -<gates> -<gate name="G$1" symbol="INDUCTOR" x="0" y="0"/> -</gates> -<devices> -<device name="H*" package="INDUCTOR-1206"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name="1206"/> -</technologies> -</device> -<device name="0603" package="0603"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="CR54" package="CR54"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PWR" package="CDRH125"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0402" package="C0402"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="-B82462G" package="B82462G"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="CR75" package="CR75"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="1210" package="1210"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="1007" package="1007"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="_" package="COOPER_UP4B"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="-" package="CDRH3D28"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0805" package="0805"> -<connects> -<connect gate="G$1" pin="1" pad="1"/> -<connect gate="G$1" pin="2" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="CR75_V2" package="CR75_V2"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="." package="CDRH2D09"> -<connects> -<connect gate="G$1" pin="1" pad="P$1"/> -<connect gate="G$1" pin="2" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="LED" prefix="LED" uservalue="yes"> -<description><b>LEDs</b> -Standard schematic elements and footprints for 5mm, 3mm, 1206, and 0603 sized LEDs. 5mm - Spark Fun Electronics SKU : COM-00529 (and others)</description> -<gates> -<gate name="G$1" symbol="LED" x="0" y="0"/> -</gates> -<devices> -<device name="5MM" package="LED5MM"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="K"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="3MM" package="LED3MM"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="K"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="1206" package="LED-1206"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="0603" package="LED-0603"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="10MM" package="LED10MM"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="-FKIT-1206" package="FKIT-LED-1206"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="-3MM-NO_SILK" package="LED3MM-NS"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="K"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="CAP_POL" prefix="C" uservalue="yes"> -<description><b>Capacitor Polarized</b> -These are standard SMD and PTH capacitors. Normally 10uF, 47uF, and 100uF in electrolytic and tantalum varieties. Always verify the external diameter of the through hole cap, it varies with capacity, voltage, and manufacturer. The EIA devices should be standard.</description> -<gates> -<gate name="G$1" symbol="CAP_POL" x="0" y="0"/> -</gates> -<devices> -<device name="1206" package="EIA3216"> -<connects> -<connect gate="G$1" pin="+" pad="A"/> -<connect gate="G$1" pin="-" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="3528" package="EIA3528"> -<connects> -<connect gate="G$1" pin="+" pad="A"/> -<connect gate="G$1" pin="-" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH1" package="CPOL-RADIAL-100UF-25V"> -<connects> -<connect gate="G$1" pin="+" pad="1"/> -<connect gate="G$1" pin="-" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH2" package="CPOL-RADIAL-10UF-25V"> -<connects> -<connect gate="G$1" pin="+" pad="1"/> -<connect gate="G$1" pin="-" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="7343" package="EIA7343"> -<connects> -<connect gate="G$1" pin="+" pad="A"/> -<connect gate="G$1" pin="-" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="G" package="PANASONIC_G"> -<connects> -<connect gate="G$1" pin="+" pad="+"/> -<connect gate="G$1" pin="-" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="E" package="PANASONIC_E"> -<connects> -<connect gate="G$1" pin="+" pad="+"/> -<connect gate="G$1" pin="-" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="C" package="PANASONIC_C"> -<connects> -<connect gate="G$1" pin="+" pad="+"/> -<connect gate="G$1" pin="-" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="F80" package="NIPPON_F80"> -<connects> -<connect gate="G$1" pin="+" pad="+"/> -<connect gate="G$1" pin="-" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="D" package="PANASONIC_D"> -<connects> -<connect gate="G$1" pin="+" pad="+"/> -<connect gate="G$1" pin="-" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH3" package="CPOL-RADIAL-1000UF-63V"> -<connects> -<connect gate="G$1" pin="+" pad="1"/> -<connect gate="G$1" pin="-" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH4" package="CPOL-RADIAL-1000UF-25V"> -<connects> -<connect gate="G$1" pin="+" pad="1"/> -<connect gate="G$1" pin="-" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="SMD" package="VISHAY_C"> -<connects> -<connect gate="G$1" pin="+" pad="+"/> -<connect gate="G$1" pin="-" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="H13" package="PANASONIC_H13"> -<connects> -<connect gate="G$1" pin="+" pad="+"/> -<connect gate="G$1" pin="-" pad="-"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="6032" package="EIA6032"> -<connects> -<connect gate="G$1" pin="+" pad="P$1"/> -<connect gate="G$1" pin="-" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="MOSFET-PCHANNEL" prefix="Q"> -<gates> -<gate name="G$1" symbol="MOSFET-PCHANNEL" x="0" y="0"/> -</gates> -<devices> -<device name="SMD" package="SOT23-3"> -<connects> -<connect gate="G$1" pin="D" pad="3"/> -<connect gate="G$1" pin="G" pad="1"/> -<connect gate="G$1" pin="S" pad="2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="DIODE" prefix="D" uservalue="yes"> -<description><b>Diode</b> -These are standard reverse protection diodes and small signal diodes. SMA package can handle up to about 1A. SOD-323 can handle about 200mA. What the SOD-323 package when ordering, there are some mfgs out there that are 5-pin packages.</description> -<gates> -<gate name="G$1" symbol="DIODE" x="0" y="0"/> -</gates> -<devices> -<device name="SMA" package="SMA-DIODE"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="PTH" package="DIODE-1N4001"> -<connects> -<connect gate="G$1" pin="A" pad="A"/> -<connect gate="G$1" pin="C" pad="C"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="SOD" package="SOD-323"> -<connects> -<connect gate="G$1" pin="A" pad="2"/> -<connect gate="G$1" pin="C" pad="1"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="SOT23" package="SOT23-3"> -<connects> -<connect gate="G$1" pin="A" pad="1"/> -<connect gate="G$1" pin="C" pad="3"/> -</connects> -<technologies> -<technology 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layer="96">>VALUE</text> -<pin name="VCC" x="0" y="0" visible="off" length="short" direction="sup" rot="R90"/> -</symbol> -<symbol name="GND"> -<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> -<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="VCC" prefix="P+"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="1" symbol="VCC2" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="GND" prefix="GND"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="1" symbol="GND" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="mux"> 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width="0.254" layer="94"/> -<wire x1="2.3622" y1="6.0452" x2="2.4892" y2="6.858" width="0.254" layer="94"/> -<wire x1="2.4892" y1="6.858" x2="3.175" y2="6.858" width="0.254" layer="94"/> -<wire x1="3.175" y1="6.858" x2="3.302" y2="6.0452" width="0.254" layer="94"/> -<wire x1="3.937" y1="5.7912" x2="4.5974" y2="6.2484" width="0.254" layer="94"/> -<wire x1="4.5974" y1="6.2484" x2="5.08" y2="5.7912" width="0.254" layer="94"/> -<wire x1="5.08" y1="5.7912" x2="4.6228" y2="5.1308" width="0.254" layer="94"/> -<wire x1="4.9022" y1="4.4958" x2="5.6642" y2="4.3434" width="0.254" layer="94"/> -<wire x1="5.6642" y1="4.3434" x2="5.6642" y2="3.683" width="0.254" layer="94"/> -<wire x1="5.6642" y1="3.683" x2="4.9022" y2="3.556" width="0.254" layer="94"/> -<wire x1="4.6482" y1="2.8702" x2="5.08" y2="2.2606" width="0.254" layer="94"/> -<wire x1="5.08" y1="2.2606" x2="4.5974" y2="1.778" width="0.254" layer="94"/> -<wire x1="4.5974" y1="1.778" x2="3.9878" y2="2.2098" width="0.254" layer="94"/> -<wire x1="3.9878" y1="2.2098" x2="3.7338" y2="2.0574" width="0.254" layer="94"/> -<wire x1="3.7338" y1="2.0574" x2="3.2512" y2="3.2004" width="0.254" layer="94"/> -<wire x1="2.4384" y1="3.2258" x2="3.2512" y2="3.2258" width="0.254" layer="94" curve="-308.267286"/> -<wire x1="1.0245" y1="2.8784" x2="0.7637" y2="3.552" width="0.254" layer="94" curve="-19.673848"/> -<wire x1="0.7779" y1="4.4959" x2="1.0435" y2="5.1172" width="0.254" layer="94" curve="-18.371859"/> -<wire x1="1.736" y1="5.8003" x2="2.3432" y2="6.0469" width="0.254" layer="94" curve="-17.83212"/> -<wire x1="3.3155" y1="6.0516" x2="3.9464" y2="5.7955" width="0.254" layer="94" curve="-18.449318"/> -<wire x1="4.6199" y1="5.1267" x2="4.8997" y2="4.4959" width="0.254" layer="94" curve="-19.303177"/> -<wire x1="4.9045" y1="3.5472" x2="4.6484" y2="2.8689" width="0.254" layer="94" curve="-20.344696"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="OSHW_LOGO_FILL" prefix="LOGO"> -<gates> -<gate name="G$1" symbol="OSHW_LOGO" x="0" y="0"/> -</gates> -<devices> -<device name="X1000-NT" package="OSHW_FILLX1000_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="X0100-NT" package="OSHW_FILLX100_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="X0150-NT" package="OSHW_FILLX150_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="X0200-NT" package="OSHW_FILLX200_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="X0350-NT" package="OSHW_FILLX350_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="X0500-NT" package="OSHW_FILLX500_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="X0750-NT" package="OSHW_FILLX750_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="X0070-NT" package="OSHW_FILLX70_NOTEXT"> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="supply1"> -<description><b>Supply Symbols</b><p> - GND, VCC, 0V, +5V, -5V, etc.<p> - Please keep in mind, that these devices are necessary for the - automatic wiring of the supply signals.<p> - The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> - In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> - <author>Created by librarian@cadsoft.de</author></description> -<packages> -</packages> -<symbols> -<symbol name="VCC"> -<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> -<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">>VALUE</text> -<pin name="VCC" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="VCC" prefix="P+"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="VCC" symbol="VCC" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="holes"> -<description><b>Mounting Holes and Pads</b><p> -<author>Created by librarian@cadsoft.de</author></description> -<packages> -<package name="2,8-PAD"> -<description><b>MOUNTING PAD</b> 2.8 mm, round</description> -<wire x1="0" y1="2.921" x2="0" y2="2.667" width="0.0508" layer="21"/> -<wire x1="0" y1="-2.667" x2="0" y2="-2.921" width="0.0508" layer="21"/> -<wire x1="-1.778" y1="0" x2="0" y2="-1.778" width="2.286" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="1.778" x2="1.778" y2="0" width="2.286" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="0.635" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="2.921" width="0.1524" layer="21"/> -<circle x="0" y="0" radius="3.175" width="0.8128" layer="39"/> -<circle x="0" y="0" radius="3.175" width="0.8128" layer="40"/> -<circle x="0" y="0" radius="3.175" width="0.8128" layer="43"/> -<circle x="0" y="0" radius="1.5" width="0.2032" layer="21"/> -<pad name="B2,8" x="0" y="0" drill="2.8" diameter="5.334" thermals="no"/> -</package> -<package name="3,0-PAD"> -<description><b>MOUNTING PAD</b> 3.0 mm, round</description> -<wire x1="-2.159" y1="0" x2="0" y2="-2.159" width="2.4892" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.159" x2="2.159" y2="0" width="2.4892" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="3.429" width="0.1524" layer="21"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="3.556" width="1.016" layer="39"/> -<circle x="0" y="0" radius="3.556" width="1.016" layer="40"/> -<circle x="0" y="0" radius="3.556" width="1.016" layer="43"/> -<circle x="0" y="0" radius="1.6" width="0.2032" layer="21"/> -<pad name="B3,0" x="0" y="0" drill="3" diameter="5.842"/> -<text x="-1.27" y="-3.81" size="1.27" layer="48">3,0</text> -</package> -<package name="3,2-PAD"> -<description><b>MOUNTING PAD</b> 3.2 mm, round</description> -<wire x1="-2.159" y1="0" x2="0" y2="-2.159" width="2.4892" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.159" x2="2.159" y2="0" width="2.4892" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="3.429" width="0.1524" layer="21"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="3.683" width="1.27" layer="39"/> -<circle x="0" y="0" radius="3.683" width="1.27" layer="40"/> -<circle x="0" y="0" radius="3.556" width="1.016" layer="43"/> -<circle x="0" y="0" radius="1.7" width="0.1524" layer="21"/> -<pad name="B3,2" x="0" y="0" drill="3.2" diameter="5.842"/> -<text x="-1.27" y="-3.81" size="1.27" layer="48">3,2</text> -</package> -<package name="3,3-PAD"> -<description><b>MOUNTING PAD</b> 3.3 mm, round</description> -<wire x1="-2.159" y1="0" x2="0" y2="-2.159" width="2.4892" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.159" x2="2.159" y2="0" width="2.4892" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="3.429" width="0.1524" layer="21"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="3.683" width="1.27" layer="39"/> -<circle x="0" y="0" radius="3.683" width="1.27" layer="40"/> -<circle x="0" y="0" radius="3.556" width="1.016" layer="43"/> -<circle x="0" y="0" radius="1.7" width="0.2032" layer="21"/> -<pad name="B3,3" x="0" y="0" drill="3.3" diameter="5.842"/> -</package> -<package name="3,6-PAD"> -<description><b>MOUNTING PAD</b> 3.6 mm, round</description> -<wire x1="-2.159" y1="0" x2="0" y2="-2.159" width="2.4892" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.159" x2="2.159" y2="0" width="2.4892" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="3.429" width="0.1524" layer="21"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="3.683" width="1.397" layer="39"/> -<circle x="0" y="0" radius="3.683" width="1.397" layer="40"/> -<circle x="0" y="0" radius="3.556" width="1.016" layer="43"/> -<circle x="0" y="0" radius="1.9" width="0.2032" layer="21"/> -<pad name="B3,6" x="0" y="0" drill="3.6" diameter="5.842"/> -</package> -<package name="4,1-PAD"> -<description><b>MOUNTING PAD</b> 4.1 mm, round</description> -<wire x1="-2.54" y1="0" x2="0" y2="-2.54" width="3.9116" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.54" x2="2.54" y2="0" width="3.9116" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="4.572" width="0.1524" layer="21"/> -<circle x="0" y="0" radius="5.08" width="2" layer="41"/> -<circle x="0" y="0" radius="5.08" width="2" layer="42"/> -<circle x="0" y="0" radius="5.08" width="2" layer="43"/> -<circle x="0" y="0" radius="2.15" width="0.2032" layer="21"/> -<pad name="B4,1" x="0" y="0" drill="4.1" diameter="8"/> -</package> -<package name="4,3-PAD"> -<description><b>MOUNTING PAD</b> 4.3 mm, round</description> -<wire x1="-2.54" y1="0" x2="0" y2="-2.54" width="3.9116" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.54" x2="2.54" y2="0" width="3.9116" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="4.4958" width="0.1524" layer="51"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="5.588" width="2" layer="43"/> -<circle x="0" y="0" radius="5.588" width="2" layer="42"/> -<circle x="0" y="0" radius="5.588" width="2" layer="41"/> -<circle x="0" y="0" radius="5.588" width="2" layer="39"/> -<circle x="0" y="0" radius="5.588" width="2" layer="40"/> -<circle x="0" y="0" radius="2.25" width="0.1524" layer="21"/> -<pad name="B4,3" x="0" y="0" drill="4.3" diameter="9"/> -</package> -<package name="4,5-PAD"> -<description><b>MOUNTING PAD</b> 4.5 mm, round</description> -<wire x1="-2.54" y1="0" x2="0" y2="-2.54" width="3.9116" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.54" x2="2.54" y2="0" width="3.9116" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="4.4958" width="0.1524" layer="51"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="5.588" width="2" layer="43"/> -<circle x="0" y="0" radius="5.588" width="2" layer="42"/> -<circle x="0" y="0" radius="5.588" width="2" layer="41"/> -<circle x="0" y="0" radius="5.588" width="2" layer="39"/> -<circle x="0" y="0" radius="5.588" width="2" layer="40"/> -<circle x="0" y="0" radius="2.35" width="0.1524" layer="21"/> -<pad name="B4,5" x="0" y="0" drill="4.5" diameter="9"/> -</package> -<package name="5,0-PAD"> -<description><b>MOUNTING PAD</b> 5.0 mm, round</description> -<wire x1="-2.54" y1="0" x2="0" y2="-2.54" width="3.9116" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.54" x2="2.54" y2="0" width="3.9116" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="4.4958" width="0.1524" layer="51"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="5.588" width="2" layer="43"/> -<circle x="0" y="0" radius="5.588" width="2" layer="42"/> -<circle x="0" y="0" radius="5.588" width="2" layer="41"/> -<circle x="0" y="0" radius="5.588" width="2" layer="39"/> -<circle x="0" y="0" radius="5.588" width="2" layer="40"/> -<circle x="0" y="0" radius="2.6" width="0.1524" layer="21"/> -<pad name="B5" x="0" y="0" drill="5" diameter="9"/> -</package> -<package name="5,5-PAD"> -<description><b>MOUNTING PAD</b> 5.5 mm, round</description> -<wire x1="-2.54" y1="0" x2="0" y2="-2.54" width="3.9116" layer="51" curve="90" cap="flat"/> -<wire x1="0" y1="2.54" x2="2.54" y2="0" width="3.9116" layer="51" curve="-90" cap="flat"/> -<circle x="0" y="0" radius="4.4958" width="0.1524" layer="51"/> -<circle x="0" y="0" radius="0.762" width="0.4572" layer="51"/> -<circle x="0" y="0" radius="5.588" width="2" layer="43"/> -<circle x="0" y="0" radius="5.588" width="2" layer="42"/> -<circle x="0" y="0" radius="5.588" width="2" layer="41"/> -<circle x="0" y="0" radius="5.588" width="2" layer="39"/> -<circle x="0" y="0" radius="5.588" width="2" layer="40"/> -<circle x="0" y="0" radius="2.85" width="0.1524" layer="21"/> -<pad name="B5,5" x="0" y="0" drill="5.5" diameter="9"/> -</package> -</packages> -<symbols> -<symbol name="MOUNT-PAD"> -<wire x1="0.254" y1="2.032" x2="2.032" y2="0.254" width="1.016" layer="94" curve="-75.749967" cap="flat"/> -<wire x1="-2.032" y1="0.254" x2="-0.254" y2="2.032" width="1.016" layer="94" curve="-75.749967" cap="flat"/> -<wire x1="-2.032" y1="-0.254" x2="-0.254" y2="-2.032" width="1.016" layer="94" curve="75.749967" cap="flat"/> -<wire x1="0.254" y1="-2.032" x2="2.032" y2="-0.254" width="1.016" layer="94" curve="75.749967" cap="flat"/> -<circle x="0" y="0" radius="1.524" width="0.0508" layer="94"/> -<text x="2.794" y="0.5842" size="1.778" layer="95">>NAME</text> -<text x="2.794" y="-2.4638" size="1.778" layer="96">>VALUE</text> -<pin name="MOUNT" x="-2.54" y="0" visible="off" length="short" direction="pas"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="MOUNT-PAD-ROUND" prefix="H"> -<description><b>MOUNTING PAD</b>, round</description> -<gates> -<gate name="G$1" symbol="MOUNT-PAD" x="0" y="0"/> -</gates> -<devices> -<device name="2.8" package="2,8-PAD"> -<connects> -<connect gate="G$1" pin="MOUNT" pad="B2,8"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="3.0" package="3,0-PAD"> -<connects> -<connect gate="G$1" pin="MOUNT" pad="B3,0"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="3.2" package="3,2-PAD"> -<connects> -<connect gate="G$1" pin="MOUNT" pad="B3,2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> 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name="PG13/SPI6_SCK/USART6_CTS/ETH_MII_TXD0/ETH_RMII_TXD0/FMC_A24" x="86.36" y="-99.06" visible="pin" length="middle" rot="R180"/> -<pin name="PG14/SPI6_MOSI/USART6_TX/ETH_MII_TXD1/ETH_RMII_TXD1/FMC_A25" x="86.36" y="-101.6" visible="pin" length="middle" rot="R180"/> -<text x="-73.66" y="68.58" size="5.08" layer="95" ratio="16">>NAME</text> -<text x="53.34" y="-147.32" size="5.08" layer="95" ratio="16">>VALUE</text> -<pin name="PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC" x="-78.74" y="5.08" visible="pin" length="middle"/> -<pin name="PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK" x="-78.74" y="0" visible="pin" length="middle"/> -<pin name="PB7/TIM4_CH2//I2C1_SDA/USART1_RX//FMC_NL/DCMI_VSYNC" x="-78.74" y="-45.72" visible="pin" length="middle"/> -<pin name="PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/SDIO_D4/DCMI_D6" x="-78.74" y="-48.26" visible="pin" length="middle"/> -<pin name="PB9/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/SDIO_D5/DCMI_D7" x="-78.74" y="-50.8" visible="pin" length="middle"/> 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visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@4" x="-78.74" y="55.88" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@5" x="-78.74" y="53.34" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@6" x="-78.74" y="50.8" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@7" x="-78.74" y="48.26" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@8" x="-78.74" y="45.72" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@9" x="-78.74" y="43.18" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@10" x="-78.74" y="40.64" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD@11" x="-78.74" y="38.1" visible="pin" length="middle" direction="pwr"/> -<pin name="VDD33USB" x="-78.74" y="35.56" visible="pin" length="middle" direction="pwr"/> -<pin name="VDDA" x="-78.74" y="27.94" visible="pin" length="middle" direction="pwr"/> -<pin name="VREF+" x="-78.74" y="25.4" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@1" x="-78.74" y="-116.84" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@2" x="-78.74" y="-119.38" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@3" x="-78.74" y="-121.92" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@4" x="-78.74" y="-124.46" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@5" x="-78.74" y="-127" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@6" x="-78.74" y="-129.54" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@7" x="-78.74" y="-132.08" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@8" x="-78.74" y="-134.62" visible="pin" length="middle" direction="pwr"/> -<pin name="VSS@9" x="-78.74" y="-137.16" visible="pin" length="middle" direction="pwr"/> -<pin name="VSSA" x="-78.74" y="-114.3" visible="pin" length="middle" direction="pwr"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="STM32H743ZIT6"> -<gates> -<gate name="G$2" symbol="STM32H743" x="-53.34" y="71.12"/> -</gates> -<devices> -<device name="" package="LQFP144@1"> -<connects> -<connect gate="G$2" pin="BOOT0" pad="138"/> -<connect gate="G$2" pin="NRST" pad="25"/> -<connect gate="G$2" pin="PA0/USART2_CTS/UART4_TX/TIM2_CH1_ETR/WKUP/TIM5_CH1/TIM8_ETR" pad="34"/> -<connect gate="G$2" pin="PA1/USART2_RTS/UART4_RX/TIM5_CH2/TIM2_CH2" pad="35"/> -<connect gate="G$2" pin="PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1" pad="102"/> -<connect gate="G$2" pin="PA11/TIM1_CH4/USART1_CTS/CAN1_RX/LCD_R4/OTG_FS_DM" pad="103"/> -<connect gate="G$2" pin="PA12/TIM1_ETR/USART1_RTS/CAN1_TX/LCD_R5/OTG_FS_DP" pad="104"/> -<connect gate="G$2" pin="PA13/JTMS-SWDIO" pad="105"/> -<connect gate="G$2" pin="PA14/JTCK-SWCLK" pad="109"/> -<connect gate="G$2" pin="PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS" pad="110"/> -<connect gate="G$2" pin="PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO" pad="36"/> -<connect gate="G$2" pin="PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0" pad="37"/> -<connect gate="G$2" pin="PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC" pad="40"/> -<connect gate="G$2" pin="PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1/TIM2_ETR/TIM8_CHIN/ADC12_IN5" pad="41"/> -<connect gate="G$2" pin="PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK" pad="42"/> -<connect gate="G$2" pin="PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/ETH_RMII_CRS_DV" pad="43"/> -<connect gate="G$2" pin="PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF" pad="100"/> -<connect gate="G$2" pin="PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS" pad="101"/> -<connect gate="G$2" pin="PB0/TIM3_CH3/TIM8_CH2N/TIM1_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2" pad="46"/> -<connect gate="G$2" pin="PB1/TIM3_CH4/TIM8_CH3N/TIM1_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3" pad="47"/> -<connect gate="G$2" pin="PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3" pad="69"/> -<connect gate="G$2" pin="PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/TIM2_CH4" pad="70"/> -<connect gate="G$2" pin="PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX" pad="73"/> -<connect gate="G$2" pin="PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6" pad="74"/> -<connect gate="G$2" pin="PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N" pad="75"/> -<connect gate="G$2" pin="PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP" pad="76"/> -<connect gate="G$2" pin="PB2/BOOT1" pad="48"/> -<connect gate="G$2" pin="PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK" pad="133"/> -<connect gate="G$2" pin="PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD" pad="134"/> -<connect gate="G$2" pin="PB5/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/DCMI_D10/FMC_SDCKE1" pad="135"/> -<connect gate="G$2" pin="PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/FMC_SDNE1/DCMI_D5" pad="136"/> -<connect gate="G$2" pin="PB7/TIM4_CH2//I2C1_SDA/USART1_RX//FMC_NL/DCMI_VSYNC" pad="137"/> -<connect gate="G$2" pin="PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/SDIO_D4/DCMI_D6" pad="139"/> -<connect gate="G$2" pin="PB9/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/SDIO_D5/DCMI_D7" pad="140"/> -<connect gate="G$2" pin="PC0/OTG_HS_ULPI_STP/ADC123_IN10/FMC_SDNWE" pad="26"/> -<connect gate="G$2" pin="PC1/ETH_MDC/ADC123_IN11" pad="27"/> -<connect gate="G$2" pin="PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX" pad="111"/> -<connect gate="G$2" pin="PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4" pad="112"/> -<connect gate="G$2" pin="PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK" pad="113"/> -<connect gate="G$2" pin="PC13/TAMP_1" pad="7"/> -<connect gate="G$2" pin="PC14/OSC32_IN" pad="8"/> -<connect gate="G$2" pin="PC15/OSC32_OUT" pad="9"/> -<connect gate="G$2" pin="PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/FMC_SDNE0" pad="28"/> -<connect gate="G$2" pin="PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLK/FMC_SDCKE0" pad="29"/> -<connect gate="G$2" pin="PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/ADC12_IN14" pad="44"/> -<connect gate="G$2" pin="PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/ADC12_IN15" pad="45"/> -<connect gate="G$2" pin="PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0" pad="96"/> -<connect gate="G$2" pin="PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1" pad="97"/> -<connect gate="G$2" pin="PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2" pad="98"/> -<connect gate="G$2" pin="PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4" pad="99"/> -<connect gate="G$2" pin="PD0/FMC_D2/CAN1_RX" pad="114"/> -<connect gate="G$2" pin="PD1/FMC_D3/CAN1_TX" pad="115"/> -<connect gate="G$2" pin="PD10/FMC_D15/USART3_CK" pad="79"/> -<connect gate="G$2" pin="PD11/FMC_A16/USART3_CTS" pad="80"/> -<connect gate="G$2" pin="PD12/FMC_A17/TIM4_CH1/USART3_RTS" pad="81"/> -<connect gate="G$2" pin="PD13/FMC_A18/TIM4_CH2" pad="82"/> -<connect gate="G$2" pin="PD14/FMC_D0/TIM4_CH3" pad="85"/> -<connect gate="G$2" pin="PD15/FMC_D1/TIM4_CH4" pad="86"/> -<connect gate="G$2" pin="PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11" pad="116"/> -<connect gate="G$2" pin="PD3/SPI2_SCK/I2S2_CK/USART2_CTS/FMC_CLK/DCMI_D5" pad="117"/> -<connect gate="G$2" pin="PD4/USART2_RTS/FMC_NOE" pad="118"/> -<connect gate="G$2" pin="PD5/USART2_TX/FMC_NWE" pad="119"/> -<connect gate="G$2" pin="PD6/SPI3_MOSI/I2S3_SD/USART2_RX/FMC_NWAIT/DCMI_D10" pad="122"/> -<connect gate="G$2" pin="PD7/USART2_CK/FSMC_NE1/FSMC_NCE2" pad="123"/> -<connect gate="G$2" pin="PD8/FMC_D13/USART3_TX" pad="77"/> -<connect gate="G$2" pin="PD9/FMC_D14/USART3_RX" pad="78"/> -<connect gate="G$2" pin="PDR_ON" pad="143"/> -<connect gate="G$2" pin="PE0/TIM4_ETR/UART8_RX/FMC_NBL0/DCMI_D2" pad="141"/> -<connect gate="G$2" pin="PE1/UART8_TX/FMC_NBL1/DCMI_D3" pad="142"/> -<connect gate="G$2" pin="PE10/FMC_D7/TIM1_CH2N" pad="63"/> -<connect gate="G$2" pin="PE11/FMC_D8/TIM1_CH2/SPI4_NSS" pad="64"/> -<connect gate="G$2" pin="PE12/FMC_D9/TIM1_CH3N/SPI4_SCK" pad="65"/> -<connect gate="G$2" pin="PE13/FMC_D10/TIM1_CH3/SPI4_MISO" pad="66"/> -<connect gate="G$2" pin="PE14/FMC_D11/TIM1_CH4/SPI4_MOSI" pad="67"/> -<connect gate="G$2" pin="PE15/FMC_D12/TIM1_BKIN/" pad="68"/> -<connect gate="G$2" pin="PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/SPI4_SCK" pad="1"/> -<connect gate="G$2" pin="PE3/TRACED0/FSMC_A19" pad="2"/> -<connect gate="G$2" pin="PE4/TRACED1/FSMC_A20/DCMI_D4/SPI4_NSS" pad="3"/> -<connect gate="G$2" pin="PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/SPI4_MISO" pad="4"/> -<connect gate="G$2" pin="PE6/TRACED3/FSMC_A22/TIM9_CH2/DCMI_D7/SPI4_MOSI" pad="5"/> -<connect gate="G$2" pin="PE7/FMC_D4/TIM1_ETR/UART7_RX" pad="58"/> -<connect gate="G$2" pin="PE8/FSMC_D5/TIM1_CH1N/UART7_TX" pad="59"/> -<connect gate="G$2" pin="PE9/FMC_D6/TIM1_CH1" pad="60"/> -<connect gate="G$2" pin="PF0/I2C2_SDA/FMC_A0" pad="10"/> -<connect gate="G$2" pin="PF1/I2C2_SCL/FMC_A1" pad="11"/> -<connect gate="G$2" pin="PF10/FMC_INTR/DCMI_D11/LCD_DE" pad="22"/> -<connect gate="G$2" pin="PF11/DCMI_12/SPI5_MOSI/FMC_SDNRAS" pad="49"/> -<connect gate="G$2" pin="PF12/FMC_A6" pad="50"/> -<connect gate="G$2" pin="PF13/FMC_A7" pad="53"/> -<connect gate="G$2" pin="PF14/FMC_A8" pad="54"/> -<connect gate="G$2" pin="PF15/FMC_A9" pad="55"/> -<connect gate="G$2" pin="PF2/I2C2_SMBA/FSMC_A2" pad="12"/> -<connect gate="G$2" pin="PF3/FMC_A3" pad="13"/> -<connect gate="G$2" pin="PF4/FMC_A4" pad="14"/> -<connect gate="G$2" pin="PF5/FMC_A5" pad="15"/> -<connect gate="G$2" pin="PF6/TIM10_CH1/SPI5_NSS/SAI1_SD_B/UART7_RX/FMC_NIORD" pad="18"/> -<connect gate="G$2" pin="PF7/TIM11_CH1/SPI5_SCK/SAI1_MCLK_B/UART7_TX/FMC_NREG" pad="19"/> -<connect gate="G$2" pin="PF8/TIM13_CH1/SPI5_MISO/SAI1_SCK_B/FMC_NIOWR" pad="20"/> -<connect gate="G$2" pin="PF9/TIM14_CH1/SPI5_MOSI/SAI1_FS_B/FMC_CD" pad="21"/> -<connect gate="G$2" pin="PG0/FMC_A10" pad="56"/> -<connect gate="G$2" pin="PG1/FMC_A11" pad="57"/> -<connect gate="G$2" pin="PG10/LCD_G3/FMC_NCE4_1/FMC_NE3/DCMI_D2/LCD_B2" pad="125"/> -<connect gate="G$2" pin="PG11/ETH_MII_TX_EN/ETH_RMII_TX_ENFMC_NCE4_2/DCMI_D3" pad="126"/> -<connect gate="G$2" pin="PG12/SPI6_MISO/USART6_RTS/LCD_B4/FMC_NE4/LCD_B1" pad="127"/> -<connect gate="G$2" pin="PG13/SPI6_SCK/USART6_CTS/ETH_MII_TXD0/ETH_RMII_TXD0/FMC_A24" pad="128"/> -<connect gate="G$2" pin="PG14/SPI6_MOSI/USART6_TX/ETH_MII_TXD1/ETH_RMII_TXD1/FMC_A25" pad="129"/> -<connect gate="G$2" pin="PG15/USART6_CTS/DCMI_D13/FMC_SDNCAS" pad="132"/> -<connect gate="G$2" pin="PG2/FMC_A12" pad="87"/> -<connect gate="G$2" pin="PG3/FMC_A13" pad="88"/> -<connect gate="G$2" pin="PG4/FMC_A14/FMC_BA0" pad="89"/> -<connect gate="G$2" pin="PG5/FMC_A15/FMC_BA1" pad="90"/> -<connect gate="G$2" pin="PG6/FSMC_INT2/DCMI_D12" pad="91"/> -<connect gate="G$2" pin="PG7/FSMC_INT3/DCMI_D13" pad="92"/> -<connect gate="G$2" pin="PG8/SPI6_NSS/USART6_RTS/ETH_PPS_OUT/FMC_SDCLK" pad="93"/> -<connect gate="G$2" pin="PG9/USART6_RX/FMC_NE2/FMC_NCE3/DCMI_VSYNC" pad="124"/> -<connect gate="G$2" pin="PH0/OSC_IN" pad="23"/> -<connect gate="G$2" pin="PH1/OSC_OUT" pad="24"/> -<connect gate="G$2" pin="VBAT" pad="6"/> -<connect gate="G$2" pin="VCAP@1" pad="71"/> -<connect gate="G$2" pin="VCAP@2" pad="106"/> -<connect gate="G$2" pin="VDD33USB" pad="95"/> -<connect gate="G$2" pin="VDD@1" pad="17"/> -<connect gate="G$2" pin="VDD@10" pad="131"/> -<connect gate="G$2" pin="VDD@11" pad="144"/> -<connect gate="G$2" pin="VDD@2" pad="30"/> -<connect gate="G$2" pin="VDD@3" pad="39"/> -<connect gate="G$2" pin="VDD@4" pad="52"/> -<connect gate="G$2" pin="VDD@5" pad="62"/> -<connect gate="G$2" pin="VDD@6" pad="72"/> -<connect gate="G$2" pin="VDD@7" pad="84"/> -<connect gate="G$2" pin="VDD@8" pad="108"/> -<connect gate="G$2" pin="VDD@9" pad="121"/> -<connect gate="G$2" pin="VDDA" pad="33"/> -<connect gate="G$2" pin="VREF+" pad="32"/> -<connect gate="G$2" pin="VSS@1" pad="16"/> -<connect gate="G$2" pin="VSS@2" pad="38"/> -<connect gate="G$2" pin="VSS@3" pad="51"/> -<connect gate="G$2" pin="VSS@4" pad="61"/> -<connect gate="G$2" pin="VSS@5" pad="83"/> -<connect gate="G$2" pin="VSS@6" pad="94"/> -<connect gate="G$2" pin="VSS@7" pad="107"/> -<connect gate="G$2" pin="VSS@8" pad="120"/> -<connect gate="G$2" pin="VSS@9" pad="130"/> -<connect gate="G$2" pin="VSSA" pad="31"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="supply"> -<packages> -</packages> -<symbols> -<symbol name="VBUS"> -<wire x1="1.27" y1="0.635" x2="0" y2="2.54" width="0.254" layer="94"/> -<wire x1="0" y1="2.54" x2="-1.27" y2="0.635" width="0.254" layer="94"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">>VALUE</text> -<pin name="VBUS" x="0" y="0" visible="off" length="short" direction="sup" rot="R90"/> -</symbol> -<symbol name="RAW"> -<wire x1="1.27" y1="0.635" x2="0" y2="2.54" width="0.254" layer="94"/> -<wire x1="0" y1="2.54" x2="-1.27" y2="0.635" width="0.254" layer="94"/> -<pin name="RAW" x="0" y="0" visible="off" length="short" direction="sup" rot="R90"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">>VALUE</text> -</symbol> -<symbol name="GND"> -<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> -<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> -</symbol> -<symbol name="VIN"> -<wire x1="1.27" y1="0.635" x2="0" y2="2.54" width="0.254" layer="94"/> -<wire x1="0" y1="2.54" x2="-1.27" y2="0.635" width="0.254" layer="94"/> -<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">>VALUE</text> -<pin name="VIN" x="0" y="0" visible="off" length="short" direction="sup" rot="R90"/> -</symbol> -<symbol name="VDDA"> -<wire x1="1.27" y1="0.635" x2="0" y2="2.54" width="0.254" layer="94"/> -<wire x1="0" y1="2.54" x2="-1.27" y2="0.635" width="0.254" layer="94"/> -<text x="-2.54" y="0" size="1.778" layer="96" rot="R90">>VALUE</text> -<pin name="VDDA" x="0" y="0" visible="off" length="short" direction="sup" rot="R90"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="VBUS" prefix="VBUS"> -<gates> -<gate name="G$1" symbol="VBUS" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="RAW" prefix="RAW"> -<gates> -<gate name="G$1" symbol="RAW" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="GND" prefix="GND"> -<description><b>SUPPLY SYMBOL</b></description> -<gates> -<gate name="1" symbol="GND" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="VIN" prefix="VIN"> -<gates> -<gate name="G$1" symbol="VIN" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="VDDA" prefix="VDDA"> -<gates> -<gate name="G$1" symbol="VDDA" x="0" y="0"/> -</gates> -<devices> -<device name=""> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="regulators"> -<packages> -<package name="TSOT25"> -<wire x1="1.4224" y1="0.4294" x2="1.4224" y2="-0.4294" width="0.2032" layer="21"/> -<wire x1="1.4" y1="-0.8" x2="-1.4" y2="-0.8" width="0.1524" layer="51"/> -<wire x1="-1.4224" y1="-0.4294" x2="-1.4224" y2="0.4294" width="0.2032" layer="21"/> -<wire x1="-1.4" y1="0.8" x2="1.4" y2="0.8" width="0.1524" layer="51"/> -<wire x1="-0.2684" y1="0.8104" x2="0.2684" y2="0.8104" width="0.2032" layer="21"/> -<wire x1="1.4" y1="0.8" x2="1.4" y2="-0.8" width="0.1524" layer="51"/> -<wire x1="-1.4" y1="0.8" x2="-1.4" y2="-0.8" width="0.1524" layer="51"/> -<smd name="1" x="-0.95" y="-1.3001" dx="0.55" dy="1.2" layer="1"/> -<smd name="2" x="0" y="-1.3001" dx="0.55" dy="1.2" layer="1"/> -<smd name="3" x="0.95" y="-1.3001" dx="0.55" dy="1.2" layer="1"/> -<smd name="4" x="0.95" y="1.3001" dx="0.55" dy="1.2" layer="1"/> -<smd name="5" x="-0.95" y="1.3001" dx="0.55" dy="1.2" layer="1"/> -<text x="-0.889" y="2.159" size="0.4064" layer="25">>NAME</text> -<text x="-0.9525" y="-0.1905" size="0.4064" layer="27">>VALUE</text> -<rectangle x1="-1.2" y1="-1.5" x2="-0.7" y2="-0.85" layer="51"/> -<rectangle x1="-0.25" y1="-1.5" x2="0.25" y2="-0.85" layer="51"/> -<rectangle x1="0.7" y1="-1.5" x2="1.2" y2="-0.85" layer="51"/> -<rectangle x1="0.7" y1="0.85" x2="1.2" y2="1.5" layer="51"/> -<rectangle x1="-1.2" y1="0.85" x2="-0.7" y2="1.5" layer="51"/> -</package> -</packages> -<symbols> -<symbol name="PAM2305"> -<wire x1="-10.16" y1="-10.16" x2="10.16" y2="-10.16" width="0.4064" layer="94"/> -<wire x1="10.16" y1="-10.16" x2="10.16" y2="10.16" width="0.4064" layer="94"/> -<wire x1="10.16" y1="10.16" x2="-10.16" y2="10.16" width="0.4064" layer="94"/> -<wire x1="-10.16" y1="10.16" x2="-10.16" y2="-10.16" width="0.4064" layer="94"/> -<text x="-10.16" y="11.43" size="1.778" layer="95">>NAME</text> -<pin name="EN" x="-12.7" y="5.08" length="short" direction="nc"/> -<pin name="VIN" x="-12.7" y="7.62" length="short" direction="pwr"/> -<pin name="VOUT/FB" x="12.7" y="-7.62" length="short" direction="pas" rot="R180"/> -<pin name="SW" x="12.7" y="7.62" length="short" direction="pwr" rot="R180"/> -<text x="3.81" y="-12.7" size="1.778" layer="96">>VALUE</text> -<pin name="GND" x="-12.7" y="-7.62" length="short" direction="pwr"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="PAM2305AAB330"> -<gates> -<gate name="G$1" symbol="PAM2305" x="0" y="0"/> -</gates> -<devices> -<device name="" package="TSOT25"> -<connects> -<connect gate="G$1" pin="EN" pad="3"/> -<connect gate="G$1" pin="GND" pad="2"/> -<connect gate="G$1" pin="SW" pad="5"/> -<connect gate="G$1" pin="VIN" pad="1"/> -<connect gate="G$1" pin="VOUT/FB" pad="4"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="MF_Connectors"> -<packages> -<package name="MICROUSB-RIGHT"> -<description><b>Description:</b> Package for Micro USB Type B connector. Based on FCI 10118193-0001LF.<br></description> -<smd name="3" x="0" y="1.27" dx="0.4" dy="1.35" layer="1" rot="R180"/> -<smd name="4" x="0.65" y="1.27" dx="0.4" dy="1.35" layer="1" rot="R180"/> -<smd name="2" x="-0.65" y="1.27" dx="0.4" dy="1.35" layer="1" rot="R180"/> -<smd name="1" x="-1.3" y="1.27" dx="0.4" dy="1.35" layer="1" rot="R180"/> -<smd name="5" x="1.3" y="1.27" dx="0.4" dy="1.35" layer="1" rot="R180"/> -<smd name="S3" x="-3.2" y="1.27" dx="1.4" dy="1.6" layer="1" rot="R90"/> -<smd name="S4" x="3.2" y="1.27" dx="1.4" dy="1.6" layer="1" rot="R90"/> -<pad name="S2" x="3.3" y="-1.405" drill="1.1" rot="R180"/> -<pad name="S1" x="-3.3" y="-1.405" drill="1.1" rot="R180"/> -<text x="-5.08" y="2.7" size="0.8128" layer="25" font="vector" ratio="16">>NAME</text> -<wire x1="-4.58" y1="-2.855" x2="4.58" y2="-2.855" width="0.127" layer="21"/> -<wire x1="-4.58" y1="-2.855" x2="-4.58" y2="2.3" width="0.127" layer="21"/> -<wire x1="-4.58" y1="2.3" x2="4.58" y2="2.3" width="0.127" layer="21"/> -<wire x1="4.58" y1="2.3" x2="4.58" y2="-2.855" width="0.127" layer="21"/> -<smd name="S5" x="-1.2" y="-1.405" dx="1.9" dy="1.9" layer="1"/> -<smd name="S6" x="1.2" y="-1.405" dx="1.9" dy="1.9" layer="1"/> -</package> -<package name="MINIUSB-RIGHT"> -<description><b>Description:</b> Package for Mini USB Type B connector. Based on 4UCON 20236.<br></description> -<smd name="1" x="-1.6" y="0" dx="0.5" dy="2.25" layer="1"/> -<smd name="2" x="-0.8" y="0" dx="0.5" dy="2.25" layer="1"/> -<smd name="3" x="0" y="0" dx="0.5" dy="2.25" layer="1"/> -<smd name="4" x="0.8" y="0" dx="0.5" dy="2.25" layer="1"/> -<smd name="5" x="1.6" y="0" dx="0.5" dy="2.25" layer="1"/> -<smd name="S1" x="-4.45" y="-0.125" dx="2" dy="2.5" layer="1"/> -<smd name="S3" x="-4.45" y="-5.5" dx="2" dy="2.5" layer="1"/> -<smd name="S4" x="4.45" y="-5.5" dx="2" dy="2.5" layer="1"/> -<smd name="S2" x="4.45" y="-0.125" dx="2" dy="2.5" layer="1"/> -<hole x="-2.2" y="-2.675" drill="0.9"/> -<hole x="2.2" y="-2.675" drill="0.9"/> -<wire x1="-3.8" y1="-1.75" x2="-3.8" y2="-4" width="0.127" layer="21"/> -<wire x1="-3.8" y1="-7" x2="-3.8" y2="-8.575" width="0.127" layer="21"/> -<wire x1="-3.8" y1="-8.575" x2="3.8" y2="-8.575" width="0.127" layer="21"/> -<wire x1="-2.25" y1="0.625" x2="-3.05" y2="0.625" width="0.127" layer="21"/> -<wire x1="2.25" y1="0.625" x2="3.05" y2="0.625" width="0.127" layer="21"/> -<wire x1="3.8" y1="-7" x2="3.8" y2="-8.575" width="0.127" layer="21"/> -<wire x1="3.8" y1="-1.75" x2="3.8" y2="-4" width="0.127" layer="21"/> -<text x="-3.8" y="1.5" size="0.8128" layer="25" font="vector" ratio="16">>NAME</text> -</package> -</packages> -<symbols> -<symbol name="USB_5PIN"> -<description><b>Description:</b> Symbol for 5-Pin USB connectors.<br></description> -<pin name="5V" x="7.62" y="5.08" visible="off" length="short" direction="pwr" rot="R180"/> -<pin name="D-" x="7.62" y="2.54" visible="off" length="short" rot="R180"/> -<pin name="D+" x="7.62" y="0" visible="off" length="short" rot="R180"/> -<pin name="GND" x="7.62" y="-5.08" visible="off" length="short" direction="pwr" rot="R180"/> -<text x="0" y="6.096" size="1.016" layer="97" font="vector" align="bottom-center">USB PORT</text> -<wire x1="5.08" y1="7.62" x2="5.08" y2="-10.16" width="0.127" layer="94"/> -<wire x1="5.08" y1="-10.16" x2="-5.08" y2="-10.16" width="0.127" layer="94"/> -<wire x1="-5.08" y1="-10.16" x2="-5.08" y2="7.62" width="0.127" layer="94"/> -<wire x1="-5.08" y1="7.62" x2="5.08" y2="7.62" width="0.127" layer="94"/> -<text x="-5.08" y="12.7" size="1.016" layer="95" font="vector" align="top-left">>NAME</text> -<text x="-5.08" y="10.16" size="1.016" layer="96" font="vector">>VALUE</text> -<pin name="ID" x="7.62" y="-2.54" visible="off" length="short" rot="R180"/> -<pin name="SLD" x="7.62" y="-7.62" visible="off" length="short" direction="pas" rot="R180"/> -<text x="4.572" y="5.08" size="1.016" layer="97" font="vector" align="center-right">5V</text> -<text x="4.572" y="2.54" size="1.016" layer="97" font="vector" align="center-right">D-</text> -<text x="4.572" y="0" size="1.016" layer="97" font="vector" align="center-right">D+</text> -<text x="4.572" y="-2.54" size="1.016" layer="97" font="vector" align="center-right">ID</text> -<text x="4.572" y="-5.08" size="1.016" layer="97" font="vector" align="center-right">GND</text> -<text x="4.572" y="-7.62" size="1.016" layer="97" font="vector" align="center-right">SHIELD</text> -<polygon width="0.254" layer="94"> -<vertex x="-1.905" y="3.175"/> -<vertex x="-1.27" y="4.445"/> -<vertex x="-0.635" y="3.175"/> -</polygon> -<polygon width="0.254" layer="94"> -<vertex x="-3.175" y="0.3175" curve="-90"/> -<vertex x="-2.8575" y="0" curve="-90"/> -<vertex x="-3.175" y="-0.3175" curve="-90"/> -<vertex x="-3.4925" y="0" curve="-90"/> -</polygon> -<polygon width="0.254" layer="94"> -<vertex x="0.3175" y="1.5875"/> -<vertex x="0.3175" y="0.9525"/> -<vertex x="0.9525" y="0.9525"/> -<vertex x="0.9525" y="1.5875"/> -</polygon> -<wire x1="-1.27" y1="-3.595840625" x2="-1.27" y2="-2.325840625" width="0.254" layer="94"/> -<wire x1="-1.27" y1="-2.325840625" x2="-1.27" y2="3.175" width="0.254" layer="94"/> -<wire x1="0.337421875" y1="-0.297578125" x2="-0.972421875" y2="-1.607421875" width="0.254" layer="94"/> -<wire x1="-3.175" y1="0" x2="-3.175" y2="-0.849159375" width="0.254" layer="94"/> -<wire x1="-2.877421875" y1="-1.567578125" x2="-1.567578125" y2="-2.877421875" width="0.254" layer="94"/> -<wire x1="-3.175" y1="-0.849159375" x2="-2.877421875" y2="-1.567578125" width="0.254" layer="94" curve="44.999875"/> -<wire x1="0.635" y1="1.27" x2="0.635" y2="0.420840625" width="0.254" layer="94"/> -<wire x1="0.635" y1="0.420840625" x2="0.337421875" y2="-0.297578125" width="0.254" layer="94" curve="-44.999875"/> -<wire x1="-1.27" y1="-3.81" x2="-1.27" y2="-3.595840625" width="0.254" layer="94"/> -<wire x1="-1.27" y1="-3.595840625" x2="-1.567578125" y2="-2.877421875" width="0.254" layer="94" curve="44.999875"/> -<wire x1="-1.27" y1="-2.325840625" x2="-0.972421875" y2="-1.607421875" width="0.254" layer="94" curve="-44.999875"/> -<polygon width="0.254" layer="94"> -<vertex x="-1.2065" y="-5.715"/> -<vertex x="-1.3335" y="-5.715" curve="-90"/> -<vertex x="-2.2225" y="-4.826"/> -<vertex x="-2.2225" y="-4.699" curve="-90"/> -<vertex x="-1.3335" y="-3.81"/> -<vertex x="-1.2065" y="-3.81" curve="-90"/> -<vertex x="-0.3175" y="-4.699"/> -<vertex x="-0.3175" y="-4.826" curve="-90"/> -</polygon> -</symbol> -</symbols> -<devicesets> -<deviceset name="USB" prefix="J" uservalue="yes"> -<description><b>Library:</b> MF_Connectors<br/> -<b>Description:</b> 5 Pin USB Connectors. SLD is the shield connection. Usually tied to ground through a small ferrite bead.<br/></description> -<gates> -<gate name="G$1" symbol="USB_5PIN" x="0" y="0"/> -</gates> -<devices> -<device name="_MICRO_RIGHT" package="MICROUSB-RIGHT"> -<connects> -<connect gate="G$1" pin="5V" pad="1"/> -<connect gate="G$1" pin="D+" pad="3"/> -<connect gate="G$1" pin="D-" pad="2"/> -<connect gate="G$1" pin="GND" pad="5"/> -<connect gate="G$1" pin="ID" pad="4"/> -<connect gate="G$1" pin="SLD" pad="S1 S2 S3 S4 S5 S6"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="_MINI_RIGHT" package="MINIUSB-RIGHT"> -<connects> -<connect gate="G$1" pin="5V" pad="1"/> -<connect gate="G$1" pin="D+" pad="3"/> -<connect gate="G$1" pin="D-" pad="2"/> -<connect gate="G$1" pin="GND" pad="5"/> -<connect gate="G$1" pin="ID" pad="4"/> -<connect gate="G$1" pin="SLD" pad="S1 S2 S3 S4"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="adafruit-updated"> -<packages> -<package name="JST-PH-2-SMT-RA"> -<description>2-Pin JST PH Series Right-Angle Connector (+/- for batteries)</description> -<wire x1="-4" y1="3" x2="4" y2="3" width="0.2032" layer="51"/> -<wire x1="4" y1="3" x2="4" y2="-4.5" width="0.2032" layer="51"/> -<wire x1="-4" y1="-4.5" x2="-4" y2="3" width="0.2032" layer="51"/> -<wire x1="3.2" y1="-2" x2="-3.2" y2="-2" width="0.2032" layer="51"/> -<wire x1="-3.2" y1="-2" x2="-3.2" y2="-4.5" width="0.2032" layer="51"/> -<wire x1="-3.2" y1="-4.5" x2="-4" y2="-4.5" width="0.2032" layer="51"/> -<wire x1="4" y1="-4.5" x2="3.2" y2="-4.5" width="0.2032" layer="51"/> -<wire x1="3.2" y1="-4.5" x2="3.2" y2="-2" width="0.2032" layer="51"/> -<wire x1="-2.25" y1="3" x2="2.25" y2="3" width="0.127" layer="21"/> -<wire x1="4" y1="-0.5" x2="4" y2="-4.5" width="0.127" layer="21"/> -<wire x1="4" y1="-4.5" x2="3.15" y2="-4.5" width="0.127" layer="21"/> -<wire x1="3.15" y1="-4.5" x2="3.15" y2="-2" width="0.127" layer="21"/> -<wire x1="3.15" y1="-2" x2="1.75" y2="-2" width="0.127" layer="21"/> -<wire x1="-1.75" y1="-2" x2="-3.15" y2="-2" width="0.127" layer="21"/> -<wire x1="-3.15" y1="-2" x2="-3.15" y2="-4.5" width="0.127" layer="21"/> -<wire x1="-3.15" y1="-4.5" x2="-4" y2="-4.5" width="0.127" layer="21"/> -<wire x1="-4" y1="-4.5" x2="-4" y2="-0.5" width="0.127" layer="21"/> -<smd name="2" x="-1" y="-3.7" dx="1" dy="4.6" layer="1"/> -<smd name="1" x="1" y="-3.7" dx="1" dy="4.6" layer="1"/> -<smd name="NC1" x="-3.4" y="1.5" dx="3.4" dy="1.6" layer="1" rot="R90"/> -<smd name="NC2" x="3.4" y="1.5" dx="3.4" dy="1.6" layer="1" rot="R90"/> -<text x="-2.54" y="3.81" size="1.27" layer="25" font="vector">>Name</text> -<text x="-2.54" y="-7.62" size="1.27" layer="27" font="vector">>Value</text> -<text x="2.286" y="-6.096" size="1.4224" layer="21" ratio="12">+</text> -<text x="-3.429" y="-6.096" size="1.4224" layer="21" ratio="12">-</text> -</package> -<package name="JST-PH-2-THM"> -<description>4UCon #01528 -http://www.4uconnector.com/online/object/4udrawing/01528.pdf</description> -<wire x1="3" y1="-1.7" x2="0.5" y2="-1.7" width="0.127" layer="21"/> -<wire x1="0.5" y1="-1.7" x2="0.5" y2="-2.2" width="0.127" layer="21"/> -<wire x1="0.5" y1="-2.2" x2="-0.5" y2="-2.2" width="0.127" layer="21"/> -<wire x1="-0.5" y1="-2.2" x2="-0.5" y2="-1.7" width="0.127" layer="21"/> -<wire x1="-0.5" y1="-1.7" x2="-3" y2="-1.7" width="0.127" layer="21"/> -<wire x1="-3" y1="-1.7" x2="-3" y2="2.8" width="0.127" layer="21"/> -<wire x1="-3" y1="2.8" x2="3" y2="2.8" width="0.127" layer="21"/> -<wire x1="3" y1="2.8" x2="3" y2="-1.7" width="0.127" layer="21"/> -<pad name="1" x="1" y="0" drill="0.8" diameter="1.4224" rot="R180"/> -<pad name="2" x="-1" y="0" drill="0.8" diameter="1.4224" rot="R180"/> -<text x="-2.8" y="-3.5" size="1.27" layer="25" font="vector">>NAME</text> -<text x="4.064" y="0.762" size="1.27" layer="21" font="vector" rot="R180">+</text> -<text x="-3.302" y="0.762" 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-<attribute name="OC_NEWARK" value="unknown"/> -</part> -<part name="Q1" library="sfe" deviceset="MOSFET-NCHANNEL" device="SMD" value="BSS138"/> -<part name="LED1" library="sfe" deviceset="LED-TRICOLOR" device="" value="LED-TRICOLOR"/> -<part name="P+11" library="SparkFun" deviceset="VCC" device=""/> -<part name="LOGO1" library="iofault" deviceset="OSHW_LOGO_FILL" device="X0100-NT" value="OSHW_LOGO_FILLX0100-NT"/> -<part name="JP2" library="pinhead" deviceset="PINHD-1X8" device=""/> -<part name="JP1" library="pinhead" deviceset="PINHD-1X8" device=""/> -<part name="GND5" library="SparkFun" deviceset="GND" device=""/> -<part name="R1" library="sfe" deviceset="RESISTOR" device="0603-RES" value="10R"/> -<part name="P+6" library="mux" deviceset="VCC" device=""/> -<part name="R2" library="sfe" deviceset="RESISTOR" device="0603-RES" value="10K"/> -<part name="P+12" library="SparkFun" deviceset="VCC" device=""/> -<part name="GND22" library="SparkFun" deviceset="GND" device=""/> -<part name="LED2" library="sfe" deviceset="LED" device="1206" value="VSMY12850"/> -<part name="LED3" library="sfe" deviceset="LED" device="1206" value="VSMY12850"/> -<part name="P+13" library="mux" deviceset="VCC" device=""/> -<part name="GND3" library="sfe" deviceset="GND" device=""/> -<part name="L2" library="sfe" deviceset="INDUCTOR" device="0603" value="MPZ1608S181ATAH0"/> -<part name="VBUS1" library="supply" deviceset="VBUS" device=""/> -<part name="C2" library="sfe" deviceset="CAP" device="0805" value="22uF"/> -<part name="C3" library="sfe" deviceset="CAP" device="0805" value="22uF"/> -<part name="GND8" library="supply" deviceset="GND" device=""/> -<part name="GND10" library="supply" deviceset="GND" device=""/> -<part name="L3" library="sfe" deviceset="INDUCTOR" device="1007" value="4.7uH/1.4A"/> -<part name="GND14" library="supply" deviceset="GND" device=""/> -<part name="Q2" library="sfe" deviceset="MOSFET-PCHANNEL" device="SMD" value="Si2301BDS"/> -<part name="R9" library="sfe" deviceset="RESISTOR" device="0603-RES" value="10K"/> -<part name="GND18" library="supply" deviceset="GND" device=""/> -<part name="D3" library="sfe" deviceset="DIODE" device="SOD" value="SDM2U20SD3-7"/> -<part name="R6" library="sfe" deviceset="RESISTOR" device="0603-RES" value="453K"/> -<part name="RAW1" library="supply" deviceset="RAW" device=""/> -<part name="RAW3" library="supply" deviceset="RAW" device=""/> -<part name="VIN2" library="supply" deviceset="VIN" device=""/> -<part name="U8" library="regulators" deviceset="PAM2305AAB330" device="" value="PAM2305AABADJ"/> -<part name="X1" library="MF_Connectors" deviceset="USB" device="_MICRO_RIGHT" value="MF-CON-MICROUSB-RIGHT"/> -<part name="X4" library="adafruit-updated" deviceset="JST_2PIN" device="-THM-RA" value="S2B-PH-K-S(LF)(SN)"/> -<part name="VIN3" library="supply" deviceset="VIN" device=""/> -<part name="P+7" library="supply1" deviceset="VCC" device=""/> -<part name="P+5" library="SparkFun" deviceset="VCC" device=""/> -<part name="X2" library="molex" deviceset="USD-1040310811" device=""/> -<part name="R3" library="sfe" deviceset="RESISTOR" device="0603-RES" value="4.7K"/> -<part name="R4" library="sfe" deviceset="RESISTOR" device="0603-RES" value="4.7K"/> -<part name="M1" library="STANDOFFS" deviceset="9774030151R" device="" value="9774030243R"/> -<part name="M2" library="STANDOFFS" deviceset="9774030151R" device="" value="9774030243R"/> -<part name="GND4" library="SparkFun" deviceset="GND" device=""/> -<part name="GND6" library="sfe" deviceset="GND" device=""/> -<part name="U5" library="mux" deviceset="TPS731XX" device=""/> -<part name="GND7" library="sfe" deviceset="GND" device=""/> -<part name="C4" library="sfe" deviceset="CAP" device="0805" value="10uF"/> -<part name="P+4" library="supply1" deviceset="VCC" device=""/> -<part name="C6" library="sfe" deviceset="CAP" device="0603-CAP" value="0.1uF"/> -<part name="GND9" library="sfe" deviceset="GND" device=""/> -<part name="C5" library="sfe" deviceset="CAP" device="0805" value="10uF"/> -<part name="GND12" library="sfe" deviceset="GND" device=""/> -<part name="VDDA1" library="supply" deviceset="VDDA" device=""/> -<part name="VDDA2" library="supply" deviceset="VDDA" device=""/> -<part name="C1" library="sfe" deviceset="CAP_POL" device="1206" value="47uF"/> -<part name="C7" library="sfe" deviceset="CAP_POL" device="1206" value="47uF"/> -<part name="X3" library="DF12" deviceset="DF12-36-DS" device=""/> -<part name="GND17" library="SparkFun" deviceset="GND" device=""/> -<part name="P+9" library="SparkFun" deviceset="VCC" device=""/> -<part name="R5" library="sfe" deviceset="RESISTOR" device="0603-RES" value="100K"/> -<part name="GND15" library="supply" deviceset="GND" device=""/> -<part name="JP3" library="pinhead" deviceset="PINHD-1X6" device=""/> -<part name="U$5" library="stm32" deviceset="STM32H743ZIT6" device=""/> -<part name="P+24" library="supply1" deviceset="VCC" device=""/> -<part name="VBUS3" library="supply" deviceset="VBUS" device=""/> -<part name="GND19" library="sfe" deviceset="GND" device=""/> -<part name="C21" library="sfe" deviceset="CAP" device="0603-CAP" value="12pF"/> -<part name="C22" library="sfe" deviceset="CAP" device="0603-CAP" value="12pF"/> -<part name="GND20" library="sfe" deviceset="GND" device=""/> -<part name="Y2" library="mux" deviceset="CRYSTAL" device="2.5X2.0" value="7S-12.000MAHE-T"/> -<part name="GND21" library="sfe" deviceset="GND" device=""/> -<part name="P+16" library="supply1" deviceset="VCC" device=""/> -<part name="C16" library="sfe" deviceset="CAP" device="0603-CAP" value="1uF"/> -<part name="C20" library="sfe" deviceset="CAP" device="0603-CAP" value="2.2uF"/> -<part name="C19" library="sfe" deviceset="CAP" device="0603-CAP" value="2.2uF"/> -<part name="GND41" library="sfe" deviceset="GND" device=""/> -<part name="GND42" library="sfe" deviceset="GND" device=""/> -<part name="GND24" library="sfe" deviceset="GND" device=""/> -<part name="C11" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C10" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C12" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C13" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="GND25" library="sfe" deviceset="GND" device=""/> -<part name="P+17" library="supply1" deviceset="VCC" device=""/> -<part name="C17" library="sfe" deviceset="CAP" device="0402-CAP" value="1uF"/> -<part name="C18" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="GND26" library="sfe" deviceset="GND" device=""/> -<part name="GND27" library="sfe" deviceset="GND" device=""/> -<part name="C14" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C15" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C9" library="sfe" deviceset="CAP_POL" device="1206" value="100uF"/> -<part name="U3" library="heka" deviceset="BEAD" device=""/> -<part name="P+18" library="supply1" deviceset="VCC" device=""/> -<part name="U$7" library="mux" deviceset="IS42S16160G" device=""/> -<part name="C23" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C24" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C25" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C26" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C27" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="C28" library="sfe" deviceset="CAP" device="0402-CAP" value="0.1uF"/> -<part name="GND2" library="SparkFun" deviceset="GND" device=""/> -<part name="P+1" library="supply1" deviceset="VCC" device=""/> -<part name="RN3" library="resistor-dil" deviceset="4R-N" device="EXBV8V" value="220R"> -<attribute name="MF" value=""/> -<attribute name="MPN" value=""/> -<attribute name="OC_FARNELL" value="unknown"/> -<attribute name="OC_NEWARK" value="unknown"/> -</part> -<part name="R7" library="sfe" deviceset="RESISTOR" device="0402-RES" value="220R"/> -<part name="R8" library="sfe" deviceset="RESISTOR" device="0402-RES" value="10K"/> -<part name="R10" library="sfe" deviceset="RESISTOR" device="0402-RES" value="220R"/> -<part name="R11" library="sfe" deviceset="RESISTOR" device="0402-RES" value="220R"/> -<part name="R12" library="sfe" deviceset="RESISTOR" device="0402-RES" value="220R"/> -<part name="FRAME2" library="frames" library_urn="urn:adsk.eagle:library:229" deviceset="FRAME_C_L" device=""/> -</parts> -<sheets> -<sheet> -<plain> -<text x="177.8" y="317.5" size="2.54" layer="94" font="vector" ratio="20">PC13, PC14, PC15 and PI8 limited to 3mA/2MHz</text> -<text x="12.7" y="17.78" size="5.08" layer="150">Copyright (c) 2018 OpenMV <openmv@openmv.io> -Copyright (c) 2018 SingTown <kaizhi@singtown.com></text> -<text x="12.7" y="10.16" size="5.08" layer="150">This work is licensed under the Creative Commons Attribution-ShareAlike 3.0 License.</text> -<text x="12.7" y="2.54" size="5.08" layer="150">To view a copy of this license, visit http://creativecommons.org/licenses/by-sa/3.0/</text> -<text x="449.58" y="411.48" size="7.62" layer="94" font="vector" ratio="20">SD CARD</text> -<text x="322.58" y="195.58" size="2.54" layer="94" font="vector" ratio="16">Y[9:2] for 8-bit YUV or RGB (Y9 MSB, Y2 LSB)</text> -<wire x1="320.04" y1="208.28" x2="421.64" y2="208.28" width="0.6096" layer="94"/> -<wire x1="421.64" y1="208.28" x2="421.64" y2="185.42" width="0.6096" layer="94"/> -<wire x1="421.64" y1="185.42" x2="320.04" y2="185.42" width="0.6096" layer="94"/> -<wire x1="320.04" y1="185.42" x2="320.04" y2="208.28" width="0.6096" layer="94"/> -<text x="322.58" y="190.5" size="2.54" layer="94" font="vector" ratio="16">DVDD not connected, using internal regulator</text> -<text x="322.58" y="203.2" size="2.54" layer="94" font="vector" ratio="16">Notes:</text> -<text x="320.04" y="302.26" size="7.62" layer="94" font="vector" ratio="20">IMAGE SENSOR -CONNECTOR</text> -<text x="15.24" y="312.42" size="7.62" layer="94" font="vector" ratio="20">STM32H7xx MCU</text> -<text x="320.04" y="408.94" size="7.62" layer="94" font="vector" ratio="20">IR-RGB LEDs</text> -<text x="15.24" y="408.94" size="7.62" layer="94" font="vector" ratio="20">USB & POWER SUPPLY</text> -<wire x1="304.8" y1="297.18" x2="304.8" y2="309.88" width="0.1524" layer="94" style="longdash"/> -<text x="449.58" y="160.02" size="7.62" layer="94" font="vector" ratio="20">DEBUG HEADER</text> -<text x="452.12" y="312.42" size="7.62" layer="94" font="vector" ratio="20">I/O HEADERS</text> -<wire x1="175.26" y1="327.66" x2="304.8" y2="327.66" width="0.6096" layer="94"/> -<wire x1="304.8" y1="309.88" x2="304.8" y2="327.66" width="0.6096" layer="94"/> -<text x="177.8" y="322.58" size="2.54" layer="94" font="vector" ratio="16">Notes:</text> -<text x="177.8" y="304.8" size="2.54" layer="94" font="vector" ratio="20">No external termination series resistors are required on -DP (D+) and DM (D-) pins since the matching impedance is -included in the embedded driver.</text> -<wire x1="175.26" y1="297.18" x2="175.26" y2="327.66" width="0.6096" layer="94"/> -<wire x1="304.8" y1="297.18" x2="304.8" y2="309.88" width="0.6096" layer="94"/> -<wire x1="175.26" y1="297.18" x2="304.8" y2="297.18" width="0.6096" layer="94"/> -<text x="170.18" y="408.94" size="2.54" layer="94" font="vector" ratio="20">The output voltage is calculated as below: - Vo = 0.6 * (1+R10/R5)</text> -<wire x1="167.64" y1="421.64" x2="297.18" y2="421.64" width="0.6096" layer="94"/> -<wire x1="297.18" y1="406.4" x2="297.18" y2="421.64" width="0.6096" layer="94"/> -<text x="170.18" y="416.56" size="2.54" layer="94" font="vector" ratio="16">Notes:</text> -<wire x1="167.64" y1="406.4" x2="167.64" y2="421.64" width="0.6096" layer="94"/> -<wire x1="167.64" y1="406.4" x2="297.18" y2="406.4" width="0.6096" layer="94"/> -<wire x1="452.12" y1="35.56" x2="439.42" y2="35.56" width="0.1524" layer="94" style="longdash"/> -<wire x1="439.42" y1="35.56" x2="309.88" y2="35.56" width="0.1524" layer="94" style="longdash"/> -<wire x1="309.88" y1="35.56" x2="5.08" y2="35.56" width="0.1524" layer="94" style="longdash"/> -<wire x1="5.08" y1="332.74" x2="309.88" y2="332.74" width="0.1524" layer="94" style="longdash"/> -<wire x1="309.88" y1="332.74" x2="439.42" y2="332.74" width="0.1524" layer="94" style="longdash"/> -<wire x1="439.42" y1="332.74" x2="553.72" y2="332.74" width="0.1524" layer="94" style="longdash"/> -<wire x1="309.88" y1="332.74" x2="309.88" y2="426.72" width="0.1524" layer="94" style="longdash"/> -<wire x1="309.88" y1="332.74" x2="309.88" y2="177.8" width="0.1524" layer="94" style="longdash"/> -<text x="320.04" y="160.02" size="7.62" layer="94" font="vector" ratio="20">16-BIT SDRAM</text> -<wire x1="309.88" y1="177.8" x2="309.88" y2="35.56" width="0.1524" layer="94" style="longdash"/> -<wire x1="309.88" y1="177.8" x2="439.42" y2="177.8" width="0.1524" layer="94" style="longdash"/> -<wire x1="439.42" y1="177.8" x2="553.72" y2="177.8" width="0.1524" layer="94" style="longdash"/> -<wire x1="439.42" y1="426.72" x2="439.42" y2="332.74" width="0.1524" layer="94" style="longdash"/> -<wire x1="439.42" y1="332.74" x2="439.42" y2="177.8" width="0.1524" layer="94" style="longdash"/> -<wire x1="439.42" y1="177.8" x2="439.42" y2="35.56" width="0.1524" layer="94" style="longdash"/> -</plain> -<instances> -<instance part="H2" gate="G$1" x="497.84" y="30.48" smashed="yes"> -<attribute name="NAME" x="500.634" y="31.0642" size="1.778" layer="95"/> -<attribute name="VALUE" x="500.634" y="28.0162" size="1.778" layer="96"/> -</instance> -<instance part="C8" gate="G$1" x="474.98" y="355.6" smashed="yes" rot="MR0"> -<attribute name="NAME" x="473.075" y="357.886" size="1.778" layer="95" rot="MR90"/> -<attribute name="VALUE" x="475.361" y="349.504" size="1.778" layer="96" rot="MR90"/> -</instance> -<instance part="GND1" gate="1" x="474.98" y="345.44" smashed="yes"> -<attribute name="VALUE" x="472.44" y="342.9" size="1.778" layer="96"/> -</instance> -<instance part="GND11" gate="1" x="482.6" y="345.44" smashed="yes" rot="MR0"> -<attribute name="VALUE" x="485.14" y="342.9" size="1.778" layer="96" rot="MR0"/> -</instance> -<instance part="P+3" gate="1" x="474.98" y="398.78" smashed="yes"> -<attribute name="VALUE" x="473.964" y="402.336" size="1.778" layer="96"/> -</instance> -<instance part="GND13" gate="1" x="467.36" y="345.44" smashed="yes" rot="MR0"> -<attribute name="VALUE" x="469.9" y="342.9" size="1.778" layer="96" rot="MR0"/> -</instance> -<instance part="H1" gate="G$1" x="490.22" y="30.48" smashed="yes"> -<attribute name="NAME" x="493.014" y="31.0642" size="1.778" layer="95"/> -<attribute name="VALUE" x="493.014" y="28.0162" size="1.778" layer="96"/> -</instance> -<instance part="RN2" gate="C" x="66.04" y="210.82" smashed="yes" rot="R270"> -<attribute name="VALUE" x="62.992" y="208.28" size="1.778" layer="96" rot="R270"/> -<attribute name="NAME" x="65.532" y="212.725" size="1.016" layer="95" rot="R270"/> -</instance> -<instance part="RN3" gate="A" x="482.6" y="375.92" smashed="yes"> -<attribute name="VALUE" x="485.14" y="372.872" size="1.778" layer="96"/> -<attribute name="NAME" x="480.695" y="375.412" size="1.016" layer="95"/> -</instance> -<instance part="RN3" gate="B" x="482.6" y="373.38" smashed="yes"> -<attribute name="VALUE" x="485.14" y="370.332" size="1.778" layer="96"/> -<attribute name="NAME" x="480.695" y="372.872" size="1.016" layer="95"/> -</instance> -<instance part="RN2" gate="D" x="25.4" y="246.38" smashed="yes" rot="R90"> -<attribute name="VALUE" x="28.448" y="248.92" size="1.778" layer="96" rot="R90"/> -<attribute name="NAME" x="25.908" y="244.475" size="1.016" layer="95" rot="R90"/> -</instance> -<instance part="Q1" gate="G$1" x="350.52" y="350.52" smashed="yes" rot="R270"> -<attribute name="NAME" x="347.98" y="355.6" size="1.778" layer="95"/> -<attribute name="VALUE" x="345.44" y="345.44" size="1.778" layer="96"/> -</instance> -<instance part="LED1" gate="G$1" x="370.84" y="388.62" smashed="yes"> -<attribute name="NAME" x="363.22" y="391.922" size="1.778" layer="95"/> -<attribute name="VALUE" x="363.22" y="378.46" size="1.778" layer="95"/> -</instance> -<instance part="P+11" gate="1" x="398.78" y="393.7" smashed="yes"> -<attribute name="VALUE" x="397.764" y="397.256" size="1.778" layer="96"/> -</instance> -<instance part="LOGO1" gate="G$1" x="541.02" y="25.4" smashed="yes"/> -<instance part="JP2" gate="A" x="533.4" y="276.86" smashed="yes"> -<attribute name="NAME" x="527.05" y="290.195" size="1.778" layer="95"/> -<attribute name="VALUE" x="527.05" y="264.16" size="1.778" layer="96"/> -</instance> -<instance part="JP1" gate="A" x="487.68" y="220.98" smashed="yes"> -<attribute name="NAME" x="481.33" y="234.315" size="1.778" layer="95"/> -<attribute name="VALUE" x="481.33" y="208.28" size="1.778" layer="96"/> -</instance> -<instance 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size="1.4224" layer="96" rot="MR90"/> -</instance> -<instance part="C27" gate="G$1" x="414.02" y="116.84" smashed="yes" rot="MR0"> -<attribute name="NAME" x="411.861" y="113.284" size="1.4224" layer="95" rot="MR90"/> -<attribute name="VALUE" x="414.401" y="119.634" size="1.4224" layer="96" rot="MR90"/> -</instance> -<instance part="C28" gate="G$1" x="419.1" y="116.84" smashed="yes" rot="MR0"> -<attribute name="NAME" x="416.941" y="113.284" size="1.4224" layer="95" rot="MR90"/> -<attribute name="VALUE" x="419.481" y="119.634" size="1.4224" layer="96" rot="MR90"/> -</instance> -<instance part="GND2" gate="1" x="414.02" y="106.68" smashed="yes"> -<attribute name="VALUE" x="411.48" y="104.14" size="1.778" layer="96"/> -</instance> -<instance part="P+1" gate="VCC" x="388.62" y="132.08" smashed="yes"> -<attribute name="VALUE" x="386.08" y="129.54" size="1.778" layer="96" rot="R90"/> -</instance> -<instance part="RN3" gate="C" x="482.6" y="370.84" smashed="yes" rot="MR0"> -<attribute name="NAME" x="484.632" y="370.332" size="1.016" layer="95" rot="MR0"/> -</instance> -<instance part="RN3" gate="D" x="482.6" y="368.3" smashed="yes" rot="MR0"> -<attribute name="NAME" x="484.378" y="367.792" size="1.016" layer="95" rot="MR0"/> -</instance> -<instance part="RN2" gate="B" x="482.6" y="381" smashed="yes" rot="MR180"> -<attribute name="VALUE" x="480.06" y="386.588" size="1.778" layer="96" rot="MR180"/> -<attribute name="NAME" x="480.568" y="381.508" size="1.016" layer="95" rot="MR180"/> -</instance> -<instance part="RN2" gate="A" x="482.6" y="386.08" smashed="yes" rot="MR0"> -<attribute name="VALUE" x="480.06" y="383.032" size="1.778" layer="96" rot="MR0"/> -<attribute name="NAME" x="484.632" y="385.572" size="1.016" layer="95" rot="MR0"/> -</instance> -<instance part="R7" gate="G$1" x="340.36" y="370.84" smashed="yes"> -<attribute name="NAME" x="336.55" y="372.3386" size="1.778" layer="95"/> -<attribute name="VALUE" x="336.55" y="367.538" size="1.778" layer="96"/> -</instance> -<instance part="R8" gate="G$1" x="332.74" y="124.46" smashed="yes"> -<attribute name="NAME" x="328.93" y="125.9586" size="1.778" layer="95"/> -<attribute name="VALUE" x="328.93" y="121.158" size="1.778" layer="96"/> -</instance> -<instance part="R10" gate="G$1" x="345.44" y="388.62" smashed="yes"> -<attribute name="NAME" x="341.63" y="390.1186" size="1.778" layer="95"/> -<attribute name="VALUE" x="341.63" y="385.318" size="1.778" layer="96"/> -</instance> -<instance part="R11" gate="G$1" x="345.44" y="386.08" smashed="yes"> -<attribute name="NAME" x="341.63" y="387.5786" size="1.778" layer="95"/> -<attribute name="VALUE" x="341.63" y="382.778" size="1.778" layer="96"/> -</instance> -<instance part="R12" gate="G$1" x="345.44" y="383.54" smashed="yes"> -<attribute name="NAME" x="341.63" y="385.0386" size="1.778" layer="95"/> -<attribute name="VALUE" x="341.63" y="380.238" size="1.778" layer="96"/> -</instance> -<instance part="FRAME2" gate="G$1" x="0" y="0" smashed="yes"/> -<instance part="FRAME2" gate="G$2" x="452.12" y="0" smashed="yes"> -<attribute name="LAST_DATE_TIME" x="464.82" y="1.27" size="2.54" layer="94"/> -<attribute name="SHEET" x="538.48" y="1.27" size="2.54" layer="94"/> -<attribute name="DRAWING_NAME" x="469.9" y="19.05" size="2.54" layer="94"/> -</instance> -</instances> -<busses> -</busses> -<nets> -<net name="GND" class="0"> -<segment> -<pinref part="C8" gate="G$1" pin="2"/> -<pinref part="GND1" gate="1" pin="GND"/> -<wire x1="474.98" y1="353.06" x2="474.98" y2="347.98" width="0.1524" layer="91"/> -</segment> -<segment> -<wire x1="502.92" y1="363.22" x2="482.6" y2="363.22" width="0.1524" layer="91"/> -<wire x1="482.6" y1="363.22" x2="482.6" y2="360.68" width="0.1524" layer="91"/> -<pinref part="GND11" gate="1" pin="GND"/> -<wire x1="482.6" y1="360.68" x2="482.6" y2="358.14" width="0.1524" layer="91"/> -<wire x1="482.6" y1="358.14" x2="482.6" y2="347.98" width="0.1524" layer="91"/> -<wire x1="502.92" y1="360.68" x2="482.6" y2="360.68" width="0.1524" layer="91"/> -<wire x1="502.92" y1="358.14" x2="482.6" y2="358.14" width="0.1524" layer="91"/> -<junction x="482.6" y="358.14"/> -<junction x="482.6" y="360.68"/> -<pinref part="X2" gate="G$1" pin="SHD"/> -<pinref part="X2" gate="G$1" pin="VSS"/> -<pinref part="X2" gate="G$1" pin="CD_POL"/> -</segment> -<segment> -<pinref part="GND13" gate="1" pin="GND"/> -<wire x1="467.36" y1="347.98" x2="467.36" y2="353.06" width="0.1524" layer="91"/> -<pinref part="C7" gate="G$1" pin="-"/> -</segment> -<segment> -<pinref part="Q1" gate="G$1" pin="S"/> -<wire x1="345.44" y1="350.52" x2="340.36" y2="350.52" width="0.1524" layer="91"/> -<wire x1="340.36" y1="350.52" x2="340.36" y2="345.44" width="0.1524" layer="91"/> -<pinref part="R2" gate="G$1" pin="1"/> -<wire x1="340.36" y1="353.06" x2="340.36" y2="350.52" width="0.1524" layer="91"/> -<junction x="340.36" y="350.52"/> -<pinref part="GND6" gate="1" pin="GND"/> -</segment> -<segment> -<wire x1="497.84" y1="88.9" x2="480.06" y2="88.9" width="0.1524" layer="91"/> -<wire x1="480.06" y1="88.9" x2="480.06" y2="83.82" width="0.1524" layer="91"/> -<pinref part="GND22" gate="1" pin="GND"/> -<pinref part="JP3" gate="A" pin="6"/> -</segment> -<segment> -<wire x1="38.1" y1="373.38" x2="63.5" y2="373.38" width="0.1524" layer="91"/> -<wire x1="63.5" y1="373.38" x2="63.5" y2="360.68" width="0.1524" layer="91"/> -<pinref part="GND3" gate="1" pin="GND"/> -<pinref part="X1" gate="G$1" pin="GND"/> -</segment> -<segment> -<pinref part="C2" gate="G$1" pin="1"/> -<wire x1="127" y1="378.46" x2="127" y2="360.68" width="0.1524" layer="91"/> -<pinref part="GND8" gate="1" pin="GND"/> -</segment> -<segment> -<wire x1="144.78" y1="375.92" x2="137.16" y2="375.92" width="0.1524" layer="91"/> -<wire x1="137.16" y1="375.92" x2="137.16" y2="360.68" width="0.1524" layer="91"/> -<pinref part="GND10" gate="1" pin="GND"/> -<pinref part="U8" gate="G$1" pin="GND"/> -</segment> -<segment> -<pinref part="C3" gate="G$1" pin="1"/> -<pinref part="GND14" gate="1" pin="GND"/> -<wire x1="200.66" y1="378.46" x2="200.66" y2="360.68" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="R9" gate="G$1" pin="1"/> -<pinref part="GND18" gate="1" pin="GND"/> -</segment> -<segment> -<pinref part="X4" gate="G$1" pin="1"/> -<wire x1="530.86" y1="261.62" x2="508" y2="261.62" width="0.1524" layer="91"/> -<pinref part="JP2" gate="A" pin="8"/> -<pinref part="GND5" gate="1" pin="GND"/> -<wire x1="530.86" y1="269.24" x2="508" y2="269.24" width="0.1524" layer="91"/> -<wire x1="508" y1="269.24" x2="508" y2="261.62" width="0.1524" layer="91"/> -<wire x1="508" y1="261.62" x2="508" y2="256.54" width="0.1524" layer="91"/> -<junction x="508" y="261.62"/> -</segment> -<segment> -<wire x1="401.32" y1="228.6" x2="401.32" y2="256.54" width="0.1524" layer="91"/> -<pinref part="GND4" gate="1" pin="GND"/> -<pinref part="C1" gate="G$1" pin="-"/> -</segment> -<segment> -<pinref part="GND7" gate="1" pin="GND"/> -<wire x1="215.9" y1="378.46" x2="215.9" y2="375.92" width="0.1524" layer="91"/> -<pinref part="C4" gate="G$1" pin="1"/> -<pinref part="U5" gate="G$1" pin="GND"/> -<wire x1="215.9" y1="375.92" x2="215.9" y2="360.68" width="0.1524" layer="91"/> -<wire x1="231.14" y1="375.92" x2="215.9" y2="375.92" width="0.1524" layer="91"/> -<junction x="215.9" y="375.92"/> -</segment> -<segment> -<pinref part="GND9" gate="1" pin="GND"/> -<pinref part="C5" gate="G$1" pin="1"/> -<wire x1="264.16" y1="378.46" x2="264.16" y2="360.68" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="C6" gate="G$1" pin="2"/> -<pinref part="GND12" gate="1" pin="GND"/> -<wire x1="256.54" y1="365.76" x2="256.54" y2="360.68" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="GND17" gate="1" pin="GND"/> -<wire x1="330.2" y1="271.78" x2="330.2" y2="254" width="0.1524" layer="91"/> -<wire x1="330.2" y1="254" x2="330.2" y2="243.84" width="0.1524" layer="91"/> -<wire x1="330.2" y1="243.84" x2="330.2" y2="228.6" width="0.1524" layer="91"/> -<wire x1="350.52" y1="254" x2="330.2" y2="254" width="0.1524" layer="91"/> -<wire x1="350.52" y1="243.84" x2="330.2" y2="243.84" width="0.1524" layer="91"/> -<junction x="330.2" y="254"/> -<junction x="330.2" y="243.84"/> -<pinref part="X3" gate="G$1" pin="19"/> -<pinref part="X3" gate="G$1" pin="27"/> -<label x="335.28" y="254" size="1.778" layer="95"/> -<label x="335.28" y="243.84" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="5"/> -<wire x1="350.52" y1="271.78" x2="330.2" y2="271.78" width="0.1524" layer="91"/> -<label x="335.28" y="271.78" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="R5" gate="G$1" pin="1"/> -<pinref part="GND15" gate="1" pin="GND"/> -<wire x1="187.96" y1="363.22" x2="187.96" y2="360.68" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="C21" gate="G$1" pin="1"/> -<wire x1="281.94" y1="71.12" x2="281.94" y2="68.58" width="0.1524" layer="91"/> -<pinref part="GND19" gate="1" pin="GND"/> -<pinref part="C22" gate="G$1" pin="1"/> -<wire x1="281.94" y1="68.58" x2="287.02" y2="68.58" width="0.1524" layer="91"/> -<wire x1="292.1" y1="71.12" x2="292.1" y2="68.58" width="0.1524" layer="91"/> -<wire x1="292.1" y1="68.58" x2="287.02" y2="68.58" width="0.1524" layer="91"/> -<wire x1="287.02" y1="68.58" x2="287.02" y2="63.5" width="0.1524" layer="91"/> -<junction x="287.02" y="68.58"/> -<pinref part="Y2" gate="G$1" pin="P$2"/> -<wire x1="289.56" y1="76.2" x2="287.02" y2="76.2" width="0.1524" layer="91"/> -<pinref part="Y2" gate="G$1" pin="P$1"/> -<wire x1="284.48" y1="76.2" x2="287.02" y2="76.2" width="0.1524" layer="91"/> -<wire x1="287.02" y1="76.2" x2="287.02" y2="68.58" width="0.1524" layer="91"/> -<junction x="287.02" y="68.58"/> -<junction x="287.02" y="76.2"/> -</segment> -<segment> -<pinref part="GND20" gate="1" pin="GND"/> -<wire x1="25.4" y1="210.82" x2="25.4" y2="203.2" width="0.1524" layer="91"/> -<pinref part="C16" gate="G$1" pin="2"/> -</segment> -<segment> -<wire x1="274.32" y1="68.58" x2="274.32" y2="63.5" width="0.1524" layer="91"/> -<pinref part="C20" gate="G$1" pin="2"/> -<pinref part="GND41" gate="1" pin="GND"/> -</segment> -<segment> -<wire x1="266.7" y1="68.58" x2="266.7" y2="63.5" width="0.1524" layer="91"/> -<pinref part="C19" gate="G$1" pin="2"/> -<pinref part="GND42" gate="1" pin="GND"/> -</segment> -<segment> -<pinref part="U$5" gate="G$2" pin="VSS@9"/> -<wire x1="93.98" y1="60.96" x2="86.36" y2="60.96" width="0.1524" layer="91"/> -<wire x1="86.36" y1="60.96" x2="86.36" y2="55.88" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$2" pin="VSS@8"/> -<wire x1="93.98" y1="63.5" x2="86.36" y2="63.5" width="0.1524" layer="91"/> -<wire x1="86.36" y1="63.5" x2="86.36" y2="60.96" width="0.1524" layer="91"/> -<junction x="86.36" y="60.96"/> -<pinref part="U$5" gate="G$2" pin="VSS@7"/> -<wire x1="93.98" y1="66.04" x2="86.36" y2="66.04" width="0.1524" layer="91"/> -<wire x1="86.36" y1="66.04" x2="86.36" y2="63.5" width="0.1524" layer="91"/> -<junction x="86.36" y="63.5"/> -<pinref part="U$5" gate="G$2" pin="VSS@6"/> -<wire x1="93.98" y1="68.58" x2="86.36" y2="68.58" width="0.1524" layer="91"/> -<wire x1="86.36" y1="68.58" x2="86.36" y2="66.04" width="0.1524" layer="91"/> -<junction x="86.36" y="66.04"/> -<pinref part="U$5" gate="G$2" pin="VSS@5"/> -<wire x1="93.98" y1="71.12" x2="86.36" y2="71.12" width="0.1524" layer="91"/> -<wire x1="86.36" y1="71.12" x2="86.36" y2="68.58" width="0.1524" layer="91"/> -<junction x="86.36" y="68.58"/> -<pinref part="U$5" gate="G$2" pin="VSS@4"/> -<wire x1="93.98" y1="73.66" x2="86.36" y2="73.66" width="0.1524" layer="91"/> -<wire x1="86.36" y1="73.66" x2="86.36" y2="71.12" width="0.1524" layer="91"/> -<junction x="86.36" y="71.12"/> -<pinref part="U$5" gate="G$2" pin="VSS@3"/> -<wire x1="93.98" y1="76.2" x2="86.36" y2="76.2" width="0.1524" layer="91"/> -<wire x1="86.36" y1="76.2" x2="86.36" y2="73.66" width="0.1524" layer="91"/> -<junction x="86.36" y="73.66"/> -<pinref part="U$5" gate="G$2" pin="VSS@2"/> -<wire x1="93.98" y1="78.74" x2="86.36" y2="78.74" width="0.1524" layer="91"/> -<wire x1="86.36" y1="78.74" x2="86.36" y2="76.2" width="0.1524" layer="91"/> -<junction x="86.36" y="76.2"/> -<pinref part="U$5" gate="G$2" pin="VSS@1"/> -<wire x1="93.98" y1="81.28" x2="86.36" y2="81.28" width="0.1524" layer="91"/> -<wire x1="86.36" y1="81.28" x2="86.36" y2="78.74" width="0.1524" layer="91"/> -<junction x="86.36" y="78.74"/> -<pinref part="U$5" gate="G$2" pin="VSSA"/> -<wire x1="93.98" y1="83.82" x2="86.36" y2="83.82" width="0.1524" layer="91"/> -<wire x1="86.36" y1="83.82" x2="86.36" y2="81.28" width="0.1524" layer="91"/> -<junction x="86.36" y="81.28"/> -<pinref part="GND24" gate="1" pin="GND"/> -</segment> -<segment> -<pinref part="C10" gate="G$1" pin="2"/> -<wire x1="63.5" y1="261.62" x2="43.18" y2="261.62" width="0.1524" layer="91"/> -<wire x1="43.18" y1="261.62" x2="43.18" y2="259.08" width="0.1524" layer="91"/> -<wire x1="43.18" y1="259.08" x2="43.18" y2="256.54" width="0.1524" layer="91"/> -<wire x1="43.18" y1="256.54" x2="43.18" y2="254" width="0.1524" layer="91"/> -<wire x1="43.18" y1="254" x2="43.18" y2="251.46" width="0.1524" layer="91"/> -<wire x1="43.18" y1="251.46" x2="43.18" y2="246.38" width="0.1524" layer="91"/> -<wire x1="43.18" y1="246.38" x2="43.18" y2="243.84" width="0.1524" layer="91"/> -<wire x1="43.18" y1="243.84" x2="43.18" y2="241.3" width="0.1524" layer="91"/> -<wire x1="43.18" y1="241.3" x2="43.18" y2="236.22" width="0.1524" layer="91"/> -<wire x1="43.18" y1="236.22" x2="43.18" y2="203.2" width="0.1524" layer="91"/> -<wire x1="43.18" y1="264.16" x2="43.18" y2="261.62" width="0.1524" layer="91"/> -<pinref part="C11" gate="G$1" pin="2"/> -<wire x1="63.5" y1="256.54" x2="43.18" y2="256.54" width="0.1524" layer="91"/> -<pinref part="C12" gate="G$1" pin="2"/> -<wire x1="63.5" y1="251.46" x2="43.18" y2="251.46" width="0.1524" layer="91"/> -<pinref part="C13" gate="G$1" pin="2"/> -<wire x1="63.5" y1="246.38" x2="43.18" y2="246.38" width="0.1524" layer="91"/> -<pinref part="GND25" gate="1" pin="GND"/> -<junction x="43.18" y="246.38"/> -<junction x="43.18" y="251.46"/> -<junction x="43.18" y="256.54"/> -<junction x="43.18" y="261.62"/> -<wire x1="43.18" y1="266.7" x2="43.18" y2="264.16" width="0.1524" layer="91"/> -<pinref part="C14" gate="G$1" pin="2"/> -<wire x1="63.5" y1="241.3" x2="43.18" y2="241.3" width="0.1524" layer="91"/> -<pinref part="C15" gate="G$1" pin="2"/> -<wire x1="63.5" y1="236.22" x2="43.18" y2="236.22" width="0.1524" layer="91"/> -<junction x="43.18" y="241.3"/> -<junction x="43.18" y="236.22"/> -<pinref part="C9" gate="G$1" pin="-"/> -<wire x1="50.8" y1="266.7" x2="43.18" y2="266.7" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="C17" gate="G$1" pin="2"/> -<wire x1="33.02" y1="210.82" x2="33.02" y2="203.2" width="0.1524" layer="91"/> -<pinref part="GND26" gate="1" pin="GND"/> -</segment> -<segment> -<pinref part="C18" gate="G$1" pin="2"/> -<wire x1="38.1" y1="210.82" x2="38.1" y2="203.2" width="0.1524" layer="91"/> -<pinref part="GND27" gate="1" pin="GND"/> -</segment> -<segment> -<pinref part="U$7" gate="G$1" pin="VSSQ"/> -<wire x1="386.08" y1="109.22" x2="388.62" y2="109.22" width="0.1524" layer="91"/> -<pinref part="C28" gate="G$1" pin="2"/> -<wire x1="388.62" y1="109.22" x2="393.7" y2="109.22" width="0.1524" layer="91"/> -<wire x1="393.7" y1="109.22" x2="398.78" y2="109.22" width="0.1524" layer="91"/> -<wire x1="398.78" y1="109.22" x2="403.86" y2="109.22" width="0.1524" layer="91"/> -<wire x1="403.86" y1="109.22" x2="408.94" y2="109.22" width="0.1524" layer="91"/> -<wire x1="408.94" y1="109.22" x2="414.02" y2="109.22" width="0.1524" layer="91"/> -<wire x1="414.02" y1="109.22" x2="419.1" y2="109.22" width="0.1524" layer="91"/> -<wire x1="419.1" y1="109.22" x2="419.1" y2="114.3" width="0.1524" layer="91"/> -<pinref part="C27" gate="G$1" pin="2"/> -<wire x1="414.02" y1="114.3" x2="414.02" y2="109.22" width="0.1524" layer="91"/> -<junction x="414.02" y="109.22"/> -<pinref part="C26" gate="G$1" pin="2"/> -<wire x1="408.94" y1="114.3" x2="408.94" y2="109.22" width="0.1524" layer="91"/> -<junction x="408.94" y="109.22"/> -<pinref part="C25" gate="G$1" pin="2"/> -<wire x1="403.86" y1="114.3" x2="403.86" y2="109.22" width="0.1524" layer="91"/> -<junction x="403.86" y="109.22"/> -<pinref part="C24" gate="G$1" pin="2"/> -<wire x1="398.78" y1="114.3" x2="398.78" y2="109.22" width="0.1524" layer="91"/> -<junction x="398.78" y="109.22"/> -<pinref part="C23" gate="G$1" pin="2"/> -<wire x1="393.7" y1="114.3" x2="393.7" y2="109.22" width="0.1524" layer="91"/> -<junction x="393.7" y="109.22"/> -<pinref part="U$7" gate="G$1" pin="VSS"/> -<wire x1="386.08" y1="111.76" x2="388.62" y2="111.76" width="0.1524" layer="91"/> -<wire x1="388.62" y1="111.76" x2="388.62" y2="109.22" width="0.1524" layer="91"/> -<junction x="388.62" y="109.22"/> -<pinref part="GND2" gate="1" pin="GND"/> -<junction x="414.02" y="109.22"/> -</segment> -<segment> -<pinref part="RN2" gate="C" pin="2"/> -<pinref part="GND21" gate="1" pin="GND"/> -<wire x1="66.04" y1="205.74" x2="66.04" y2="203.2" width="0.1524" layer="91"/> -</segment> -</net> -<net name="NRST" class="0"> -<segment> -<wire x1="497.84" y1="93.98" x2="485.14" y2="93.98" width="0.1524" layer="91"/> -<label x="485.14" y="93.98" size="1.778" layer="95"/> -<pinref part="JP3" gate="A" pin="4"/> -</segment> -<segment> -<wire x1="530.86" y1="287.02" x2="510.54" y2="287.02" width="0.1524" layer="91"/> -<label x="510.54" y="287.02" size="1.778" layer="95"/> -<pinref part="JP2" gate="A" pin="1"/> -</segment> -<segment> -<wire x1="25.4" y1="220.98" x2="93.98" y2="220.98" width="0.1524" layer="91"/> -<label x="81.28" y="220.98" size="1.778" layer="95"/> -<pinref part="C16" gate="G$1" pin="1"/> -<wire x1="25.4" y1="220.98" x2="25.4" y2="218.44" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$2" pin="NRST"/> -<pinref part="RN2" gate="D" pin="1"/> -<wire x1="25.4" y1="241.3" x2="25.4" y2="220.98" width="0.1524" layer="91"/> -<junction x="25.4" y="220.98"/> -</segment> -</net> -<net name="SWDIO" class="0"> -<segment> -<wire x1="497.84" y1="96.52" x2="485.14" y2="96.52" width="0.1524" layer="91"/> -<label x="485.14" y="96.52" size="1.778" layer="95"/> -<pinref part="JP3" gate="A" pin="3"/> -</segment> -<segment> -<wire x1="93.98" y1="180.34" x2="76.2" y2="180.34" width="0.1524" layer="91"/> -<label x="76.2" y="180.34" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA13/JTMS-SWDIO"/> -</segment> -</net> -<net name="SWCLK" class="0"> -<segment> -<wire x1="497.84" y1="99.06" x2="485.14" y2="99.06" width="0.1524" layer="91"/> -<label x="485.14" y="99.06" size="1.778" layer="95"/> -<pinref part="JP3" gate="A" pin="2"/> -</segment> -<segment> -<wire x1="93.98" y1="177.8" x2="76.2" y2="177.8" width="0.1524" layer="91"/> -<label x="76.2" y="177.8" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA14/JTCK-SWCLK"/> -</segment> -</net> -<net name="BOOT0" class="0"> -<segment> -<wire x1="530.86" y1="284.48" x2="510.54" y2="284.48" width="0.1524" layer="91"/> -<label x="510.54" y="284.48" size="1.778" layer="95"/> -<pinref part="JP2" gate="A" pin="2"/> -</segment> -<segment> -<wire x1="93.98" y1="218.44" x2="66.04" y2="218.44" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$2" pin="BOOT0"/> -<label x="81.28" y="218.44" size="1.778" layer="95"/> -<pinref part="RN2" gate="C" pin="1"/> -<wire x1="66.04" y1="215.9" x2="66.04" y2="218.44" width="0.1524" layer="91"/> -</segment> -</net> -<net name="VBUS" class="0"> -<segment> -<pinref part="L2" gate="G$1" pin="2"/> -<wire x1="58.42" y1="383.54" x2="66.04" y2="383.54" width="0.1524" layer="91"/> -<pinref part="Q2" gate="G$1" pin="D"/> -<pinref part="VBUS1" gate="G$1" pin="VBUS"/> -<wire x1="66.04" y1="383.54" x2="83.82" y2="383.54" width="0.1524" layer="91"/> -<wire x1="66.04" y1="396.24" x2="66.04" y2="383.54" width="0.1524" layer="91"/> -<junction x="66.04" y="383.54"/> -</segment> -<segment> -<wire x1="93.98" y1="190.5" x2="73.66" y2="190.5" width="0.1524" layer="91"/> -<wire x1="73.66" y1="190.5" x2="73.66" y2="205.74" width="0.1524" layer="91"/> -<pinref part="VBUS3" gate="G$1" pin="VBUS"/> -<pinref part="U$5" gate="G$2" pin="PA9/TIM1_CH2/I2C3_SMBA/USART1_TX/DCMI_D0/OTG_FS_VBUS"/> -</segment> -</net> -<net name="VCC" class="0"> -<segment> -<wire x1="474.98" y1="368.3" x2="474.98" y2="370.84" width="0.1524" layer="91"/> -<wire x1="474.98" y1="370.84" x2="474.98" y2="373.38" width="0.1524" layer="91"/> -<wire x1="474.98" y1="373.38" x2="474.98" y2="375.92" width="0.1524" layer="91"/> -<wire x1="474.98" y1="381" x2="474.98" y2="375.92" width="0.1524" layer="91"/> -<wire x1="477.52" y1="375.92" x2="474.98" y2="375.92" width="0.1524" layer="91"/> -<junction x="474.98" y="375.92"/> -<wire x1="477.52" y1="368.3" x2="474.98" y2="368.3" width="0.1524" layer="91"/> -<wire x1="477.52" y1="370.84" x2="474.98" y2="370.84" width="0.1524" layer="91"/> -<junction x="474.98" y="370.84"/> -<junction x="474.98" y="391.16"/> -<pinref part="P+3" gate="1" pin="VCC"/> -<junction x="474.98" y="391.16"/> -<wire x1="474.98" y1="391.16" x2="474.98" y2="398.78" width="0.1524" layer="91"/> -<wire x1="474.98" y1="391.16" x2="474.98" y2="386.08" width="0.1524" layer="91"/> -<pinref part="C8" gate="G$1" pin="1"/> -<wire x1="474.98" y1="386.08" x2="474.98" y2="381" width="0.1524" layer="91"/> -<wire x1="474.98" y1="363.22" x2="474.98" y2="373.38" width="0.1524" layer="91"/> -<wire x1="474.98" y1="373.38" x2="474.98" y2="375.92" width="0.1524" layer="91"/> -<wire x1="474.98" y1="375.92" x2="474.98" y2="373.38" width="0.1524" layer="91"/> -<wire x1="474.98" y1="373.38" x2="474.98" y2="368.3" width="0.1524" layer="91"/> -<wire x1="474.98" y1="368.3" x2="474.98" y2="360.68" width="0.1524" layer="91"/> -<junction x="474.98" y="368.3"/> -<wire x1="467.36" y1="391.16" x2="467.36" y2="360.68" width="0.1524" layer="91"/> -<wire x1="502.92" y1="391.16" x2="474.98" y2="391.16" width="0.1524" layer="91"/> -<wire x1="474.98" y1="391.16" x2="467.36" y2="391.16" width="0.1524" layer="91"/> -<pinref part="X2" gate="G$1" pin="VDD"/> -<pinref part="RN3" gate="A" pin="1"/> -<pinref part="C7" gate="G$1" pin="+"/> -<pinref part="RN3" gate="C" pin="2"/> -<pinref part="RN3" gate="D" pin="2"/> -<pinref part="RN3" gate="B" pin="1"/> -<wire x1="477.52" y1="373.38" x2="474.98" y2="373.38" width="0.1524" layer="91"/> -<junction x="474.98" y="373.38"/> -<pinref part="RN2" gate="B" pin="1"/> -<wire x1="477.52" y1="381" x2="474.98" y2="381" width="0.1524" layer="91"/> -<junction x="474.98" y="381"/> -<pinref part="RN2" gate="A" pin="2"/> -<wire x1="477.52" y1="386.08" x2="474.98" y2="386.08" width="0.1524" layer="91"/> -<junction x="474.98" y="386.08"/> -</segment> -<segment> -<pinref part="P+11" gate="1" pin="VCC"/> -<wire x1="398.78" y1="386.08" x2="398.78" y2="393.7" width="0.1524" layer="91"/> -<pinref part="LED1" gate="G$1" pin="A"/> -<wire x1="383.54" y1="386.08" x2="398.78" y2="386.08" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="JP1" gate="A" pin="8"/> -<wire x1="485.14" y1="213.36" x2="462.28" y2="213.36" width="0.1524" layer="91"/> -<wire x1="462.28" y1="213.36" x2="462.28" y2="236.22" width="0.1524" layer="91"/> -<pinref part="P+6" gate="1" pin="VCC"/> -</segment> -<segment> -<pinref part="P+12" gate="1" pin="VCC"/> -<wire x1="396.24" y1="350.52" x2="398.78" y2="350.52" width="0.1524" layer="91"/> -<wire x1="398.78" y1="350.52" x2="398.78" y2="368.3" width="0.1524" layer="91"/> -<pinref part="LED2" gate="G$1" pin="A"/> -</segment> -<segment> -<wire x1="497.84" y1="91.44" x2="480.06" y2="91.44" width="0.1524" layer="91"/> -<wire x1="480.06" y1="91.44" x2="480.06" y2="101.6" width="0.1524" layer="91"/> -<pinref part="P+13" gate="1" pin="VCC"/> -<pinref part="JP3" gate="A" pin="5"/> -</segment> -<segment> -<pinref part="R6" gate="G$1" pin="2"/> -<pinref part="C3" gate="G$1" pin="2"/> -<wire x1="200.66" y1="391.16" x2="200.66" y2="386.08" width="0.1524" layer="91"/> -<junction x="200.66" y="391.16"/> -<pinref part="P+7" gate="VCC" pin="VCC"/> -<wire x1="200.66" y1="396.24" x2="200.66" y2="391.16" width="0.1524" layer="91"/> -<wire x1="193.04" y1="391.16" x2="200.66" y2="391.16" width="0.1524" layer="91"/> -<pinref part="L3" gate="G$1" pin="2"/> -<wire x1="185.42" y1="391.16" x2="187.96" y2="391.16" width="0.1524" layer="91"/> -<wire x1="187.96" y1="391.16" x2="193.04" y2="391.16" width="0.1524" layer="91"/> -<junction x="187.96" y="391.16"/> -<wire x1="187.96" y1="391.16" x2="187.96" y2="388.62" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="C1" gate="G$1" pin="+"/> -<pinref part="P+5" gate="1" pin="VCC"/> -<wire x1="401.32" y1="287.02" x2="401.32" y2="264.16" width="0.1524" layer="91"/> -</segment> -<segment> -<wire x1="373.38" y1="254" x2="396.24" y2="254" width="0.1524" layer="91"/> -<label x="378.46" y="254" size="1.778" layer="95"/> -<wire x1="396.24" y1="266.7" x2="396.24" y2="254" width="0.1524" layer="91"/> -<wire x1="373.38" y1="241.3" x2="396.24" y2="241.3" width="0.1524" layer="91"/> -<label x="378.46" y="241.3" size="1.778" layer="95"/> -<wire x1="396.24" y1="254" x2="396.24" y2="241.3" width="0.1524" layer="91"/> -<wire x1="396.24" y1="241.3" x2="396.24" y2="238.76" width="0.1524" layer="91"/> -<pinref part="P+9" gate="1" pin="VCC"/> -<wire x1="396.24" y1="238.76" x2="396.24" y2="236.22" width="0.1524" layer="91"/> -<wire x1="396.24" y1="236.22" x2="396.24" y2="233.68" width="0.1524" layer="91"/> -<wire x1="396.24" y1="287.02" x2="396.24" y2="276.86" width="0.1524" layer="91"/> -<junction x="396.24" y="254"/> -<junction x="396.24" y="241.3"/> -<wire x1="396.24" y1="276.86" x2="396.24" y2="266.7" width="0.1524" layer="91"/> -<wire x1="396.24" y1="233.68" x2="373.38" y2="233.68" width="0.1524" layer="91"/> -<label x="378.46" y="233.68" size="1.778" layer="95"/> -<wire x1="396.24" y1="266.7" x2="373.38" y2="266.7" width="0.1524" layer="91"/> -<pinref part="X3" gate="G$1" pin="10"/> -<pinref part="X3" gate="G$1" pin="20"/> -<pinref part="X3" gate="G$1" pin="30"/> -<pinref part="X3" gate="G$1" pin="36"/> -<pinref part="R3" gate="G$1" pin="1"/> -<wire x1="388.62" y1="238.76" x2="396.24" y2="238.76" width="0.1524" layer="91"/> -<pinref part="R4" gate="G$1" pin="1"/> -<wire x1="388.62" y1="236.22" x2="396.24" y2="236.22" width="0.1524" layer="91"/> -<junction x="396.24" y="238.76"/> -<junction x="396.24" y="236.22"/> -<pinref part="X3" gate="G$1" pin="2"/> -<wire x1="373.38" y1="276.86" x2="396.24" y2="276.86" width="0.1524" layer="91"/> -<junction x="396.24" y="276.86"/> -<junction x="396.24" y="266.7"/> -<label x="378.46" y="276.86" size="1.778" layer="95"/> -<label x="378.46" y="266.7" size="1.778" layer="95"/> -</segment> -<segment> -<wire x1="215.9" y1="386.08" x2="215.9" y2="388.62" width="0.1524" layer="91"/> -<pinref part="U5" gate="G$1" pin="IN"/> -<wire x1="215.9" y1="388.62" x2="215.9" y2="391.16" width="0.1524" layer="91"/> -<wire x1="215.9" y1="391.16" x2="215.9" y2="396.24" width="0.1524" layer="91"/> -<wire x1="231.14" y1="391.16" x2="215.9" y2="391.16" width="0.1524" layer="91"/> -<junction x="215.9" y="391.16"/> -<pinref part="C4" gate="G$1" pin="2"/> -<pinref part="U5" gate="G$1" pin="EN"/> -<wire x1="231.14" y1="388.62" x2="215.9" y2="388.62" width="0.1524" layer="91"/> -<junction x="215.9" y="388.62"/> -<pinref part="P+4" gate="VCC" pin="VCC"/> -</segment> -<segment> -<wire x1="325.12" y1="124.46" x2="325.12" y2="127" width="0.1524" layer="91"/> -<pinref part="P+24" gate="VCC" pin="VCC"/> -<pinref part="R8" gate="G$1" pin="1"/> -<wire x1="327.66" y1="124.46" x2="325.12" y2="124.46" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="P+17" gate="VCC" pin="VCC"/> -<pinref part="C10" gate="G$1" pin="1"/> -<wire x1="76.2" y1="248.92" x2="76.2" y2="251.46" width="0.1524" layer="91"/> -<wire x1="76.2" y1="251.46" x2="76.2" y2="254" width="0.1524" layer="91"/> -<wire x1="76.2" y1="254" x2="76.2" y2="256.54" width="0.1524" layer="91"/> -<wire x1="76.2" y1="256.54" x2="76.2" y2="259.08" width="0.1524" layer="91"/> -<wire x1="76.2" y1="259.08" x2="76.2" y2="261.62" width="0.1524" layer="91"/> -<wire x1="76.2" y1="261.62" x2="76.2" y2="264.16" width="0.1524" layer="91"/> -<wire x1="76.2" y1="264.16" x2="76.2" y2="266.7" width="0.1524" layer="91"/> -<wire x1="76.2" y1="266.7" x2="76.2" y2="279.4" width="0.1524" layer="91"/> -<wire x1="93.98" y1="261.62" x2="76.2" y2="261.62" width="0.1524" layer="91"/> -<junction x="76.2" y="261.62"/> -<wire x1="76.2" y1="261.62" x2="71.12" y2="261.62" width="0.1524" layer="91"/> -<wire x1="93.98" y1="259.08" x2="76.2" y2="259.08" width="0.1524" layer="91"/> -<junction x="76.2" y="259.08"/> -<pinref part="C11" gate="G$1" pin="1"/> -<wire x1="93.98" y1="256.54" x2="76.2" y2="256.54" width="0.1524" layer="91"/> -<junction x="76.2" y="256.54"/> -<wire x1="76.2" y1="256.54" x2="71.12" y2="256.54" width="0.1524" layer="91"/> -<wire x1="93.98" y1="254" x2="76.2" y2="254" width="0.1524" layer="91"/> -<junction x="76.2" y="254"/> -<pinref part="C12" gate="G$1" pin="1"/> -<wire x1="93.98" y1="251.46" x2="76.2" y2="251.46" width="0.1524" layer="91"/> -<junction x="76.2" y="251.46"/> -<wire x1="76.2" y1="251.46" x2="71.12" y2="251.46" width="0.1524" layer="91"/> -<pinref part="C13" gate="G$1" pin="1"/> -<wire x1="93.98" y1="248.92" x2="76.2" y2="248.92" width="0.1524" layer="91"/> -<junction x="76.2" y="248.92"/> -<wire x1="93.98" y1="246.38" x2="76.2" y2="246.38" width="0.1524" layer="91"/> -<wire x1="76.2" y1="248.92" x2="76.2" y2="246.38" width="0.1524" layer="91"/> -<wire x1="93.98" y1="243.84" x2="76.2" y2="243.84" width="0.1524" layer="91"/> -<wire x1="76.2" y1="246.38" x2="76.2" y2="243.84" width="0.1524" layer="91"/> -<wire x1="93.98" y1="241.3" x2="76.2" y2="241.3" width="0.1524" layer="91"/> -<wire x1="76.2" y1="243.84" x2="76.2" y2="241.3" width="0.1524" layer="91"/> -<pinref part="C14" gate="G$1" pin="1"/> -<wire x1="93.98" y1="238.76" x2="76.2" y2="238.76" width="0.1524" layer="91"/> -<wire x1="76.2" y1="241.3" x2="76.2" y2="238.76" width="0.1524" layer="91"/> -<wire x1="93.98" y1="236.22" x2="76.2" y2="236.22" width="0.1524" layer="91"/> -<wire x1="76.2" y1="238.76" x2="76.2" y2="236.22" width="0.1524" layer="91"/> -<pinref part="C15" gate="G$1" pin="1"/> -<wire x1="93.98" y1="233.68" x2="76.2" y2="233.68" width="0.1524" layer="91"/> -<wire x1="93.98" y1="231.14" x2="76.2" y2="231.14" width="0.1524" layer="91"/> -<wire x1="76.2" y1="231.14" x2="76.2" y2="233.68" width="0.1524" layer="91"/> -<wire x1="76.2" y1="236.22" x2="76.2" y2="233.68" width="0.1524" layer="91"/> -<junction x="76.2" y="246.38"/> -<junction x="76.2" y="243.84"/> -<junction x="76.2" y="241.3"/> -<junction x="76.2" y="238.76"/> -<junction x="76.2" y="236.22"/> -<junction x="76.2" y="233.68"/> -<pinref part="C9" gate="G$1" pin="+"/> -<wire x1="76.2" y1="266.7" x2="58.42" y2="266.7" width="0.1524" layer="91"/> -<junction x="76.2" y="266.7"/> -<wire x1="93.98" y1="228.6" x2="76.2" y2="228.6" width="0.1524" layer="91"/> -<wire x1="76.2" y1="228.6" x2="76.2" y2="231.14" width="0.1524" layer="91"/> -<junction x="76.2" y="231.14"/> -<pinref part="U$5" gate="G$2" pin="PDR_ON"/> -<pinref part="U$5" gate="G$2" pin="VBAT"/> -<pinref part="U$5" gate="G$2" pin="VDD@1"/> -<pinref part="U$5" gate="G$2" pin="VDD@2"/> -<pinref part="U$5" gate="G$2" pin="VDD@3"/> -<pinref part="U$5" gate="G$2" pin="VDD@4"/> -<pinref part="U$5" gate="G$2" pin="VDD@5"/> -<pinref part="U$5" gate="G$2" pin="VDD@6"/> -<pinref part="U$5" gate="G$2" pin="VDD@7"/> -<pinref part="U$5" gate="G$2" pin="VDD@8"/> -<pinref part="U$5" gate="G$2" pin="VDD@9"/> -<pinref part="U$5" gate="G$2" pin="VDD@10"/> -<pinref part="U$5" gate="G$2" pin="VDD@11"/> -<pinref part="U$5" gate="G$2" pin="VDD33USB"/> -<wire x1="71.12" y1="246.38" x2="76.2" y2="246.38" width="0.1524" layer="91"/> -<wire x1="71.12" y1="241.3" x2="76.2" y2="241.3" width="0.1524" layer="91"/> -<wire x1="71.12" y1="236.22" x2="76.2" y2="236.22" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="U3" gate="G$1" pin="2"/> -<wire x1="33.02" y1="254" x2="33.02" y2="264.16" width="0.1524" layer="91"/> -<pinref part="P+18" gate="VCC" pin="VCC"/> -</segment> -<segment> -<pinref part="U$7" gate="G$1" pin="VDD"/> -<wire x1="386.08" y1="124.46" x2="388.62" y2="124.46" width="0.1524" layer="91"/> -<pinref part="C28" gate="G$1" pin="1"/> -<wire x1="388.62" y1="124.46" x2="393.7" y2="124.46" width="0.1524" layer="91"/> -<wire x1="393.7" y1="124.46" x2="398.78" y2="124.46" width="0.1524" layer="91"/> -<wire x1="398.78" y1="124.46" x2="403.86" y2="124.46" width="0.1524" layer="91"/> -<wire x1="403.86" y1="124.46" x2="408.94" y2="124.46" width="0.1524" layer="91"/> -<wire x1="408.94" y1="124.46" x2="414.02" y2="124.46" width="0.1524" layer="91"/> -<wire x1="414.02" y1="124.46" x2="419.1" y2="124.46" width="0.1524" layer="91"/> -<wire x1="419.1" y1="124.46" x2="419.1" y2="121.92" width="0.1524" layer="91"/> -<pinref part="C27" gate="G$1" pin="1"/> -<wire x1="414.02" y1="121.92" x2="414.02" y2="124.46" width="0.1524" layer="91"/> -<junction x="414.02" y="124.46"/> -<pinref part="C26" gate="G$1" pin="1"/> -<wire x1="408.94" y1="121.92" x2="408.94" y2="124.46" width="0.1524" layer="91"/> -<junction x="408.94" y="124.46"/> -<pinref part="C25" gate="G$1" pin="1"/> -<wire x1="403.86" y1="121.92" x2="403.86" y2="124.46" width="0.1524" layer="91"/> -<junction x="403.86" y="124.46"/> -<pinref part="C24" gate="G$1" pin="1"/> -<wire x1="398.78" y1="121.92" x2="398.78" y2="124.46" width="0.1524" layer="91"/> -<junction x="398.78" y="124.46"/> -<pinref part="C23" gate="G$1" pin="1"/> -<wire x1="393.7" y1="121.92" x2="393.7" y2="124.46" width="0.1524" layer="91"/> -<junction x="393.7" y="124.46"/> -<pinref part="U$7" gate="G$1" pin="VDDQ"/> -<wire x1="386.08" y1="121.92" x2="388.62" y2="121.92" width="0.1524" layer="91"/> -<wire x1="388.62" y1="121.92" x2="388.62" y2="124.46" width="0.1524" layer="91"/> -<junction x="388.62" y="124.46"/> -<pinref part="P+1" gate="VCC" pin="VCC"/> -<wire x1="388.62" y1="124.46" x2="388.62" y2="129.54" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="P+16" gate="VCC" pin="VCC"/> -<pinref part="RN2" gate="D" pin="2"/> -<wire x1="25.4" y1="264.16" x2="25.4" y2="251.46" width="0.1524" layer="91"/> -</segment> -</net> -<net name="DCMI_D0" class="0"> -<segment> -<wire x1="350.52" y1="238.76" x2="335.28" y2="238.76" width="0.1524" layer="91"/> -<label x="335.28" y="238.76" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="31"/> -</segment> -<segment> -<wire x1="73.66" y1="111.76" x2="93.98" y2="111.76" width="0.1524" layer="91"/> -<label x="81.28" y="111.76" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0"/> -</segment> -</net> -<net name="DCMI_D1" class="0"> -<segment> -<wire x1="350.52" y1="241.3" x2="335.28" y2="241.3" width="0.1524" layer="91"/> -<label x="335.28" y="241.3" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="29"/> -</segment> -<segment> -<wire x1="73.66" y1="109.22" x2="93.98" y2="109.22" width="0.1524" layer="91"/> -<label x="81.28" y="109.22" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1"/> -</segment> -</net> -<net name="DCMI_PCLK" class="0"> -<segment> -<wire x1="373.38" y1="261.62" x2="391.16" y2="261.62" width="0.1524" layer="91"/> -<label x="378.46" y="261.62" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="14"/> -</segment> -<segment> -<wire x1="93.98" y1="198.12" x2="76.2" y2="198.12" width="0.1524" layer="91"/> -<label x="76.2" y="198.12" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK"/> -</segment> -</net> -<net name="DCMI_HSYNC" class="0"> -<segment> -<wire x1="373.38" y1="256.54" x2="391.16" y2="256.54" width="0.1524" layer="91"/> -<label x="378.46" y="256.54" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="18"/> -</segment> -<segment> -<wire x1="93.98" y1="203.2" x2="76.2" y2="203.2" width="0.1524" layer="91"/> -<label x="76.2" y="203.2" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC"/> -</segment> -</net> -<net name="DCMI_VSYNC" class="0"> -<segment> -<wire x1="373.38" y1="259.08" x2="391.16" y2="259.08" width="0.1524" layer="91"/> -<label x="378.46" y="259.08" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="16"/> -</segment> -<segment> -<wire x1="93.98" y1="152.4" x2="76.2" y2="152.4" width="0.1524" layer="91"/> -<label x="76.2" y="152.4" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB7/TIM4_CH2//I2C1_SDA/USART1_RX//FMC_NL/DCMI_VSYNC"/> -</segment> -</net> -<net name="DCMI_CLK" class="0"> -<segment> -<wire x1="373.38" y1="264.16" x2="391.16" y2="264.16" width="0.1524" layer="91"/> -<label x="378.46" y="264.16" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="12"/> -</segment> -<segment> -<wire x1="93.98" y1="193.04" x2="76.2" y2="193.04" width="0.1524" layer="91"/> -<label x="76.2" y="193.04" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF"/> -</segment> -</net> -<net name="DCMI_RST" class="0"> -<segment> -<wire x1="350.52" y1="251.46" x2="335.28" y2="251.46" width="0.1524" layer="91"/> -<label x="335.28" y="251.46" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="21"/> -</segment> -<segment> -<wire x1="93.98" y1="187.96" x2="76.2" y2="187.96" width="0.1524" layer="91"/> -<label x="76.2" y="187.96" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA10/TIM1_CH3/USART1_RX/OTG_FS_ID/DCMI_D1"/> -</segment> -</net> -<net name="DCMI_PWDN" class="0"> -<segment> -<wire x1="350.52" y1="246.38" x2="335.28" y2="246.38" width="0.1524" layer="91"/> -<label x="335.28" y="246.38" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="25"/> -</segment> -<segment> -<wire x1="259.08" y1="243.84" x2="279.4" y2="243.84" width="0.1524" layer="91"/> -<label x="261.62" y="243.84" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD7/USART2_CK/FSMC_NE1/FSMC_NCE2"/> -</segment> -</net> -<net name="DCMI_D2" class="0"> -<segment> -<wire x1="350.52" y1="233.68" x2="335.28" y2="233.68" width="0.1524" layer="91"/> -<label x="335.28" y="233.68" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="35"/> -</segment> -<segment> -<wire x1="259.08" y1="106.68" x2="279.4" y2="106.68" width="0.1524" layer="91"/> -<label x="261.62" y="106.68" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG10/LCD_G3/FMC_NCE4_1/FMC_NE3/DCMI_D2/LCD_B2"/> -</segment> -</net> -<net name="DCMI_D3" class="0"> -<segment> -<wire x1="373.38" y1="243.84" x2="391.16" y2="243.84" width="0.1524" layer="91"/> -<label x="378.46" y="243.84" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="28"/> -</segment> -<segment> -<wire x1="259.08" y1="104.14" x2="279.4" y2="104.14" width="0.1524" layer="91"/> -<label x="261.62" y="104.14" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG11/ETH_MII_TX_EN/ETH_RMII_TX_ENFMC_NCE4_2/DCMI_D3"/> -</segment> -</net> -<net name="DCMI_D4" class="0"> -<segment> -<wire x1="373.38" y1="246.38" x2="391.16" y2="246.38" width="0.1524" layer="91"/> -<label x="378.46" y="246.38" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="26"/> -</segment> -<segment> -<wire x1="259.08" y1="208.28" x2="279.4" y2="208.28" width="0.1524" layer="91"/> -<label x="261.62" y="208.28" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE4/TRACED1/FSMC_A20/DCMI_D4/SPI4_NSS"/> -</segment> -</net> -<net name="DCMI_D5" class="0"> -<segment> -<wire x1="350.52" y1="236.22" x2="335.28" y2="236.22" width="0.1524" layer="91"/> -<label x="335.28" y="236.22" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="33"/> -</segment> -<segment> -<wire x1="93.98" y1="154.94" x2="76.2" y2="154.94" width="0.1524" layer="91"/> -<label x="76.2" y="154.94" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB6/TIM4_CH1/I2C1_SCL/USART1_TX/CAN2_TX/FMC_SDNE1/DCMI_D5"/> -</segment> -</net> -<net name="DCMI_D6" class="0"> -<segment> -<wire x1="373.38" y1="248.92" x2="391.16" y2="248.92" width="0.1524" layer="91"/> -<label x="378.46" y="248.92" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="24"/> -</segment> -<segment> -<wire x1="259.08" y1="205.74" x2="279.4" y2="205.74" width="0.1524" layer="91"/> -<label x="261.62" y="205.74" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6/SPI4_MISO"/> -</segment> -</net> -<net name="DCMI_D7" class="0"> -<segment> -<wire x1="373.38" y1="251.46" x2="391.16" y2="251.46" width="0.1524" layer="91"/> -<label x="378.46" y="251.46" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="22"/> -</segment> -<segment> -<wire x1="259.08" y1="203.2" x2="279.4" y2="203.2" width="0.1524" layer="91"/> -<label x="261.62" y="203.2" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE6/TRACED3/FSMC_A22/TIM9_CH2/DCMI_D7/SPI4_MOSI"/> -</segment> -</net> -<net name="SD_CD" class="0"> -<segment> -<wire x1="274.32" y1="114.3" x2="259.08" y2="114.3" width="0.1524" layer="91"/> -<label x="261.62" y="114.3" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG7/FSMC_INT3/DCMI_D13"/> -</segment> -<segment> -<pinref part="RN2" gate="A" pin="1"/> -<pinref part="X2" gate="G$1" pin="CD"/> -<wire x1="487.68" y1="386.08" x2="502.92" y2="386.08" width="0.1524" layer="91"/> -<label x="490.22" y="386.08" size="1.778" layer="95"/> -</segment> -</net> -<net name="SDIO_D0" class="0"> -<segment> -<wire x1="502.92" y1="375.92" x2="487.68" y2="375.92" width="0.1524" layer="91"/> -<label x="490.22" y="375.92" size="1.778" layer="95"/> -<pinref part="X2" gate="G$1" pin="DAT0"/> -<pinref part="RN3" gate="A" pin="2"/> -</segment> -<segment> -<wire x1="73.66" y1="106.68" x2="93.98" y2="106.68" width="0.1524" layer="91"/> -<label x="81.28" y="106.68" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2"/> -</segment> -</net> -<net name="SDIO_D1" class="0"> -<segment> -<wire x1="73.66" y1="104.14" x2="93.98" y2="104.14" width="0.1524" layer="91"/> -<label x="81.28" y="104.14" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4"/> -</segment> -<segment> -<pinref part="RN3" gate="B" pin="2"/> -<pinref part="X2" gate="G$1" pin="DAT1"/> -<wire x1="487.68" y1="373.38" x2="502.92" y2="373.38" width="0.1524" layer="91"/> -<label x="490.22" y="373.38" size="1.778" layer="95"/> -</segment> -</net> -<net name="SDIO_D2" class="0"> -<segment> -<wire x1="502.92" y1="370.84" x2="487.68" y2="370.84" width="0.1524" layer="91"/> -<label x="490.22" y="370.84" size="1.778" layer="95"/> -<pinref part="X2" gate="G$1" pin="DAT2"/> -<pinref part="RN3" gate="C" pin="1"/> -</segment> -<segment> -<wire x1="73.66" y1="101.6" x2="93.98" y2="101.6" width="0.1524" layer="91"/> -<label x="81.28" y="101.6" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX"/> -</segment> -</net> -<net name="SDIO_CLK" class="0"> -<segment> -<wire x1="502.92" y1="383.54" x2="487.68" y2="383.54" width="0.1524" layer="91"/> -<label x="490.22" y="383.54" size="1.778" layer="95"/> -<pinref part="X2" gate="G$1" pin="CLK"/> -</segment> -<segment> -<wire x1="73.66" y1="96.52" x2="93.98" y2="96.52" width="0.1524" layer="91"/> -<label x="81.28" y="96.52" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK"/> -</segment> -</net> -<net name="SDIO_CMD" class="0"> -<segment> -<wire x1="259.08" y1="256.54" x2="279.4" y2="256.54" width="0.1524" layer="91"/> -<label x="261.62" y="256.54" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11"/> -</segment> -<segment> -<pinref part="RN2" gate="B" pin="2"/> -<pinref part="X2" gate="G$1" pin="CMD"/> -<wire x1="487.68" y1="381" x2="502.92" y2="381" width="0.1524" layer="91"/> -<label x="490.22" y="381" size="1.778" layer="95"/> -</segment> -</net> -<net name="LED_G" class="0"> -<segment> -<wire x1="340.36" y1="383.54" x2="330.2" y2="383.54" width="0.1524" layer="91"/> -<label x="330.2" y="383.54" size="1.778" layer="95"/> -<pinref part="R12" gate="G$1" pin="1"/> -</segment> -<segment> -<wire x1="73.66" y1="124.46" x2="93.98" y2="124.46" width="0.1524" layer="91"/> -<label x="81.28" y="124.46" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC1/ETH_MDC/ADC123_IN11"/> -</segment> -</net> -<net name="LED_B" class="0"> -<segment> -<wire x1="340.36" y1="386.08" x2="330.2" y2="386.08" width="0.1524" layer="91"/> -<label x="330.2" y="386.08" size="1.778" layer="95"/> -<pinref part="R11" gate="G$1" pin="1"/> -</segment> -<segment> -<wire x1="73.66" y1="121.92" x2="93.98" y2="121.92" width="0.1524" layer="91"/> -<label x="81.28" y="121.92" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC2/SPI2_MISO/I2S2EXT_SD/OTG_HS_ULPI_DIR/ETH_MII_TXD2/FMC_SDNE0"/> -</segment> -</net> -<net name="LED_R" class="0"> -<segment> -<wire x1="340.36" y1="388.62" x2="330.2" y2="388.62" width="0.1524" layer="91"/> -<label x="330.2" y="388.62" size="1.778" layer="95"/> -<pinref part="R10" gate="G$1" pin="1"/> -</segment> -<segment> -<wire x1="73.66" y1="127" x2="93.98" y2="127" width="0.1524" layer="91"/> -<label x="81.28" y="127" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC0/OTG_HS_ULPI_STP/ADC123_IN10/FMC_SDNWE"/> -</segment> -</net> -<net name="TIM4_CH1" class="0"> -<segment> -<wire x1="530.86" y1="274.32" x2="510.54" y2="274.32" width="0.1524" layer="91"/> -<label x="510.54" y="274.32" size="1.778" layer="95"/> -<pinref part="JP2" gate="A" pin="6"/> -</segment> -<segment> -<wire x1="259.08" y1="231.14" x2="279.4" y2="231.14" width="0.1524" layer="91"/> -<label x="261.62" y="231.14" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD12/FMC_A17/TIM4_CH1/USART3_RTS"/> -</segment> -</net> -<net name="TIM4_CH2" class="0"> -<segment> -<wire x1="530.86" y1="276.86" x2="510.54" y2="276.86" width="0.1524" layer="91"/> -<label x="510.54" y="276.86" size="1.778" layer="95"/> -<pinref part="JP2" gate="A" pin="5"/> -</segment> -<segment> -<wire x1="259.08" y1="228.6" x2="279.4" y2="228.6" width="0.1524" layer="91"/> -<label x="261.62" y="228.6" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD13/FMC_A18/TIM4_CH2"/> -</segment> -</net> -<net name="SDIO_D3" class="0"> -<segment> -<wire x1="502.92" y1="368.3" x2="487.68" y2="368.3" width="0.1524" layer="91"/> -<label x="490.22" y="368.3" size="1.778" layer="95"/> -<pinref part="X2" gate="G$1" pin="DAT3/CD"/> -<pinref part="RN3" gate="D" pin="1"/> -</segment> -<segment> -<wire x1="73.66" y1="99.06" x2="93.98" y2="99.06" width="0.1524" layer="91"/> -<label x="81.28" y="99.06" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4"/> -</segment> -</net> -<net name="N$5" class="0"> -<segment> -<pinref part="Q1" gate="G$1" pin="G"/> -<pinref part="R2" gate="G$1" pin="2"/> -<wire x1="350.52" y1="365.76" x2="350.52" y2="358.14" width="0.1524" layer="91"/> -<wire x1="350.52" y1="365.76" x2="340.36" y2="365.76" width="0.1524" layer="91"/> -<wire x1="340.36" y1="365.76" x2="340.36" y2="363.22" width="0.1524" layer="91"/> -<pinref part="R7" gate="G$1" pin="2"/> -<wire x1="345.44" y1="370.84" x2="350.52" y2="370.84" width="0.1524" layer="91"/> -<wire x1="350.52" y1="370.84" x2="350.52" y2="365.76" width="0.1524" layer="91"/> -<junction x="350.52" y="365.76"/> -</segment> -</net> -<net name="FS_DP" class="0"> -<segment> -<pinref part="X1" gate="G$1" pin="D+"/> -<wire x1="38.1" y1="378.46" x2="63.5" y2="378.46" width="0.1524" layer="91"/> -<label x="60.96" y="378.46" size="1.778" layer="95"/> -</segment> -<segment> -<wire x1="93.98" y1="182.88" x2="76.2" y2="182.88" width="0.1524" layer="91"/> -<label x="76.2" y="182.88" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA12/TIM1_ETR/USART1_RTS/CAN1_TX/LCD_R5/OTG_FS_DP"/> -</segment> -</net> -<net name="N$8" class="0"> -<segment> -<wire x1="350.52" y1="388.62" x2="360.68" y2="388.62" width="0.1524" layer="91"/> -<pinref part="LED1" gate="G$1" pin="RED"/> -<pinref part="R10" gate="G$1" pin="2"/> -</segment> -</net> -<net name="LED_IR" class="0"> -<segment> -<wire x1="259.08" y1="213.36" x2="279.4" y2="213.36" width="0.1524" layer="91"/> -<label x="261.62" y="213.36" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3/SPI4_SCK"/> -</segment> -<segment> -<pinref part="R7" gate="G$1" pin="1"/> -<wire x1="335.28" y1="370.84" x2="325.12" y2="370.84" width="0.1524" layer="91"/> -<label x="325.12" y="370.84" size="1.778" layer="95"/> -</segment> -</net> -<net name="N$14" class="0"> -<segment> -<pinref part="Q1" gate="G$1" pin="D"/> -<wire x1="355.6" y1="350.52" x2="360.68" y2="350.52" width="0.1524" layer="91"/> -<pinref part="R1" gate="G$1" pin="1"/> -</segment> -</net> -<net name="N$10" class="0"> -<segment> -<wire x1="370.84" y1="350.52" x2="375.92" y2="350.52" width="0.1524" layer="91"/> -<pinref part="R1" gate="G$1" pin="2"/> -<pinref part="LED3" gate="G$1" pin="C"/> -</segment> -</net> -<net name="FS_DM" class="0"> -<segment> -<pinref part="X1" gate="G$1" pin="D-"/> -<wire x1="38.1" y1="381" x2="63.5" y2="381" width="0.1524" layer="91"/> -<label x="60.96" y="381" size="1.778" layer="95"/> -</segment> -<segment> -<wire x1="93.98" y1="185.42" x2="76.2" y2="185.42" width="0.1524" layer="91"/> -<label x="76.2" y="185.42" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA11/TIM1_CH4/USART1_CTS/CAN1_RX/LCD_R4/OTG_FS_DM"/> -</segment> -</net> -<net name="I2C1_SCL" class="0"> -<segment> -<wire x1="373.38" y1="238.76" x2="378.46" y2="238.76" width="0.1524" layer="91"/> -<label x="378.46" y="238.76" size="1.778" layer="95"/> -<pinref part="R3" gate="G$1" pin="2"/> -<pinref part="X3" gate="G$1" pin="32"/> -</segment> -<segment> -<wire x1="93.98" y1="149.86" x2="76.2" y2="149.86" width="0.1524" layer="91"/> -<label x="76.2" y="149.86" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB8/TIM4_CH3/TIM10_CH1/I2C1_SCL/CAN1_RX/SDIO_D4/DCMI_D6"/> -</segment> -</net> -<net name="I2C1_SDA" class="0"> -<segment> -<wire x1="373.38" y1="236.22" x2="378.46" y2="236.22" width="0.1524" layer="91"/> -<label x="378.46" y="236.22" size="1.778" layer="95"/> -<pinref part="R4" gate="G$1" pin="2"/> -<pinref part="X3" gate="G$1" pin="34"/> -</segment> -<segment> -<wire x1="93.98" y1="147.32" x2="76.2" y2="147.32" width="0.1524" layer="91"/> -<label x="76.2" y="147.32" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB9/TIM11_CH1/I2C1_SDA/SPI2_NSS/I2S2_WS/SDIO_D5/DCMI_D7"/> -</segment> -</net> -<net name="SPI2_SCLK" class="0"> -<segment> -<wire x1="464.82" y1="226.06" x2="485.14" y2="226.06" width="0.1524" layer="91"/> -<label x="464.82" y="226.06" size="1.778" layer="95"/> -<pinref part="JP1" gate="A" pin="3"/> -</segment> -<segment> -<wire x1="93.98" y1="137.16" x2="76.2" y2="137.16" width="0.1524" layer="91"/> -<label x="76.2" y="137.16" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6"/> -</segment> -</net> -<net name="I2C2_SCL" class="0"> -<segment> -<wire x1="485.14" y1="220.98" x2="464.82" y2="220.98" width="0.1524" layer="91"/> -<label x="464.82" y="220.98" size="1.778" layer="95"/> -<pinref part="JP1" gate="A" pin="5"/> -</segment> -<segment> -<wire x1="93.98" y1="144.78" x2="76.2" y2="144.78" width="0.1524" layer="91"/> -<label x="76.2" y="144.78" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/TIM2_CH3"/> -</segment> -</net> -<net name="I2C2_SDA" class="0"> -<segment> -<wire x1="485.14" y1="218.44" x2="464.82" y2="218.44" width="0.1524" layer="91"/> -<label x="464.82" y="218.44" size="1.778" layer="95"/> -<pinref part="JP1" gate="A" pin="6"/> -</segment> -<segment> -<wire x1="93.98" y1="142.24" x2="76.2" y2="142.24" width="0.1524" layer="91"/> -<label x="76.2" y="142.24" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/TIM2_CH4"/> -</segment> -</net> -<net name="RAW" class="0"> -<segment> -<pinref part="Q2" gate="G$1" pin="S"/> -<wire x1="93.98" y1="383.54" x2="99.06" y2="383.54" width="0.1524" layer="91"/> -<pinref part="D3" gate="G$1" pin="C"/> -<wire x1="99.06" y1="383.54" x2="111.76" y2="383.54" width="0.1524" layer="91"/> -<wire x1="91.44" y1="391.16" x2="99.06" y2="391.16" width="0.1524" layer="91"/> -<wire x1="99.06" y1="391.16" x2="99.06" y2="383.54" width="0.1524" layer="91"/> -<junction x="99.06" y="383.54"/> -<wire x1="111.76" y1="383.54" x2="111.76" y2="396.24" width="0.1524" layer="91"/> -<pinref part="RAW3" gate="G$1" pin="RAW"/> -</segment> -<segment> -<wire x1="144.78" y1="391.16" x2="127" y2="391.16" width="0.1524" layer="91"/> -<wire x1="127" y1="391.16" x2="127" y2="396.24" width="0.1524" layer="91"/> -<wire x1="144.78" y1="388.62" x2="127" y2="388.62" width="0.1524" layer="91"/> -<wire x1="127" y1="388.62" x2="127" y2="391.16" width="0.1524" layer="91"/> -<pinref part="C2" gate="G$1" pin="2"/> -<wire x1="127" y1="388.62" x2="127" y2="386.08" width="0.1524" layer="91"/> -<junction x="127" y="391.16"/> -<junction x="127" y="388.62"/> -<pinref part="RAW1" gate="G$1" pin="RAW"/> -<pinref part="U8" gate="G$1" pin="EN"/> -<pinref part="U8" gate="G$1" pin="VIN"/> -</segment> -</net> -<net name="DAC" class="0"> -<segment> -<wire x1="485.14" y1="215.9" x2="464.82" y2="215.9" width="0.1524" layer="91"/> -<label x="464.82" y="215.9" size="1.778" layer="95"/> -<pinref part="JP1" gate="A" pin="7"/> -</segment> -<segment> -<wire x1="93.98" y1="200.66" x2="76.2" y2="200.66" width="0.1524" layer="91"/> -<label x="76.2" y="200.66" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1/TIM2_ETR/TIM8_CHIN/ADC12_IN5"/> -</segment> -</net> -<net name="SPI2_NSS" class="0"> -<segment> -<wire x1="464.82" y1="223.52" x2="485.14" y2="223.52" width="0.1524" layer="91"/> -<label x="464.82" y="223.52" size="1.778" layer="95"/> -<pinref part="JP1" gate="A" pin="4"/> -</segment> -<segment> -<wire x1="93.98" y1="139.7" x2="76.2" y2="139.7" width="0.1524" layer="91"/> -<label x="76.2" y="139.7" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX"/> -</segment> -</net> -<net name="SPI2_MISO" class="0"> -<segment> -<wire x1="464.82" y1="228.6" x2="485.14" y2="228.6" width="0.1524" layer="91"/> -<label x="464.82" y="228.6" size="1.778" layer="95"/> -<pinref part="JP1" gate="A" pin="2"/> -</segment> -<segment> -<wire x1="93.98" y1="134.62" x2="76.2" y2="134.62" width="0.1524" layer="91"/> -<label x="76.2" y="134.62" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N"/> -</segment> -</net> -<net name="SPI2_MOSI" class="0"> -<segment> -<wire x1="464.82" y1="231.14" x2="485.14" y2="231.14" width="0.1524" layer="91"/> -<label x="464.82" y="231.14" size="1.778" layer="95"/> -<pinref part="JP1" gate="A" pin="1"/> -</segment> -<segment> -<wire x1="93.98" y1="132.08" x2="76.2" y2="132.08" width="0.1524" layer="91"/> -<label x="76.2" y="132.08" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DP"/> -</segment> -</net> -<net name="N$17" class="0"> -<segment> -<wire x1="388.62" y1="350.52" x2="383.54" y2="350.52" width="0.1524" layer="91"/> -<pinref part="LED3" gate="G$1" pin="A"/> -<pinref part="LED2" gate="G$1" pin="C"/> -</segment> -</net> -<net name="TIM4_CH3" class="0"> -<segment> -<pinref part="JP2" gate="A" pin="4"/> -<wire x1="530.86" y1="279.4" x2="510.54" y2="279.4" width="0.1524" layer="91"/> -<label x="510.54" y="279.4" size="1.778" layer="95"/> -</segment> -</net> -<net name="N$6" class="0"> -<segment> -<pinref part="LED1" gate="G$1" pin="BLU"/> -<wire x1="350.52" y1="386.08" x2="360.68" y2="386.08" width="0.1524" layer="91"/> -<pinref part="R11" gate="G$1" pin="2"/> -</segment> -</net> -<net name="N$9" class="0"> -<segment> -<pinref part="LED1" gate="G$1" pin="GRN"/> -<wire x1="360.68" y1="383.54" x2="350.52" y2="383.54" width="0.1524" layer="91"/> -<pinref part="R12" gate="G$1" pin="2"/> -</segment> -</net> -<net name="VIN" class="0"> -<segment> -<pinref part="D3" gate="G$1" pin="A"/> -<wire x1="76.2" y1="396.24" x2="76.2" y2="391.16" width="0.1524" layer="91"/> -<wire x1="76.2" y1="391.16" x2="86.36" y2="391.16" width="0.1524" layer="91"/> -<wire x1="76.2" y1="391.16" x2="76.2" y2="373.38" width="0.1524" layer="91"/> -<pinref part="Q2" gate="G$1" pin="G"/> -<pinref part="R9" gate="G$1" pin="2"/> -<wire x1="88.9" y1="370.84" x2="88.9" y2="373.38" width="0.1524" layer="91"/> -<wire x1="88.9" y1="373.38" x2="88.9" y2="375.92" width="0.1524" layer="91"/> -<wire x1="76.2" y1="373.38" x2="88.9" y2="373.38" width="0.1524" layer="91"/> -<junction x="88.9" y="373.38"/> -<junction x="76.2" y="391.16"/> -<pinref part="VIN2" gate="G$1" pin="VIN"/> -</segment> -<segment> -<pinref part="X4" gate="G$1" pin="2"/> -<wire x1="530.86" y1="259.08" x2="505.46" y2="259.08" width="0.1524" layer="91"/> -<wire x1="505.46" y1="259.08" x2="505.46" y2="271.78" width="0.1524" layer="91"/> -<pinref part="JP2" gate="A" pin="7"/> -<wire x1="530.86" y1="271.78" x2="505.46" y2="271.78" width="0.1524" layer="91"/> -<label x="510.54" y="271.78" size="1.778" layer="95"/> -<wire x1="505.46" y1="271.78" x2="505.46" y2="292.1" width="0.1524" layer="91"/> -<pinref part="VIN3" gate="G$1" pin="VIN"/> -<junction x="505.46" y="271.78"/> -</segment> -</net> -<net name="N$7" class="0"> -<segment> -<wire x1="38.1" y1="383.54" x2="45.72" y2="383.54" width="0.1524" layer="91"/> -<pinref part="L2" gate="G$1" pin="1"/> -<pinref part="X1" gate="G$1" pin="5V"/> -</segment> -</net> -<net name="SW" class="0"> -<segment> -<pinref part="L3" gate="G$1" pin="1"/> -<wire x1="170.18" y1="391.16" x2="172.72" y2="391.16" width="0.1524" layer="91"/> -<pinref part="U8" gate="G$1" pin="SW"/> -</segment> -</net> -<net name="DCMI_FSIN" class="0"> -<segment> -<pinref part="JP2" gate="A" pin="3"/> -<wire x1="530.86" y1="281.94" x2="510.54" y2="281.94" width="0.1524" layer="91"/> -<label x="510.54" y="281.94" size="1.778" layer="95"/> -</segment> -<segment> -<wire x1="350.52" y1="248.92" x2="335.28" y2="248.92" width="0.1524" layer="91"/> -<label x="335.28" y="248.92" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="23"/> -</segment> -</net> -<net name="SPI3_SCLK/TRACESWO" class="0"> -<segment> -<wire x1="350.52" y1="261.62" x2="335.28" y2="261.62" width="0.1524" layer="91"/> -<label x="335.28" y="261.62" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="13"/> -</segment> -<segment> -<pinref part="JP3" gate="A" pin="1"/> -<wire x1="497.84" y1="101.6" x2="485.14" y2="101.6" width="0.1524" layer="91"/> -<label x="485.14" y="101.6" size="1.778" layer="95"/> -</segment> -<segment> -<wire x1="93.98" y1="162.56" x2="76.2" y2="162.56" width="0.1524" layer="91"/> -<label x="76.2" y="162.56" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK"/> -</segment> -</net> -<net name="SPI3_MISO" class="0"> -<segment> -<wire x1="350.52" y1="259.08" x2="335.28" y2="259.08" width="0.1524" layer="91"/> -<label x="335.28" y="259.08" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="15"/> -</segment> -<segment> -<wire x1="93.98" y1="160.02" x2="76.2" y2="160.02" width="0.1524" layer="91"/> -<label x="76.2" y="160.02" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB4/NJTRST/TIM3_CH1/SPI1_MISO/SPI3_MISO/I2S3EXT_SD"/> -</segment> -</net> -<net name="SPI3_MOSI" class="0"> -<segment> -<wire x1="350.52" y1="256.54" x2="335.28" y2="256.54" width="0.1524" layer="91"/> -<label x="335.28" y="256.54" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="17"/> -</segment> -<segment> -<wire x1="93.98" y1="157.48" x2="76.2" y2="157.48" width="0.1524" layer="91"/> -<label x="76.2" y="157.48" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PB5/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/I2S3_SD/DCMI_D10/FMC_SDCKE1"/> -</segment> -</net> -<net name="SPI3_SSEL" class="0"> -<segment> -<wire x1="350.52" y1="264.16" x2="335.28" y2="264.16" width="0.1524" layer="91"/> -<label x="335.28" y="264.16" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="11"/> -</segment> -<segment> -<wire x1="93.98" y1="175.26" x2="76.2" y2="175.26" width="0.1524" layer="91"/> -<label x="76.2" y="175.26" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS"/> -</segment> -</net> -<net name="N$11" class="0"> -<segment> -<pinref part="U5" gate="G$1" pin="NR"/> -<pinref part="C6" gate="G$1" pin="1"/> -<wire x1="251.46" y1="375.92" x2="256.54" y2="375.92" width="0.1524" layer="91"/> -<wire x1="256.54" y1="375.92" x2="256.54" y2="373.38" width="0.1524" layer="91"/> -</segment> -</net> -<net name="VDDA" class="0"> -<segment> -<wire x1="264.16" y1="396.24" x2="264.16" y2="391.16" width="0.1524" layer="91"/> -<pinref part="C5" gate="G$1" pin="2"/> -<pinref part="U5" gate="G$1" pin="OUT"/> -<wire x1="264.16" y1="391.16" x2="264.16" y2="386.08" width="0.1524" layer="91"/> -<wire x1="251.46" y1="391.16" x2="264.16" y2="391.16" width="0.1524" layer="91"/> -<junction x="264.16" y="391.16"/> -<pinref part="VDDA1" gate="G$1" pin="VDDA"/> -</segment> -<segment> -<pinref part="VDDA2" gate="G$1" pin="VDDA"/> -<wire x1="391.16" y1="274.32" x2="391.16" y2="287.02" width="0.1524" layer="91"/> -<pinref part="X3" gate="G$1" pin="4"/> -<wire x1="373.38" y1="274.32" x2="391.16" y2="274.32" width="0.1524" layer="91"/> -<label x="378.46" y="274.32" size="1.778" layer="95"/> -</segment> -</net> -<net name="RSVD1" class="0"> -<segment> -<wire x1="350.52" y1="276.86" x2="335.28" y2="276.86" width="0.1524" layer="91"/> -<label x="335.28" y="276.86" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="1"/> -</segment> -</net> -<net name="RSVD2" class="0"> -<segment> -<wire x1="350.52" y1="274.32" x2="335.28" y2="274.32" width="0.1524" layer="91"/> -<label x="335.28" y="274.32" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="3"/> -</segment> -</net> -<net name="RSVD3" class="0"> -<segment> -<wire x1="350.52" y1="269.24" x2="335.28" y2="269.24" width="0.1524" layer="91"/> -<label x="335.28" y="269.24" size="1.778" layer="95"/> -<pinref part="X3" gate="G$1" pin="7"/> -</segment> -</net> -<net name="RSVD5" class="0"> -<segment> -<pinref part="X3" gate="G$1" pin="6"/> -<wire x1="373.38" y1="271.78" x2="391.16" y2="271.78" width="0.1524" layer="91"/> -<label x="378.46" y="271.78" size="1.778" layer="95"/> -</segment> -</net> -<net name="RSVD6" class="0"> -<segment> -<pinref part="X3" gate="G$1" pin="8"/> -<wire x1="373.38" y1="269.24" x2="391.16" y2="269.24" width="0.1524" layer="91"/> -<label x="378.46" y="269.24" size="1.778" layer="95"/> -</segment> -</net> -<net name="RSVD4" class="0"> -<segment> -<pinref part="X3" gate="G$1" pin="9"/> -<wire x1="350.52" y1="266.7" x2="335.28" y2="266.7" width="0.1524" layer="91"/> -<label x="335.28" y="266.7" size="1.778" layer="95"/> -</segment> -</net> -<net name="N$13" class="0"> -<segment> -<pinref part="U8" gate="G$1" pin="VOUT/FB"/> -<wire x1="170.18" y1="375.92" x2="187.96" y2="375.92" width="0.1524" layer="91"/> -<pinref part="R6" gate="G$1" pin="1"/> -<wire x1="187.96" y1="378.46" x2="187.96" y2="375.92" width="0.1524" layer="91"/> -<junction x="187.96" y="375.92"/> -<pinref part="R5" gate="G$1" pin="2"/> -<wire x1="187.96" y1="373.38" x2="187.96" y2="375.92" width="0.1524" layer="91"/> -</segment> -</net> -<net name="DRAM_D0" class="0"> -<segment> -<wire x1="406.4" y1="104.14" x2="386.08" y2="104.14" width="0.1524" layer="91"/> -<label x="388.62" y="104.14" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ0"/> -</segment> -<segment> -<wire x1="279.4" y1="226.06" x2="259.08" y2="226.06" width="0.1524" layer="91"/> -<label x="261.62" y="226.06" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD14/FMC_D0/TIM4_CH3"/> -</segment> -</net> -<net name="DRAM_D1" class="0"> -<segment> -<wire x1="406.4" y1="101.6" x2="386.08" y2="101.6" width="0.1524" layer="91"/> -<label x="388.62" y="101.6" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ1"/> -</segment> -<segment> -<wire x1="279.4" y1="223.52" x2="259.08" y2="223.52" width="0.1524" layer="91"/> -<label x="261.62" y="223.52" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD15/FMC_D1/TIM4_CH4"/> -</segment> -</net> -<net name="DRAM_D2" class="0"> -<segment> -<wire x1="406.4" y1="99.06" x2="386.08" y2="99.06" width="0.1524" layer="91"/> -<label x="388.62" y="99.06" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ2"/> -</segment> -<segment> -<wire x1="279.4" y1="261.62" x2="259.08" y2="261.62" width="0.1524" layer="91"/> -<label x="261.62" y="261.62" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD0/FMC_D2/CAN1_RX"/> -</segment> -</net> -<net name="DRAM_D3" class="0"> -<segment> -<wire x1="406.4" y1="96.52" x2="386.08" y2="96.52" width="0.1524" layer="91"/> -<label x="388.62" y="96.52" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ3"/> -</segment> -<segment> -<wire x1="279.4" y1="259.08" x2="259.08" y2="259.08" width="0.1524" layer="91"/> -<label x="261.62" y="259.08" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD1/FMC_D3/CAN1_TX"/> -</segment> -</net> -<net name="DRAM_D4" class="0"> -<segment> -<wire x1="406.4" y1="93.98" x2="386.08" y2="93.98" width="0.1524" layer="91"/> -<label x="388.62" y="93.98" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ4"/> -</segment> -<segment> -<wire x1="279.4" y1="200.66" x2="259.08" y2="200.66" width="0.1524" layer="91"/> -<label x="261.62" y="200.66" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE7/FMC_D4/TIM1_ETR/UART7_RX"/> -</segment> -</net> -<net name="DRAM_D5" class="0"> -<segment> -<wire x1="406.4" y1="91.44" x2="386.08" y2="91.44" width="0.1524" layer="91"/> -<label x="388.62" y="91.44" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ5"/> -</segment> -<segment> -<wire x1="279.4" y1="198.12" x2="259.08" y2="198.12" width="0.1524" layer="91"/> -<label x="261.62" y="198.12" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE8/FSMC_D5/TIM1_CH1N/UART7_TX"/> -</segment> -</net> -<net name="DRAM_D6" class="0"> -<segment> -<wire x1="406.4" y1="88.9" x2="386.08" y2="88.9" width="0.1524" layer="91"/> -<label x="388.62" y="88.9" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ6"/> -</segment> -<segment> -<wire x1="279.4" y1="195.58" x2="259.08" y2="195.58" width="0.1524" layer="91"/> -<label x="261.62" y="195.58" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE9/FMC_D6/TIM1_CH1"/> -</segment> -</net> -<net name="DRAM_D7" class="0"> -<segment> -<wire x1="406.4" y1="86.36" x2="386.08" y2="86.36" width="0.1524" layer="91"/> -<label x="388.62" y="86.36" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ7"/> -</segment> -<segment> -<wire x1="279.4" y1="193.04" x2="259.08" y2="193.04" width="0.1524" layer="91"/> -<label x="261.62" y="193.04" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE10/FMC_D7/TIM1_CH2N"/> -</segment> -</net> -<net name="DRAM_A0" class="0"> -<segment> -<wire x1="355.6" y1="96.52" x2="335.28" y2="96.52" width="0.1524" layer="91"/> -<label x="337.82" y="96.52" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A0"/> -</segment> -<segment> -<wire x1="279.4" y1="175.26" x2="259.08" y2="175.26" width="0.1524" layer="91"/> -<label x="261.62" y="175.26" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF0/I2C2_SDA/FMC_A0"/> -</segment> -</net> -<net name="DRAM_A1" class="0"> -<segment> -<wire x1="355.6" y1="93.98" x2="335.28" y2="93.98" width="0.1524" layer="91"/> -<label x="337.82" y="93.98" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A1"/> -</segment> -<segment> -<wire x1="279.4" y1="172.72" x2="259.08" y2="172.72" width="0.1524" layer="91"/> -<label x="261.62" y="172.72" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF1/I2C2_SCL/FMC_A1"/> -</segment> -</net> -<net name="DRAM_A2" class="0"> -<segment> -<wire x1="355.6" y1="91.44" x2="335.28" y2="91.44" width="0.1524" layer="91"/> -<label x="337.82" y="91.44" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A2"/> -</segment> -<segment> -<wire x1="279.4" y1="170.18" x2="259.08" y2="170.18" width="0.1524" layer="91"/> -<label x="261.62" y="170.18" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF2/I2C2_SMBA/FSMC_A2"/> -</segment> -</net> -<net name="DRAM_A3" class="0"> -<segment> -<wire x1="355.6" y1="88.9" x2="335.28" y2="88.9" width="0.1524" layer="91"/> -<label x="337.82" y="88.9" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A3"/> -</segment> -<segment> -<wire x1="279.4" y1="167.64" x2="259.08" y2="167.64" width="0.1524" layer="91"/> -<label x="261.62" y="167.64" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF3/FMC_A3"/> -</segment> -</net> -<net name="DRAM_A4" class="0"> -<segment> -<wire x1="355.6" y1="86.36" x2="335.28" y2="86.36" width="0.1524" layer="91"/> -<label x="337.82" y="86.36" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A4"/> -</segment> -<segment> -<wire x1="279.4" y1="165.1" x2="259.08" y2="165.1" width="0.1524" layer="91"/> -<label x="261.62" y="165.1" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF4/FMC_A4"/> -</segment> -</net> -<net name="DRAM_A5" class="0"> -<segment> -<wire x1="355.6" y1="83.82" x2="335.28" y2="83.82" width="0.1524" layer="91"/> -<label x="337.82" y="83.82" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A5"/> -</segment> -<segment> -<wire x1="279.4" y1="162.56" x2="259.08" y2="162.56" width="0.1524" layer="91"/> -<label x="261.62" y="162.56" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF5/FMC_A5"/> -</segment> -</net> -<net name="DRAM_A6" class="0"> -<segment> -<wire x1="355.6" y1="81.28" x2="335.28" y2="81.28" width="0.1524" layer="91"/> -<label x="337.82" y="81.28" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A6"/> -</segment> -<segment> -<wire x1="279.4" y1="144.78" x2="259.08" y2="144.78" width="0.1524" layer="91"/> -<label x="261.62" y="144.78" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF12/FMC_A6"/> -</segment> -</net> -<net name="DRAM_A7" class="0"> -<segment> -<wire x1="355.6" y1="78.74" x2="335.28" y2="78.74" width="0.1524" layer="91"/> -<label x="337.82" y="78.74" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A7"/> -</segment> -<segment> -<wire x1="279.4" y1="142.24" x2="259.08" y2="142.24" width="0.1524" layer="91"/> -<label x="261.62" y="142.24" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF13/FMC_A7"/> -</segment> -</net> -<net name="DRAM_A8" class="0"> -<segment> -<wire x1="355.6" y1="76.2" x2="335.28" y2="76.2" width="0.1524" layer="91"/> -<label x="337.82" y="76.2" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A8"/> -</segment> -<segment> -<wire x1="279.4" y1="139.7" x2="259.08" y2="139.7" width="0.1524" layer="91"/> -<label x="261.62" y="139.7" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF14/FMC_A8"/> -</segment> -</net> -<net name="DRAM_A9" class="0"> -<segment> -<wire x1="355.6" y1="73.66" x2="335.28" y2="73.66" width="0.1524" layer="91"/> -<label x="337.82" y="73.66" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A9"/> -</segment> -<segment> -<wire x1="279.4" y1="137.16" x2="259.08" y2="137.16" width="0.1524" layer="91"/> -<label x="261.62" y="137.16" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF15/FMC_A9"/> -</segment> -</net> -<net name="DRAM_A10" class="0"> -<segment> -<wire x1="355.6" y1="71.12" x2="335.28" y2="71.12" width="0.1524" layer="91"/> -<label x="337.82" y="71.12" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A10"/> -</segment> -<segment> -<wire x1="279.4" y1="132.08" x2="259.08" y2="132.08" width="0.1524" layer="91"/> -<label x="261.62" y="132.08" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG0/FMC_A10"/> -</segment> -</net> -<net name="DRAM_A11" class="0"> -<segment> -<wire x1="355.6" y1="68.58" x2="335.28" y2="68.58" width="0.1524" layer="91"/> -<label x="337.82" y="68.58" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A11"/> -</segment> -<segment> -<wire x1="279.4" y1="129.54" x2="259.08" y2="129.54" width="0.1524" layer="91"/> -<label x="261.62" y="129.54" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG1/FMC_A11"/> -</segment> -</net> -<net name="DRAM_BA0" class="0"> -<segment> -<wire x1="335.28" y1="114.3" x2="355.6" y2="114.3" width="0.1524" layer="91"/> -<label x="337.82" y="114.3" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="BA0"/> -</segment> -<segment> -<wire x1="259.08" y1="121.92" x2="279.4" y2="121.92" width="0.1524" layer="91"/> -<label x="261.62" y="121.92" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG4/FMC_A14/FMC_BA0"/> -</segment> -</net> -<net name="DRAM_BA1" class="0"> -<segment> -<wire x1="335.28" y1="111.76" x2="355.6" y2="111.76" width="0.1524" layer="91"/> -<label x="337.82" y="111.76" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="BA1"/> -</segment> -<segment> -<wire x1="259.08" y1="119.38" x2="279.4" y2="119.38" width="0.1524" layer="91"/> -<label x="261.62" y="119.38" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG5/FMC_A15/FMC_BA1"/> -</segment> -</net> -<net name="DRAM_DQML" class="0"> -<segment> -<wire x1="335.28" y1="106.68" x2="355.6" y2="106.68" width="0.1524" layer="91"/> -<label x="337.82" y="106.68" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQML"/> -</segment> -<segment> -<wire x1="279.4" y1="218.44" x2="259.08" y2="218.44" width="0.1524" layer="91"/> -<label x="261.62" y="218.44" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE0/TIM4_ETR/UART8_RX/FMC_NBL0/DCMI_D2"/> -</segment> -</net> -<net name="DRAM_RAS" class="0"> -<segment> -<wire x1="355.6" y1="116.84" x2="337.82" y2="116.84" width="0.1524" layer="91"/> -<label x="337.82" y="116.84" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="!RAS"/> -</segment> -<segment> -<wire x1="276.86" y1="147.32" x2="259.08" y2="147.32" width="0.1524" layer="91"/> -<label x="261.62" y="147.32" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PF11/DCMI_12/SPI5_MOSI/FMC_SDNRAS"/> -</segment> -</net> -<net name="DRAM_CAS" class="0"> -<segment> -<wire x1="355.6" y1="119.38" x2="337.82" y2="119.38" width="0.1524" layer="91"/> -<label x="337.82" y="119.38" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="!CAS"/> -</segment> -<segment> -<wire x1="276.86" y1="93.98" x2="259.08" y2="93.98" width="0.1524" layer="91"/> -<label x="259.08" y="93.98" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG15/USART6_CTS/DCMI_D13/FMC_SDNCAS"/> -</segment> -</net> -<net name="DRAM_WE" class="0"> -<segment> -<wire x1="355.6" y1="121.92" x2="337.82" y2="121.92" width="0.1524" layer="91"/> -<label x="337.82" y="121.92" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="!WE"/> -</segment> -<segment> -<wire x1="93.98" y1="195.58" x2="76.2" y2="195.58" width="0.1524" layer="91"/> -<label x="76.2" y="195.58" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/ETH_RMII_CRS_DV"/> -</segment> -</net> -<net name="DRAM_CS" class="0"> -<segment> -<pinref part="U$5" gate="G$2" pin="PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0/ADC12_IN14"/> -<wire x1="93.98" y1="116.84" x2="76.2" y2="116.84" width="0.1524" layer="91"/> -<label x="78.74" y="116.84" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="R8" gate="G$1" pin="2"/> -<pinref part="U$7" gate="G$1" pin="!CS"/> -<wire x1="337.82" y1="124.46" x2="355.6" y2="124.46" width="0.1524" layer="91"/> -<label x="337.82" y="124.46" size="1.778" layer="95"/> -</segment> -</net> -<net name="DRAM_CLK" class="0"> -<segment> -<wire x1="355.6" y1="104.14" x2="337.82" y2="104.14" width="0.1524" layer="91"/> -<label x="337.82" y="104.14" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="CLK"/> -</segment> -<segment> -<wire x1="276.86" y1="111.76" x2="259.08" y2="111.76" width="0.1524" layer="91"/> -<label x="261.62" y="111.76" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PG8/SPI6_NSS/USART6_RTS/ETH_PPS_OUT/FMC_SDCLK"/> -</segment> -</net> -<net name="DRAM_CLKE" class="0"> -<segment> -<wire x1="355.6" y1="101.6" x2="337.82" y2="101.6" width="0.1524" layer="91"/> -<label x="337.82" y="101.6" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="CKE"/> -</segment> -<segment> -<pinref part="U$5" gate="G$2" pin="PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1/ADC12_IN15"/> -<wire x1="93.98" y1="114.3" x2="76.2" y2="114.3" width="0.1524" layer="91"/> -<label x="76.2" y="114.3" size="1.778" layer="95"/> -</segment> -</net> -<net name="DRAM_D8" class="0"> -<segment> -<wire x1="279.4" y1="190.5" x2="259.08" y2="190.5" width="0.1524" layer="91"/> -<label x="261.62" y="190.5" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE11/FMC_D8/TIM1_CH2/SPI4_NSS"/> -</segment> -<segment> -<wire x1="406.4" y1="83.82" x2="386.08" y2="83.82" width="0.1524" layer="91"/> -<label x="388.62" y="83.82" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ8"/> -</segment> -</net> -<net name="DRAM_D9" class="0"> -<segment> -<wire x1="279.4" y1="187.96" x2="259.08" y2="187.96" width="0.1524" layer="91"/> -<label x="261.62" y="187.96" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE12/FMC_D9/TIM1_CH3N/SPI4_SCK"/> -</segment> -<segment> -<wire x1="406.4" y1="81.28" x2="386.08" y2="81.28" width="0.1524" layer="91"/> -<label x="388.62" y="81.28" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ9"/> -</segment> -</net> -<net name="DRAM_D10" class="0"> -<segment> -<wire x1="279.4" y1="185.42" x2="259.08" y2="185.42" width="0.1524" layer="91"/> -<label x="261.62" y="185.42" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE13/FMC_D10/TIM1_CH3/SPI4_MISO"/> -</segment> -<segment> -<wire x1="406.4" y1="78.74" x2="386.08" y2="78.74" width="0.1524" layer="91"/> -<label x="388.62" y="78.74" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ10"/> -</segment> -</net> -<net name="DRAM_D11" class="0"> -<segment> -<wire x1="279.4" y1="182.88" x2="259.08" y2="182.88" width="0.1524" layer="91"/> -<label x="261.62" y="182.88" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE14/FMC_D11/TIM1_CH4/SPI4_MOSI"/> -</segment> -<segment> -<wire x1="406.4" y1="76.2" x2="386.08" y2="76.2" width="0.1524" layer="91"/> -<label x="388.62" y="76.2" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ11"/> -</segment> -</net> -<net name="DRAM_D12" class="0"> -<segment> -<wire x1="279.4" y1="180.34" x2="259.08" y2="180.34" width="0.1524" layer="91"/> -<label x="261.62" y="180.34" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE15/FMC_D12/TIM1_BKIN/"/> -</segment> -<segment> -<wire x1="406.4" y1="73.66" x2="386.08" y2="73.66" width="0.1524" layer="91"/> -<label x="388.62" y="73.66" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ12"/> -</segment> -</net> -<net name="DRAM_D13" class="0"> -<segment> -<wire x1="279.4" y1="241.3" x2="259.08" y2="241.3" width="0.1524" layer="91"/> -<label x="261.62" y="241.3" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD8/FMC_D13/USART3_TX"/> -</segment> -<segment> -<wire x1="406.4" y1="71.12" x2="386.08" y2="71.12" width="0.1524" layer="91"/> -<label x="388.62" y="71.12" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ13"/> -</segment> -</net> -<net name="DRAM_D14" class="0"> -<segment> -<wire x1="279.4" y1="238.76" x2="259.08" y2="238.76" width="0.1524" layer="91"/> -<label x="261.62" y="238.76" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD9/FMC_D14/USART3_RX"/> -</segment> -<segment> -<wire x1="406.4" y1="68.58" x2="386.08" y2="68.58" width="0.1524" layer="91"/> -<label x="388.62" y="68.58" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ14"/> -</segment> -</net> -<net name="DRAM_D15" class="0"> -<segment> -<wire x1="279.4" y1="236.22" x2="259.08" y2="236.22" width="0.1524" layer="91"/> -<label x="261.62" y="236.22" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PD10/FMC_D15/USART3_CK"/> -</segment> -<segment> -<wire x1="406.4" y1="66.04" x2="386.08" y2="66.04" width="0.1524" layer="91"/> -<label x="388.62" y="66.04" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQ15"/> -</segment> -</net> -<net name="N$30" class="0"> -<segment> -<pinref part="Y2" gate="G$1" pin="2"/> -<pinref part="C21" gate="G$1" pin="2"/> -<wire x1="281.94" y1="81.28" x2="281.94" y2="78.74" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$2" pin="PH1/OSC_OUT"/> -<wire x1="259.08" y1="86.36" x2="281.94" y2="86.36" width="0.1524" layer="91"/> -<wire x1="281.94" y1="86.36" x2="281.94" y2="81.28" width="0.1524" layer="91"/> -<junction x="281.94" y="81.28"/> -</segment> -</net> -<net name="N$31" class="0"> -<segment> -<pinref part="Y2" gate="G$1" pin="1"/> -<wire x1="292.1" y1="88.9" x2="292.1" y2="86.36" width="0.1524" layer="91"/> -<wire x1="292.1" y1="86.36" x2="292.1" y2="81.28" width="0.1524" layer="91"/> -<pinref part="C22" gate="G$1" pin="2"/> -<wire x1="292.1" y1="81.28" x2="292.1" y2="78.74" width="0.1524" layer="91"/> -<junction x="292.1" y="81.28"/> -<pinref part="U$5" gate="G$2" pin="PH0/OSC_IN"/> -<wire x1="259.08" y1="88.9" x2="292.1" y2="88.9" width="0.1524" layer="91"/> -</segment> -</net> -<net name="VCAP2" class="0"> -<segment> -<wire x1="259.08" y1="81.28" x2="274.32" y2="81.28" width="0.1524" layer="91"/> -<wire x1="274.32" y1="81.28" x2="274.32" y2="76.2" width="0.1524" layer="91"/> -<pinref part="C20" gate="G$1" pin="1"/> -<pinref part="U$5" gate="G$2" pin="VCAP@1"/> -</segment> -</net> -<net name="VCAP1" class="0"> -<segment> -<wire x1="259.08" y1="78.74" x2="266.7" y2="78.74" width="0.1524" layer="91"/> -<wire x1="266.7" y1="78.74" x2="266.7" y2="76.2" width="0.1524" layer="91"/> -<pinref part="C19" gate="G$1" pin="1"/> -<pinref part="U$5" gate="G$2" pin="VCAP@2"/> -</segment> -</net> -<net name="N$35" class="0"> -<segment> -<pinref part="C17" gate="G$1" pin="1"/> -<wire x1="33.02" y1="218.44" x2="33.02" y2="226.06" width="0.1524" layer="91"/> -<wire x1="93.98" y1="226.06" x2="76.2" y2="226.06" width="0.1524" layer="91"/> -<wire x1="76.2" y1="226.06" x2="38.1" y2="226.06" width="0.1524" layer="91"/> -<wire x1="38.1" y1="226.06" x2="33.02" y2="226.06" width="0.1524" layer="91"/> -<pinref part="C18" gate="G$1" pin="1"/> -<wire x1="38.1" y1="218.44" x2="38.1" y2="226.06" width="0.1524" layer="91"/> -<junction x="38.1" y="226.06"/> -<wire x1="76.2" y1="223.52" x2="76.2" y2="226.06" width="0.1524" layer="91"/> -<wire x1="93.98" y1="223.52" x2="76.2" y2="223.52" width="0.1524" layer="91"/> -<junction x="76.2" y="226.06"/> -<pinref part="U3" gate="G$1" pin="1"/> -<wire x1="33.02" y1="241.3" x2="33.02" y2="226.06" width="0.1524" layer="91"/> -<junction x="33.02" y="226.06"/> -<pinref part="U$5" gate="G$2" pin="VDDA"/> -<pinref part="U$5" gate="G$2" pin="VREF+"/> -</segment> -</net> -<net name="DRAM_A12" class="0"> -<segment> -<wire x1="355.6" y1="66.04" x2="335.28" y2="66.04" width="0.1524" layer="91"/> -<label x="337.82" y="66.04" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="A12"/> -</segment> -<segment> -<pinref part="U$5" gate="G$2" pin="PG2/FMC_A12"/> -<wire x1="259.08" y1="127" x2="279.4" y2="127" width="0.1524" layer="91"/> -<label x="261.62" y="127" size="1.778" layer="95"/> -</segment> -</net> -<net name="DRAM_DQMH" class="0"> -<segment> -<wire x1="335.28" y1="109.22" x2="355.6" y2="109.22" width="0.1524" layer="91"/> -<label x="337.82" y="109.22" size="1.778" layer="95"/> -<pinref part="U$7" gate="G$1" pin="DQMH"/> -</segment> -<segment> -<wire x1="279.4" y1="215.9" x2="259.08" y2="215.9" width="0.1524" layer="91"/> -<label x="261.62" y="215.9" size="1.778" layer="95"/> -<pinref part="U$5" gate="G$2" pin="PE1/UART8_TX/FMC_NBL1/DCMI_D3"/> -</segment> -</net> -</nets> -</sheet> -</sheets> -</schematic> -</drawing> -<compatibility> -<note version="6.3" minversion="6.2.2" severity="warning"> -Since Version 6.2.2 text objects can contain more than one line, -which will not be processed correctly with this version. -</note> -<note version="8.2" severity="warning"> -Since Version 8.2, EAGLE supports online libraries. The ids -of those online libraries will not be understood (or retained) -with this version. -</note> -<note version="8.3" severity="warning"> -Since Version 8.3, EAGLE supports URNs for individual library -assets (packages, symbols, and devices). The URNs of those assets -will not be understood (or retained) with this version. -</note> -</compatibility> -</eagle> diff --git a/pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-32-bit.pdf b/pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-32-bit.pdf Binary files differdeleted file mode 100644 index 5e9b210..0000000 --- a/pcb_boven/openmv/openmv-boards-master/openmv4/plus/base-32-bit.pdf +++ /dev/null |