From e836ff283a67c7b43a4506f8a6654be5e8500648 Mon Sep 17 00:00:00 2001
From: Abel Tim <git@abeltim.com>
Date: Mon, 26 May 2025 17:24:47 +0200
Subject: almost finished extra pcb

The pcb is designed to be single layerd for simplisity, but there are still two unconnected lines, GND and 5V are now both in two seperate sections. Can connect via an wire or update the PCB. Will not spend a lot of time on it now for it is not shure we will use an PCB or just a board with lots of wires on it.

Signed-off-by: Abel Tim <git@abeltim.com>
---
 PCB/aparte_pcb/midden/midden.kicad_prl | 89 ++++++++++++++++++++--------------
 1 file changed, 52 insertions(+), 37 deletions(-)

(limited to 'PCB/aparte_pcb/midden/midden.kicad_prl')

diff --git a/PCB/aparte_pcb/midden/midden.kicad_prl b/PCB/aparte_pcb/midden/midden.kicad_prl
index 3975f9f..cb26f31 100644
--- a/PCB/aparte_pcb/midden/midden.kicad_prl
+++ b/PCB/aparte_pcb/midden/midden.kicad_prl
@@ -10,6 +10,7 @@
     "opacity": {
       "images": 0.6,
       "pads": 1.0,
+      "shapes": 1.0,
       "tracks": 1.0,
       "vias": 1.0,
       "zones": 0.6
@@ -28,43 +29,27 @@
       "zones": true
     },
     "visible_items": [
-      0,
-      1,
-      2,
-      3,
-      4,
-      5,
-      8,
-      9,
-      10,
-      11,
-      12,
-      13,
-      15,
-      16,
-      17,
-      18,
-      19,
-      20,
-      21,
-      22,
-      23,
-      24,
-      25,
-      26,
-      27,
-      28,
-      29,
-      30,
-      32,
-      33,
-      34,
-      35,
-      36,
-      39,
-      40
+      "vias",
+      "footprint_text",
+      "footprint_anchors",
+      "ratsnest",
+      "grid",
+      "footprints_front",
+      "footprints_back",
+      "footprint_values",
+      "footprint_references",
+      "tracks",
+      "drc_errors",
+      "drawing_sheet",
+      "bitmaps",
+      "pads",
+      "zones",
+      "drc_warnings",
+      "locked_item_shadows",
+      "conflict_shadows",
+      "shapes"
     ],
-    "visible_layers": "fffffff_ffffffff",
+    "visible_layers": "00000000_00000000_0fffffff_ffffffff",
     "zone_display_mode": 0
   },
   "git": {
@@ -75,9 +60,39 @@
   },
   "meta": {
     "filename": "midden.kicad_prl",
-    "version": 3
+    "version": 5
   },
+  "net_inspector_panel": {
+    "col_hidden": [],
+    "col_order": [],
+    "col_widths": [],
+    "custom_group_rules": [],
+    "expanded_rows": [],
+    "filter_by_net_name": true,
+    "filter_by_netclass": true,
+    "filter_text": "",
+    "group_by_constraint": false,
+    "group_by_netclass": false,
+    "show_unconnected_nets": false,
+    "show_zero_pad_nets": false,
+    "sort_ascending": true,
+    "sorting_column": -1
+  },
+  "open_jobsets": [],
   "project": {
     "files": []
+  },
+  "schematic": {
+    "selection_filter": {
+      "graphics": true,
+      "images": true,
+      "labels": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pins": true,
+      "symbols": true,
+      "text": true,
+      "wires": true
+    }
   }
 }
-- 
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