From b085d968ac6fcc5e147943e5a688a74492490b22 Mon Sep 17 00:00:00 2001 From: abel Date: Sat, 19 Oct 2024 19:34:10 +0200 Subject: \x --- PCB/aparte_pcb/onder/onder.kicad_sch | 98 ++++++++++++++----------------- PCB/aparte_pcb/onder/~onder.kicad_sch.lck | 1 + 2 files changed, 45 insertions(+), 54 deletions(-) create mode 100644 PCB/aparte_pcb/onder/~onder.kicad_sch.lck (limited to 'PCB/aparte_pcb/onder') diff --git a/PCB/aparte_pcb/onder/onder.kicad_sch b/PCB/aparte_pcb/onder/onder.kicad_sch index 2b01330..6ea482b 100644 --- a/PCB/aparte_pcb/onder/onder.kicad_sch +++ b/PCB/aparte_pcb/onder/onder.kicad_sch @@ -1952,6 +1952,12 @@ (color 0 0 0 0) (uuid "0343fe66-e01d-4526-81a5-9d960feb7875") ) + (junction + (at 196.85 121.92) + (diameter 0) + (color 0 0 0 0) + (uuid "048a7a11-c7a8-4704-ac87-e36060f6c6f7") + ) (junction (at 101.6 82.55) (diameter 0) @@ -2024,6 +2030,12 @@ (color 0 0 0 0) (uuid "1cabcdf5-8cb3-4cbf-981f-a996c09bca49") ) + (junction + (at 212.09 121.92) + (diameter 0) + (color 0 0 0 0) + (uuid "1fd7f192-db3a-4548-ae37-a1bc25f5ec83") + ) (junction (at 58.42 81.28) (diameter 0) @@ -2240,12 +2252,6 @@ (color 0 0 0 0) (uuid "78a31dce-eb3c-48c1-8692-fb084f2301d8") ) - (junction - (at 234.95 82.55) - (diameter 0) - (color 0 0 0 0) - (uuid "83416bca-e87d-420a-95ab-f9ad619766e4") - ) (junction (at 186.69 82.55) (diameter 0) @@ -2420,12 +2426,6 @@ (color 0 0 0 0) (uuid "dc5d92fe-4dfa-4dde-ad83-b987f981bd3a") ) - (junction - (at 229.87 81.28) - (diameter 0) - (color 0 0 0 0) - (uuid "dd4c5453-30e7-43ab-968d-5ad0ef25c282") - ) (junction (at 163.83 83.82) (diameter 0) @@ -2616,7 +2616,7 @@ ) (wire (pts - (xy 182.88 121.92) (xy 247.65 121.92) + (xy 182.88 121.92) (xy 196.85 121.92) ) (stroke (width 0) @@ -2704,6 +2704,16 @@ ) (uuid "1809177b-e85d-496b-91a6-6d1410c745ee") ) + (wire + (pts + (xy 212.09 121.92) (xy 247.65 121.92) + ) + (stroke + (width 0) + (type default) + ) + (uuid "1937bf3f-67e1-4456-93f3-6e8b4268acc3") + ) (wire (pts (xy 110.49 129.54) (xy 266.7 129.54) @@ -3144,16 +3154,6 @@ ) (uuid "4f500bef-ea9f-465a-8b32-9ac0a0de9146") ) - (wire - (pts - (xy 196.85 113.03) (xy 234.95 113.03) - ) - (stroke - (width 0) - (type default) - ) - (uuid "4f6f8b28-2c67-4a76-9833-86851565618a") - ) (wire (pts (xy 153.67 81.28) (xy 153.67 78.74) @@ -3574,16 +3574,6 @@ ) (uuid "7df5b9cc-c99c-409d-838c-7898ebf52736") ) - (wire - (pts - (xy 229.87 109.22) (xy 212.09 109.22) - ) - (stroke - (width 0) - (type default) - ) - (uuid "7faf9e66-bebe-4f5b-aff6-bfc651f63f70") - ) (wire (pts (xy 186.69 82.55) (xy 196.85 82.55) @@ -3696,7 +3686,7 @@ ) (wire (pts - (xy 196.85 109.22) (xy 196.85 113.03) + (xy 196.85 109.22) (xy 196.85 121.92) ) (stroke (width 0) @@ -3864,16 +3854,6 @@ ) (uuid "a77ec9a6-2ec1-44aa-b10a-940a9d827d61") ) - (wire - (pts - (xy 234.95 113.03) (xy 234.95 82.55) - ) - (stroke - (width 0) - (type default) - ) - (uuid "a7bb11c5-1639-4ff4-8595-c9a56d826eff") - ) (wire (pts (xy 55.88 121.92) (xy 71.12 121.92) @@ -3944,6 +3924,16 @@ ) (uuid "b0e7ef69-3800-4a55-88b8-d05c16ec1ecb") ) + (wire + (pts + (xy 212.09 109.22) (xy 212.09 121.92) + ) + (stroke + (width 0) + (type default) + ) + (uuid "b26c6cb2-e7d4-497a-8bd6-e7f84834b33e") + ) (wire (pts (xy 158.75 82.55) (xy 139.7 82.55) @@ -4044,6 +4034,16 @@ ) (uuid "bba6c71d-8070-4837-aae2-225621eccf5c") ) + (wire + (pts + (xy 196.85 121.92) (xy 212.09 121.92) + ) + (stroke + (width 0) + (type default) + ) + (uuid "bd1fc571-9ee4-4822-b169-45013dc5a3f8") + ) (wire (pts (xy 269.24 50.8) (xy 278.13 50.8) @@ -4374,16 +4374,6 @@ ) (uuid "e6a47ce9-327b-4516-96d4-457b54f9be0a") ) - (wire - (pts - (xy 229.87 81.28) (xy 229.87 109.22) - ) - (stroke - (width 0) - (type default) - ) - (uuid "e8922dd7-31ab-4e1e-a912-acb7f01ca62c") - ) (wire (pts (xy 12.7 102.87) (xy 12.7 60.96) diff --git a/PCB/aparte_pcb/onder/~onder.kicad_sch.lck b/PCB/aparte_pcb/onder/~onder.kicad_sch.lck new file mode 100644 index 0000000..84e1f16 --- /dev/null +++ b/PCB/aparte_pcb/onder/~onder.kicad_sch.lck @@ -0,0 +1 @@ +{"hostname":"DESKTOP-FJVEEFD","username":"Abel Tim"} \ No newline at end of file -- cgit v1.2.3