From a4748d628d3b33dab92e60a43565bcff78957fe7 Mon Sep 17 00:00:00 2001
From: Abel Tim <abel@main.home>
Date: Sun, 9 Jun 2024 12:31:17 +0200
Subject: pcb

---
 .../openmv5/onsemi/lbr/AP0202AT2L00XPGA0.lbr       | 404 +++++++++++++++++++++
 1 file changed, 404 insertions(+)
 create mode 100644 pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AP0202AT2L00XPGA0.lbr

(limited to 'pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AP0202AT2L00XPGA0.lbr')

diff --git a/pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AP0202AT2L00XPGA0.lbr b/pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AP0202AT2L00XPGA0.lbr
new file mode 100644
index 0000000..0a2bba4
--- /dev/null
+++ b/pcb_boven/openmv/openmv-boards-master/openmv5/onsemi/lbr/AP0202AT2L00XPGA0.lbr
@@ -0,0 +1,404 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!DOCTYPE eagle SYSTEM "eagle.dtd">
+<eagle version="9.6.2">
+<drawing>
+<settings>
+<setting alwaysvectorfont="no"/>
+<setting verticaltext="up"/>
+</settings>
+<grid distance="50" unitdist="mil" unit="mil" style="lines" multiple="1" display="yes" altdistance="5" altunitdist="mil" altunit="mil"/>
+<layers>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="2" name="Route2" color="16" fill="1" visible="no" active="yes"/>
+<layer number="15" name="Route15" color="23" fill="1" visible="no" active="yes"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
+<layer number="20" name="Dimension" color="24" fill="1" visible="yes" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>
+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>
+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>
+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>
+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>
+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>
+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>
+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>
+<layer number="39" name="tKeepout" color="4" fill="11" visible="yes" active="yes"/>
+<layer number="40" name="bKeepout" color="1" fill="11" visible="yes" active="yes"/>
+<layer number="41" name="tRestrict" color="4" fill="10" visible="yes" active="yes"/>
+<layer number="42" name="bRestrict" color="1" fill="10" visible="yes" active="yes"/>
+<layer number="43" name="vRestrict" color="2" fill="10" visible="yes" active="yes"/>
+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>
+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>
+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>
+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="88" name="SimResults" color="9" fill="1" visible="yes" active="yes"/>
+<layer number="89" name="SimProbes" color="9" fill="1" visible="yes" active="yes"/>
+<layer number="90" name="Modules" color="5" fill="1" visible="yes" active="yes"/>
+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
+<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/>
+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>
+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>
+</layers>
+<library>
+<packages>
+<package name="AP0202AT2L00XPGA0">
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+<text x="-3.81" y="3.81" size="1.778" layer="25">&gt;NAME</text>
+<text x="-3.81" y="-6.35" size="1.778" layer="27">&gt;VALUE</text>
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+<pin name="HISPI0N" x="-27.94" y="-30.48" length="middle" direction="in"/>
+<pin name="HISPI0P" x="-27.94" y="-33.02" length="middle" direction="in"/>
+<pin name="HISPI1N" x="-27.94" y="-35.56" length="middle" direction="in"/>
+<pin name="HISPI1P" x="-27.94" y="-38.1" length="middle" direction="in"/>
+<pin name="TRIGGER_OUT/GPIO_0" x="-27.94" y="-43.18" length="middle" direction="out"/>
+<pin name="FV_OUT" x="-27.94" y="-48.26" length="middle" direction="out"/>
+<pin name="META_LINE_VALID" x="-27.94" y="-50.8" length="middle" direction="out"/>
+<pin name="LV_OUT" x="-27.94" y="-53.34" length="middle" direction="out"/>
+<pin name="PIXCLK_OUT" x="-27.94" y="-55.88" length="middle" direction="out"/>
+<pin name="GPIO6" x="-27.94" y="-60.96" length="middle"/>
+<pin name="GPIO1" x="-27.94" y="-73.66" length="middle"/>
+<pin name="GPIO2" x="-27.94" y="-71.12" length="middle"/>
+<pin name="GPIO3" x="-27.94" y="-68.58" length="middle"/>
+<pin name="GPIO4" x="-27.94" y="-66.04" length="middle"/>
+<pin name="GPIO5" x="-27.94" y="-63.5" length="middle"/>
+<pin name="DOUT_23" x="27.94" y="78.74" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_1" x="27.94" y="22.86" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_2" x="27.94" y="25.4" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_3" x="27.94" y="27.94" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_4" x="27.94" y="30.48" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_5" x="27.94" y="33.02" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_6" x="27.94" y="35.56" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_7" x="27.94" y="38.1" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_8" x="27.94" y="40.64" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_9" x="27.94" y="43.18" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_10" x="27.94" y="45.72" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_11" x="27.94" y="48.26" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_12" x="27.94" y="50.8" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_13" x="27.94" y="53.34" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_14" x="27.94" y="55.88" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_15" x="27.94" y="58.42" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_16" x="27.94" y="60.96" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_17" x="27.94" y="63.5" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_18" x="27.94" y="66.04" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_19" x="27.94" y="68.58" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_20" x="27.94" y="71.12" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_21" x="27.94" y="73.66" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_22" x="27.94" y="76.2" length="middle" direction="out" rot="R180"/>
+<pin name="DOUT_0" x="27.94" y="20.32" length="middle" direction="out" rot="R180"/>
+<pin name="TEST" x="27.94" y="15.24" length="middle" direction="in" rot="R180"/>
+<pin name="RESERVED_0" x="27.94" y="10.16" length="middle" direction="in" rot="R180"/>
+<pin name="RESERVED_1" x="27.94" y="7.62" length="middle" direction="in" rot="R180"/>
+<pin name="VDDIO_S" x="27.94" y="2.54" length="middle" direction="sup" rot="R180"/>
+<pin name="VDDIO_H0" x="27.94" y="-2.54" length="middle" direction="sup" rot="R180"/>
+<pin name="VDD_PLL" x="27.94" y="-12.7" length="middle" direction="sup" rot="R180"/>
+<pin name="VDD0" x="27.94" y="-17.78" length="middle" direction="sup" rot="R180"/>
+<pin name="VDDIO_OTPM" x="27.94" y="-30.48" length="middle" direction="sup" rot="R180"/>
+<pin name="VDD_PHY" x="27.94" y="-35.56" length="middle" direction="sup" rot="R180"/>
+<pin name="VDD_REG" x="27.94" y="-40.64" length="middle" direction="sup" rot="R180"/>
+<pin name="LDO_OP" x="27.94" y="-43.18" length="middle" direction="out" rot="R180"/>
+<pin name="FB_SENSE" x="27.94" y="-45.72" length="middle" direction="in" rot="R180"/>
+<pin name="DGND" x="27.94" y="-50.8" length="middle" direction="sup" rot="R180"/>
+<pin name="VDD1" x="27.94" y="-20.32" length="middle" direction="sup" rot="R180"/>
+<pin name="VDD2" x="27.94" y="-22.86" length="middle" direction="sup" rot="R180"/>
+<pin name="GND1" x="27.94" y="-58.42" length="middle" direction="sup" rot="R180"/>
+<pin name="GND2" x="27.94" y="-60.96" length="middle" direction="sup" rot="R180"/>
+<pin name="GND3" x="27.94" y="-63.5" length="middle" direction="sup" rot="R180"/>
+<pin name="GND4" x="27.94" y="-66.04" length="middle" direction="sup" rot="R180"/>
+<pin name="GND5" x="27.94" y="-68.58" length="middle" direction="sup" rot="R180"/>
+<pin name="GND6" x="27.94" y="-71.12" length="middle" direction="sup" rot="R180"/>
+<pin name="GND7" x="27.94" y="-73.66" length="middle" direction="sup" rot="R180"/>
+<pin name="VDD3" x="27.94" y="-25.4" length="middle" direction="sup" rot="R180"/>
+<pin name="VDDIO_H1" x="27.94" y="-5.08" length="middle" direction="sup" rot="R180"/>
+<pin name="VDDIO_H2" x="27.94" y="-7.62" length="middle" direction="sup" rot="R180"/>
+<pin name="GND0" x="27.94" y="-55.88" length="middle" direction="sup" rot="R180"/>
+<wire x1="-22.86" y1="-76.2" x2="-22.86" y2="81.28" width="0.1524" layer="94"/>
+<wire x1="-22.86" y1="81.28" x2="22.86" y2="81.28" width="0.1524" layer="94"/>
+<wire x1="22.86" y1="81.28" x2="22.86" y2="-76.2" width="0.1524" layer="94"/>
+<wire x1="22.86" y1="-76.2" x2="-22.86" y2="-76.2" width="0.1524" layer="94"/>
+<text x="-22.86" y="83.82" size="1.778" layer="95">&gt;NAME</text>
+<text x="-22.86" y="-81.28" size="1.778" layer="96">&gt;VALUE</text>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="AP0202AT2L00XPGA0" prefix="IC">
+<gates>
+<gate name="G$1" symbol="AP0202AT2L00XPGA0" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="AP0202AT2L00XPGA0">
+<connects>
+<connect gate="G$1" pin="DGND" pad="P$49"/>
+<connect gate="G$1" pin="DIN_0" pad="P$4"/>
+<connect gate="G$1" pin="DIN_1" pad="P$15"/>
+<connect gate="G$1" pin="DIN_10" pad="P$7"/>
+<connect gate="G$1" pin="DIN_11" pad="P$18"/>
+<connect gate="G$1" pin="DIN_2" pad="P$36"/>
+<connect gate="G$1" pin="DIN_3" pad="P$26"/>
+<connect gate="G$1" pin="DIN_4" pad="P$16"/>
+<connect gate="G$1" pin="DIN_5" pad="P$6"/>
+<connect gate="G$1" pin="DIN_6" pad="P$47"/>
+<connect gate="G$1" pin="DIN_7" pad="P$37"/>
+<connect gate="G$1" pin="DIN_8" pad="P$27"/>
+<connect gate="G$1" pin="DIN_9" pad="P$17"/>
+<connect gate="G$1" pin="DOUT_0" pad="P$89"/>
+<connect gate="G$1" pin="DOUT_1" pad="P$99"/>
+<connect gate="G$1" pin="DOUT_10" pad="P$86"/>
+<connect gate="G$1" pin="DOUT_11" pad="P$96"/>
+<connect gate="G$1" pin="DOUT_12" pad="P$66"/>
+<connect gate="G$1" pin="DOUT_13" pad="P$85"/>
+<connect gate="G$1" pin="DOUT_14" pad="P$75"/>
+<connect gate="G$1" pin="DOUT_15" pad="P$94"/>
+<connect gate="G$1" pin="DOUT_16" pad="P$65"/>
+<connect gate="G$1" pin="DOUT_17" pad="P$84"/>
+<connect gate="G$1" pin="DOUT_18" pad="P$74"/>
+<connect gate="G$1" pin="DOUT_19" pad="P$83"/>
+<connect gate="G$1" pin="DOUT_2" pad="P$78"/>
+<connect gate="G$1" pin="DOUT_20" pad="P$93"/>
+<connect gate="G$1" pin="DOUT_21" pad="P$73"/>
+<connect gate="G$1" pin="DOUT_22" pad="P$82"/>
+<connect gate="G$1" pin="DOUT_23" pad="P$91"/>
+<connect gate="G$1" pin="DOUT_3" pad="P$88"/>
+<connect gate="G$1" pin="DOUT_4" pad="P$98"/>
+<connect gate="G$1" pin="DOUT_5" pad="P$67"/>
+<connect gate="G$1" pin="DOUT_6" pad="P$77"/>
+<connect gate="G$1" pin="DOUT_7" pad="P$87"/>
+<connect gate="G$1" pin="DOUT_8" pad="P$76"/>
+<connect gate="G$1" pin="DOUT_9" pad="P$97"/>
+<connect gate="G$1" pin="ENDLO" pad="P$69"/>
+<connect gate="G$1" pin="EXTCLK" pad="P$58"/>
+<connect gate="G$1" pin="EXT_CLK_OUT" pad="P$13"/>
+<connect gate="G$1" pin="EXT_REG" pad="P$68"/>
+<connect gate="G$1" pin="FB_SENSE" pad="P$79"/>
+<connect gate="G$1" pin="FRAME_SYNC" pad="P$63"/>
+<connect gate="G$1" pin="FV_IN" pad="P$10"/>
+<connect gate="G$1" pin="FV_OUT" pad="P$72"/>
+<connect gate="G$1" pin="GND0" pad="P$44"/>
+<connect gate="G$1" pin="GND1" pad="P$45"/>
+<connect gate="G$1" pin="GND2" pad="P$46"/>
+<connect gate="G$1" pin="GND3" pad="P$48"/>
+<connect gate="G$1" pin="GND4" pad="P$55"/>
+<connect gate="G$1" pin="GND5" pad="P$56"/>
+<connect gate="G$1" pin="GND6" pad="P$57"/>
+<connect gate="G$1" pin="GND7" pad="P$100"/>
+<connect gate="G$1" pin="GPIO1" pad="P$42"/>
+<connect gate="G$1" pin="GPIO2" pad="P$52"/>
+<connect gate="G$1" pin="GPIO3" pad="P$53"/>
+<connect gate="G$1" pin="GPIO4" pad="P$62"/>
+<connect gate="G$1" pin="GPIO5" pad="P$24"/>
+<connect gate="G$1" pin="GPIO6" pad="P$12"/>
+<connect gate="G$1" pin="HISPI0N" pad="P$39"/>
+<connect gate="G$1" pin="HISPI0P" pad="P$40"/>
+<connect gate="G$1" pin="HISPI1N" pad="P$19"/>
+<connect gate="G$1" pin="HISPI1P" pad="P$20"/>
+<connect gate="G$1" pin="HISPICN" pad="P$29"/>
+<connect gate="G$1" pin="HISPICP" pad="P$30"/>
+<connect gate="G$1" pin="LDO_OP" pad="P$90"/>
+<connect gate="G$1" pin="LV_IN" pad="P$8"/>
+<connect gate="G$1" pin="LV_OUT" pad="P$64"/>
+<connect gate="G$1" pin="META_LINE_VALID" pad="P$71"/>
+<connect gate="G$1" pin="M_SCLK" pad="P$14"/>
+<connect gate="G$1" pin="M_SDATA" pad="P$3"/>
+<connect gate="G$1" pin="PIXCLK_IN" pad="P$28"/>
+<connect gate="G$1" pin="PIXCLK_OUT" pad="P$81"/>
+<connect gate="G$1" pin="RESERVED_0" pad="P$1"/>
+<connect gate="G$1" pin="RESERVED_1" pad="P$22"/>
+<connect gate="G$1" pin="RESET_N" pad="P$54"/>
+<connect gate="G$1" pin="RESET_N_OUT" pad="P$35"/>
+<connect gate="G$1" pin="SADDR" pad="P$34"/>
+<connect gate="G$1" pin="SCLK" pad="P$11"/>
+<connect gate="G$1" pin="SDATA" pad="P$23"/>
+<connect gate="G$1" pin="SPI_CS_N" pad="P$33"/>
+<connect gate="G$1" pin="SPI_SCLK" pad="P$21"/>
+<connect gate="G$1" pin="SPI_SDI" pad="P$32"/>
+<connect gate="G$1" pin="SPI_SDO" pad="P$31"/>
+<connect gate="G$1" pin="STANDBY" pad="P$43"/>
+<connect gate="G$1" pin="TEST" pad="P$61"/>
+<connect gate="G$1" pin="TRIGGER_OUT/GPIO_0" pad="P$25"/>
+<connect gate="G$1" pin="VDD0" pad="P$5"/>
+<connect gate="G$1" pin="VDD1" pad="P$41"/>
+<connect gate="G$1" pin="VDD2" pad="P$60"/>
+<connect gate="G$1" pin="VDD3" pad="P$95"/>
+<connect gate="G$1" pin="VDDIO_H0" pad="P$2"/>
+<connect gate="G$1" pin="VDDIO_H1" pad="P$50"/>
+<connect gate="G$1" pin="VDDIO_H2" pad="P$92"/>
+<connect gate="G$1" pin="VDDIO_OTPM" pad="P$51"/>
+<connect gate="G$1" pin="VDDIO_S" pad="P$9"/>
+<connect gate="G$1" pin="VDD_PHY" pad="P$38"/>
+<connect gate="G$1" pin="VDD_PLL" pad="P$70"/>
+<connect gate="G$1" pin="VDD_REG" pad="P$80"/>
+<connect gate="G$1" pin="XTAL" pad="P$59"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+</drawing>
+</eagle>
-- 
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