Merge pull request #6 from ableTI/PCB-library-Boven

Add files via upload

1 files changed, 32 insertions, 0 deletions

diff --git a/PCB/aparte_pcb/TSSP4038/KiCad/TSSP4038.kicad_mod b/PCB/aparte_pcb/TSSP4038/KiCad/TSSP4038.kicad_mod
new file mode 100644
index 0000000..0a07112
--- /dev/null
+++ b/PCB/aparte_pcb/TSSP4038/KiCad/TSSP4038.kicad_mod
@@ -0,0 +1,32 @@
+(module "TSSP4038" (layer F.Cu)

+  (descr "TSSP4038")

+  (tags "Integrated Circuit")

+  (fp_text reference IC** (at -0.266 -0.887) (layer F.SilkS)

+    (effects (font (size 1.27 1.27) (thickness 0.254)))

+  )

+  (fp_text user %R (at -0.266 -0.887) (layer F.Fab)

+    (effects (font (size 1.27 1.27) (thickness 0.254)))

+  )

+  (fp_text value "TSSP4038" (at -0.266 -0.887) (layer F.SilkS) hide

+    (effects (font (size 1.27 1.27) (thickness 0.254)))

+  )

+  (fp_line (start -3 0) (end 3 0) (layer F.Fab) (width 0.2))

+  (fp_line (start 3 0) (end 3 3.9) (layer F.Fab) (width 0.2))

+  (fp_line (start 3 3.9) (end -3 3.9) (layer F.Fab) (width 0.2))

+  (fp_line (start -3 3.9) (end -3 0) (layer F.Fab) (width 0.2))

+  (fp_line (start -3 0) (end 3 0) (layer F.SilkS) (width 0.2))

+  (fp_line (start -3 3.9) (end -2.5 3.9) (layer F.SilkS) (width 0.2))

+  (fp_line (start 3 3.9) (end 2.5 3.9) (layer F.SilkS) (width 0.2))

+  (fp_line (start -3 3.9) (end -3 2.495) (layer F.SilkS) (width 0.2))

+  (fp_line (start 3 3.9) (end 3 2.495) (layer F.SilkS) (width 0.2))

+  (fp_arc (start 0 2.916435) (end -2.5 3.9) (angle -137) (layer F.Fab) (width 0.2))

+  (fp_arc (start 0 2.916505) (end 2.5 3.9) (angle 137.1) (layer F.SilkS) (width 0.2))

+  (pad 1 thru_hole circle (at -2.54 1.55) (size 1.6 1.6) (drill 1.06) (layers *.Cu *.Mask))

+  (pad 2 thru_hole circle (at 0 1.55) (size 1.6 1.6) (drill 1.06) (layers *.Cu *.Mask))

+  (pad 3 thru_hole circle (at 2.54 1.55) (size 1.6 1.6) (drill 1.06) (layers *.Cu *.Mask))

+  (model TSSP4038.stp

+    (at (xyz 0 -0.001181102335805 0.22244094863651))

+    (scale (xyz 1 1 1))

+    (rotate (xyz -90 0 0))

+  )

+)