\x

2 files changed, 45 insertions, 54 deletions

diff --git a/PCB/aparte_pcb/onder/onder.kicad_sch b/PCB/aparte_pcb/onder/onder.kicad_sch
index 2b01330..6ea482b 100644
--- a/PCB/aparte_pcb/onder/onder.kicad_sch
+++ b/PCB/aparte_pcb/onder/onder.kicad_sch
@@ -1953,6 +1953,12 @@
 		(uuid "0343fe66-e01d-4526-81a5-9d960feb7875")
 	)
 	(junction
+		(at 196.85 121.92)
+		(diameter 0)
+		(color 0 0 0 0)
+		(uuid "048a7a11-c7a8-4704-ac87-e36060f6c6f7")
+	)
+	(junction
 		(at 101.6 82.55)
 		(diameter 0)
 		(color 0 0 0 0)
@@ -2025,6 +2031,12 @@
 		(uuid "1cabcdf5-8cb3-4cbf-981f-a996c09bca49")
 	)
 	(junction
+		(at 212.09 121.92)
+		(diameter 0)
+		(color 0 0 0 0)
+		(uuid "1fd7f192-db3a-4548-ae37-a1bc25f5ec83")
+	)
+	(junction
 		(at 58.42 81.28)
 		(diameter 0)
 		(color 0 0 0 0)
@@ -2241,12 +2253,6 @@
 		(uuid "78a31dce-eb3c-48c1-8692-fb084f2301d8")
 	)
 	(junction
-		(at 234.95 82.55)
-		(diameter 0)
-		(color 0 0 0 0)
-		(uuid "83416bca-e87d-420a-95ab-f9ad619766e4")
-	)
-	(junction
 		(at 186.69 82.55)
 		(diameter 0)
 		(color 0 0 0 0)
@@ -2421,12 +2427,6 @@
 		(uuid "dc5d92fe-4dfa-4dde-ad83-b987f981bd3a")
 	)
 	(junction
-		(at 229.87 81.28)
-		(diameter 0)
-		(color 0 0 0 0)
-		(uuid "dd4c5453-30e7-43ab-968d-5ad0ef25c282")
-	)
-	(junction
 		(at 163.83 83.82)
 		(diameter 0)
 		(color 0 0 0 0)
@@ -2616,7 +2616,7 @@
 	)
 	(wire
 		(pts
-			(xy 182.88 121.92) (xy 247.65 121.92)
+			(xy 182.88 121.92) (xy 196.85 121.92)
 		)
 		(stroke
 			(width 0)
@@ -2706,6 +2706,16 @@
 	)
 	(wire
 		(pts
+			(xy 212.09 121.92) (xy 247.65 121.92)
+		)
+		(stroke
+			(width 0)
+			(type default)
+		)
+		(uuid "1937bf3f-67e1-4456-93f3-6e8b4268acc3")
+	)
+	(wire
+		(pts
 			(xy 110.49 129.54) (xy 266.7 129.54)
 		)
 		(stroke
@@ -3146,16 +3156,6 @@
 	)
 	(wire
 		(pts
-			(xy 196.85 113.03) (xy 234.95 113.03)
-		)
-		(stroke
-			(width 0)
-			(type default)
-		)
-		(uuid "4f6f8b28-2c67-4a76-9833-86851565618a")
-	)
-	(wire
-		(pts
 			(xy 153.67 81.28) (xy 153.67 78.74)
 		)
 		(stroke
@@ -3576,16 +3576,6 @@
 	)
 	(wire
 		(pts
-			(xy 229.87 109.22) (xy 212.09 109.22)
-		)
-		(stroke
-			(width 0)
-			(type default)
-		)
-		(uuid "7faf9e66-bebe-4f5b-aff6-bfc651f63f70")
-	)
-	(wire
-		(pts
 			(xy 186.69 82.55) (xy 196.85 82.55)
 		)
 		(stroke
@@ -3696,7 +3686,7 @@
 	)
 	(wire
 		(pts
-			(xy 196.85 109.22) (xy 196.85 113.03)
+			(xy 196.85 109.22) (xy 196.85 121.92)
 		)
 		(stroke
 			(width 0)
@@ -3866,16 +3856,6 @@
 	)
 	(wire
 		(pts
-			(xy 234.95 113.03) (xy 234.95 82.55)
-		)
-		(stroke
-			(width 0)
-			(type default)
-		)
-		(uuid "a7bb11c5-1639-4ff4-8595-c9a56d826eff")
-	)
-	(wire
-		(pts
 			(xy 55.88 121.92) (xy 71.12 121.92)
 		)
 		(stroke
@@ -3946,6 +3926,16 @@
 	)
 	(wire
 		(pts
+			(xy 212.09 109.22) (xy 212.09 121.92)
+		)
+		(stroke
+			(width 0)
+			(type default)
+		)
+		(uuid "b26c6cb2-e7d4-497a-8bd6-e7f84834b33e")
+	)
+	(wire
+		(pts
 			(xy 158.75 82.55) (xy 139.7 82.55)
 		)
 		(stroke
@@ -4046,6 +4036,16 @@
 	)
 	(wire
 		(pts
+			(xy 196.85 121.92) (xy 212.09 121.92)
+		)
+		(stroke
+			(width 0)
+			(type default)
+		)
+		(uuid "bd1fc571-9ee4-4822-b169-45013dc5a3f8")
+	)
+	(wire
+		(pts
 			(xy 269.24 50.8) (xy 278.13 50.8)
 		)
 		(stroke
@@ -4376,16 +4376,6 @@
 	)
 	(wire
 		(pts
-			(xy 229.87 81.28) (xy 229.87 109.22)
-		)
-		(stroke
-			(width 0)
-			(type default)
-		)
-		(uuid "e8922dd7-31ab-4e1e-a912-acb7f01ca62c")
-	)
-	(wire
-		(pts
 			(xy 12.7 102.87) (xy 12.7 60.96)
 		)
 		(stroke
diff --git a/PCB/aparte_pcb/onder/~onder.kicad_sch.lck b/PCB/aparte_pcb/onder/~onder.kicad_sch.lck
new file mode 100644
index 0000000..84e1f16
--- /dev/null
+++ b/PCB/aparte_pcb/onder/~onder.kicad_sch.lck
@@ -0,0 +1 @@
+{"hostname":"DESKTOP-FJVEEFD","username":"Abel Tim"}
\ No newline at end of file